Patents by Inventor Katsunori Ueno

Katsunori Ueno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12294019
    Abstract: A method for manufacturing a nitride semiconductor device including: forming N-type regions in a nitride semiconductor layer; implanting ions of an acceptor element into a region sandwiched by the N-type regions in the nitride semiconductor layer; and forming a P-type region sandwiched by the N-type regions by subjecting the nitride semiconductor layer to heat treatment and activating the acceptor element. The forming the N-type regions includes implanting ions of a donor element to the nitride semiconductor layer such that concentration of the donor element in the N-type regions is equal to or greater than concentration of the acceptor element in the P-type region. The implanting ions of the acceptor element includes implanting ions of the acceptor element such that concentration of the acceptor element in the P-type region is 1×1019 cm?3 or more and 1×1021 cm?3 or less.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: May 6, 2025
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Ryo Tanaka, Yuki Ohuchi, Katsunori Ueno, Shinya Takashima
  • Publication number: 20250126863
    Abstract: Provided is a semiconductor device having a semiconductor substrate with the oxygen chemical concentration of 1×1016 atoms/cm3 or more, wherein it includes the bulk donor and an increased donor, includes a buffer region of a first conductivity type that has a doping concentration higher than that of the drift region, and has a concentration of the thermal donor that is 10% or less of a concentration of the increased donor at a same depth position throughout an entire first range from a lower end of the buffer region to the deepest peak.
    Type: Application
    Filed: December 23, 2024
    Publication date: April 17, 2025
    Inventors: Hidenori TSUJI, Shinya TAKASHIMA, Katsunori UENO, Takashi YOSHIMURA, Shuntaro YAGUCHI
  • Publication number: 20250098331
    Abstract: Provided is a wide bandgap semiconductor device having a configuration capable of detecting a temperature of a substrate with high accuracy during operation of a main transistor. The wide bandgap semiconductor device includes: a substrate mainly including a wide bandgap semiconductor; a vertical MOSFET serving as a main transistor provided in a first region of the substrate; and a lateral MOSFET for temperature detection provided in a second region of the substrate.
    Type: Application
    Filed: July 24, 2024
    Publication date: March 20, 2025
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Katsunori UENO
  • Patent number: 12237379
    Abstract: A method for manufacturing a nitride semiconductor device including: forming an N-type region in a nitride semiconductor layer; implanting ions of an acceptor element into a region under the N-type region in the nitride semiconductor layer; and forming a first P-type region under the N-type region by subjecting the nitride semiconductor layer to heat treatment and activating the acceptor element. The forming the N-type region includes implanting ions of a donor element into the nitride semiconductor layer such that concentration of the donor element in the N-type region is equal to or greater than concentration of the acceptor element in the first P-type region. The implanting ions of the acceptor element into a region under the N-type region includes implanting ions of the acceptor element such that concentration of the acceptor element in the first P-type region is 1×1019 cm?3 or more and 1×1021 cm?3 or less.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: February 25, 2025
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Ryo Tanaka, Yuki Ohuchi, Katsunori Ueno, Shinya Takashima
  • Publication number: 20240387641
    Abstract: Provided is a nitride semiconductor device including a p-type region having a high concentration, and a method of manufacturing the same. The nitride semiconductor device includes a nitride crystal layer, and a p-type region provided in the nitride crystal layer. The p-type region includes Mg at a concentration in a range of 3×1018 cm?3 or greater and 1×1021 cm?3 or less, and at least either a group-13 element or an acceptor element at a concentration in a range of 3×1017 cm?3 or greater and 5×1021 cm?3 or less.
    Type: Application
    Filed: March 15, 2024
    Publication date: November 21, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Yuki OHUCHI, Katsunori UENO, Ryo TANAKA, Shinya TAKASHIMA
  • Publication number: 20240313089
    Abstract: The nitride semiconductor device includes a field effect transistor formed in a gallium nitride layer. The field effect transistor includes: a gate insulator film formed on a side of a first principal face of the gallium nitride layer; a p type region being in contact with the gate insulator film; an n type region being in contact with the p type region in a direction parallel to an interface between the p type region and the gate insulator film; a first electrode being in contact with the n type region. The p type region includes a first region that is in contact with the gate insulator film and a second region that is in contact with the gate insulator film and lies in the first direction between the first region and the n type region. The second region has a higher concentration of p type impurities than the first region.
    Type: Application
    Filed: January 25, 2024
    Publication date: September 19, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryo TANAKA, Katsunori UENO, Shinya TAKASHIMA
  • Patent number: 12085682
    Abstract: A radiation monitoring device realizes a high measurement function. Therefore, a radiation monitoring device includes: a radiation detection unit including a phosphor that emits light by incident radiation; a photodetector that converts a single photon or a photon group having a plurality of the single photons generated by the radiation detection unit into an electric pulse signal; and an analysis unit that analyzes the electric pulse signal. The phosphor emits light based on a plurality of light emission phenomena having different decay time constants. The analysis unit includes: a signal discrimination circuit that discriminates the electric pulse signal output from the photodetector; a dose rate calculation circuit that calculates a dose rate of the radiation based on a count rate of the discriminated electric pulse signal; and an application energy calculation circuit that calculates application energy of the radiation based on a peak value of the discriminated electric pulse signal.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: September 10, 2024
    Assignee: HITACHI, LTD.
    Inventors: Shuichi Hatakeyama, Kouichi Okada, Katsunori Ueno, Takahiro Tadokoro, Yuichiro Ueno, Tooru Shibutani, Keisuke Sasaki
  • Patent number: 12009390
    Abstract: A vertical MOSFET having a compound semiconductor layer is provided, the vertical MOSFET comprising a gate electrode, a gate insulating film provided between the gate electrode and the compound semiconductor layer, a drift region provided directly in contact with at least a part of the gate insulating film and being a part of the compound semiconductor layer, and a high resistance region provided at least in the drift region, is positioned below at least a part of the gate insulating film, and has a higher resistance value per unit length than that of the drift region.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: June 11, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Katsunori Ueno
  • Publication number: 20240030322
    Abstract: A manufacturing method of a semiconductor apparatus including: setting, depending on a distribution of the carrier concentrations that the buffer region should have, a dose amount of hydrogen ions to be implanted into a plurality of depth positions corresponding to the plurality of concentration peaks; and implanting, depending on the dose amount that is set in the setting, the hydrogen ions into the semiconductor substrate is provided. In the setting, among the plurality of concentration peaks, the dose amount of the hydrogen ions for a deepest peak farthest from the lower surface of the semiconductor substrate is set depending on a carbon concentration of the semiconductor substrate, and the dose amount for at least one of the concentration peaks other than the deepest peak is set regardless of the carbon concentration of the semiconductor substrate.
    Type: Application
    Filed: June 18, 2023
    Publication date: January 25, 2024
    Inventors: Hidenori TSUJI, Katsunori UENO, Shinya TAKASHIMA, Takashi YOSHIMURA
  • Patent number: 11862686
    Abstract: A method for manufacturing a nitride semiconductor device includes: selectively ion-implanting an element that is other than p-type impurities and n-type impurities into a first region in a first primary surface of a gallium nitride layer so as to generate crystal defects in the first region; selectively ion-implanting a p-type impurity into a second region in the gallium nitride layer, the second region being shallower than the first region in a depth direction and being within the first region in a plan view; and thermally treating said gallium nitride layer that has been ion-implanted with said element and said p-type impurity so as to thermally diffuse said p-type impurity in the second region into a third region that is within the first region and that surrounds a bottom and sides of the second region.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: January 2, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Shinya Takashima, Ryo Tanaka, Katsunori Ueno
  • Patent number: 11862687
    Abstract: A nitride semiconductor device is provided, comprising: a first nitride semiconductor layer of a first conductivity-type; a second nitride semiconductor layer of a second conductivity-type provided above the first nitride semiconductor layer; a junction region of a first conductivity-type which is provided to extend in a direction from a front surface of the second nitride semiconductor layer to the first nitride semiconductor layer and has a doping concentration NJFET equal to or higher than that of the first nitride semiconductor layer; and a source region of a first conductivity-type which is provided more shallowly than the junction region and has a doping concentration equal to or higher than the doping concentration NJFET, wherein a dopant of the source region is an element with an atomic weight larger than that of a dopant in the junction region.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: January 2, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Ryo Tanaka, Shinya Takashima, Hideaki Matsuyama, Katsunori Ueno, Masaharu Edo
  • Patent number: 11837656
    Abstract: To provide a nitride semiconductor device excellent in switching characteristics. A nitride semiconductor device includes: a gallium nitride layer having a first principal surface and a second principal surface located on an opposite side to the first principal surface and having a trench formed from the first principal surface to the second principal surface side; and a field effect transistor formed in the gallium nitride layer, wherein the trench has a first side surface and a second side surface inside the trench, the first side surface is a nitrogen face in the surface layer of which nitrogen atoms are located, the second side surface is a gallium face in the surface layer of which gallium atoms are located, and the field effect transistor has: a gate insulating film formed on the first side surface; and a gate electrode formed in the trench and covering the gate insulating film.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: December 5, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Katsunori Ueno, Yuki Ohuchi
  • Publication number: 20230387292
    Abstract: A nitride semiconductor device including: a gallium nitride substrate; and a vertical MOSFET provided on the gallium nitride substrate, the vertical MOSFET including: an N-type drift region provided in the gallium nitride substrate; a P-type well region provided in the drift region; an N-type source region provided in the well region; a gate insulating film provided on a surface of the well region; and a gate electrode provided on the surface of the well region via the gate insulating film, wherein the well region includes a first well region and a second well region higher in acceptor element concentration than the first well region, the second well region being located between the first well region and the gate insulating film and being in contact with the source region.
    Type: Application
    Filed: March 8, 2023
    Publication date: November 30, 2023
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Tsurugi KONDO, Katsunori UENO, Shinya TAKASHIMA, Ryo TANAKA
  • Patent number: 11830915
    Abstract: A nitride semiconductor device includes a GaN-based semiconductor layer; and an insulating film provided on a first surface of the GaN-based semiconductor layer, the insulating film containing O atoms, and other constituent atoms other than O. An interface between the GaN-based semiconductor layer and the insulating film has a terminating species which terminates a dangling bond of a Ga atom, the terminating species has an outermost electron shell in which one electron is deficient from an allowed number of outermost electrons, and is an atom or molecule having stronger bond to the Ga atom than a H atom, an amount of Ga—O bonds is greater than an amount of bonds between the Ga atoms and the other constituent atoms.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: November 28, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yuki Ohuchi, Katsunori Ueno
  • Publication number: 20230326959
    Abstract: An impurity region of P-type that the field effect transistor of the nitride semiconductor device includes has a peak position at which concentration of P-type impurities reaches a maximum at a position located away from an interface with a gate insulating film. The impurity region has an inflection point at which concentration of the P-type impurities changes from increase to decrease toward the interface or a rate of decrease in the concentration of the P-type impurities increases toward the interface at a position located between the interface and the peak position.
    Type: Application
    Filed: February 22, 2023
    Publication date: October 12, 2023
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryo TANAKA, Shinya TAKASHIMA, Katsunori UENO
  • Patent number: 11536858
    Abstract: Provided is a radiation monitor and the like capable of appropriately measuring radiation. A radiation monitor (100) includes: radiation detection units (11, 12); optical fibers (13p, 13q) that transmit light generated by a plurality of radiation detection elements (11a, 12a) to merge; a light detection unit (14) that converts the light after merging guided to the light detection unit into an electric pulse; a measurement device (15) that calculates a dose rate of radiation based on a count rate of the electric pulses; and an analysis/display device (16). Housings (11b, 12b) include a housing (11b) made of a first material and another housing (12b) made of a second material.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: December 27, 2022
    Assignee: HITACHI, LTD.
    Inventors: Takahiro Tadokoro, Yuichiro Ueno, Katsunori Ueno, Kouichi Okada, Shuichi Hatakeyama, Yasushi Nagumo, Takahiro Itou, Yoshinobu Sakakibara
  • Patent number: 11493648
    Abstract: A radiation monitor includes a radiation detection unit detecting radiation, and an optical fiber transmitting photons emitted from a light emitting element of the radiation detection unit, wherein the radiation detection unit includes a first light emitting element generating a photon in response to incident radiation, a chemical compound part having chemical compounds which generate charged particles by nuclear reactions with incident neutrons, and a second light emitting element being located between the first light emitting element and the chemical compound part and generating a photon in response to radiation.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: November 8, 2022
    Assignee: HITACHI, LTD.
    Inventors: Takahiro Tadokoro, Yuichiro Ueno, Katsunori Ueno, Kouichi Okada, Shuichi Hatakeyama, Yasushi Nagumo, Tooru Shibutani, Keisuke Sasaki, Akira Oozone
  • Publication number: 20220285503
    Abstract: A method for manufacturing a nitride semiconductor device including: forming N-type regions in a nitride semiconductor layer; implanting ions of an acceptor element into a region sandwiched by the N-type regions in the nitride semiconductor layer; and forming a P-type region sandwiched by the N-type regions by subjecting the nitride semiconductor layer to heat treatment and activating the acceptor element. The forming the N-type regions includes implanting ions of a donor element to the nitride semiconductor layer such that concentration of the donor element in the N-type regions is equal to or greater than concentration of the acceptor element in the P-type region. The implanting ions of the acceptor element includes implanting ions of the acceptor element such that concentration of the acceptor element in the P-type region is 1×1019 cm?3 or more and 1×1021 cm?3 or less.
    Type: Application
    Filed: January 24, 2022
    Publication date: September 8, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryo TANAKA, Yuki OHUCHI, Katsunori UENO, Shinya TAKASHIMA
  • Publication number: 20220285504
    Abstract: A method for manufacturing a nitride semiconductor device including: forming an N-type region in a nitride semiconductor layer; implanting ions of an acceptor element into a region under the N-type region in the nitride semiconductor layer; and forming a first P-type region under the N-type region by subjecting the nitride semiconductor layer to heat treatment and activating the acceptor element. The forming the N-type region includes implanting ions of a donor element into the nitride semiconductor layer such that concentration of the donor element in the N-type region is equal to or greater than concentration of the acceptor element in the first P-type region. The implanting ions of the acceptor element into a region under the N-type region includes implanting ions of the acceptor element such that concentration of the acceptor element in the first P-type region is 1×1019 cm?3 or more and 1×1021 cm?3 or less.
    Type: Application
    Filed: January 25, 2022
    Publication date: September 8, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryo TANAKA, Yuki OHUCHI, Katsunori UENO, Shinya TAKASHIMA
  • Patent number: 11400315
    Abstract: A radiation monitoring device 1 includes a scintillator portion 10 which emits light whose intensity depends on a dose of incident radiation, an optical fiber 20 which transmits photons generated in the scintillator portion 10, a photoelectric converter 30 which converts photons transmitted by the optical fiber 20 to electric signals, a signal counter 40 which counts each of electric signals after being converted by the photoelectric converter 30 with a certain dead time adjusted relative to time width of an irradiation pulse of radiation, a dose calculation unit 50 which calculates a dose from a signal count value counted by the signal counter 40, and a display unit 60 which displays a result of measurement calculated by the dose calculation unit 50.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: August 2, 2022
    Assignee: HITACHI, LTD.
    Inventors: Yuichiro Ueno, Takahiro Tadokoro, Shuichi Hatakeyama, Yasushi Nagumo, Katsunori Ueno, Kouichi Okada