Abstract: The present invention provides a semiconductor device, comprising a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, and source-drain diffusion layer formed within the semiconductor substrate in the vicinity of the gate electrode. A silicide film is formed on each of the gate electrode and the source-drain diffusion layer. The silicide film positioned on the gate electrode is thicker than the silicide film positioned on the source-drain diffusion layer. The present invention also provides a method of manufacturing a semiconductor device, in which a gate electrode is formed on a gate insulating film covering a semiconductor substrate, followed by forming a source-drain diffusion layer within the semiconductor substrate.

Abstract: The invention provides a semiconductor device, and a manufacturing method, comprising a semiconductor substrate, a gate insulating film, a gate electrode, and a source-drain diffusion layer. A silicide film is formed on the gate electrode and the source-drain diffusion layer. The silicide film is thicker on the gate electrode than on the source-drain diffusion layer. The manufacturing method comprises forming a gate electrode on a gate insulating film, followed by forming a source-drain diffusion layer. Then, atoms inhibiting a silicidation are selectively introduced into the source-drain diffusion layer, and a high melting point metal film is formed on the gate electrode and the source-drain diffusion layer. The high melting point metal film is converted into silicide films selectively on the gate electrode and the source-drain diffusion layer.

Abstract: A method of manufacturing a semiconductor device including a plurality of MIS transistors formed on a semiconductor substrate, includes forming a plurality of gate electrodes associated with the MIS transistors on the semiconductor substrate, with a plurality of gate insulating films interposed between the gate electrodes and the semiconductor substrate, respectively, and successively forming a plurality of impurity diffusion regions for LDD regions in the semiconductor substrate, at decreasing junction depths, respectively, by using lithography and ion implantation, such that each of the impurity diffusion regions being provided on both sides of a respective one of the gate electrodes.

Abstract: The present invention provides a semiconductor device, comprising a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, and source-drain diffusion layer formed within the semiconductor substrate in the vicinity of the gate electrode. A silicide film is formed on each of the gate electrode and the source-drain diffusion layer. The silicide film positioned on the gate electrode is thicker than the silicide film positioned on the source-drain diffusion layer. The present invention also provides a method of manufacturing a semiconductor device, in which a gate electrode is formed on a gate insulating film covering a semiconductor substrate, followed by forming a source-drain diffusion layer within the semiconductor substrate.

Abstract: The present invention provides a semiconductor device, comprising a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, and source-drain diffusion layer formed within the semiconductor substrate in the vicinity of the gate electrode. A silicide film is formed on each of the gate electrode and the source-drain diffusion layer. The silicide film positioned on the gate electrode is thicker than the silicide film positioned on the source-drain diffusion layer. The present invention also provides a method of manufacturing a semiconductor device, in which a gate electrode is formed on a gate insulating film covering a semiconductor substrate, followed by forming a source-drain diffusion layer within the semiconductor substrate.

Abstract: Disclosed is a semiconductor device in which first and second MISFETs are formed, each of the first and second MISFETs including a source region, a drain region, a gate insulating film, a gate electrode and a covering insulating film. The source region and the drain regions are formed apart from each other within a semiconductor substrate. The gate insulating film is formed on the surface of the semiconductor substrate and positioned between the source region and the drain region, and the gate electrode is formed on the gate insulating film. The covering insulating film is formed to cover the side surface of the gate electrode, the gate insulating film and a part of the source region or the drain region. The first and second MISFETs differ from each other in the thickness of a first region of the covering insulating film positioned to cover the source region or the drain region.

Abstract: Disclosed is a semiconductor device in which first and second MISFETs are formed, each of the first and second MISFETs including a source region, a drain region, a gate insulating film, a gate electrode and a covering insulating film. The source region and the drain regions are formed apart from each other within a semiconductor substrate. The gate insulating film is formed on the surface of the semiconductor substrate and positioned between the source region and the drain region, and the gate electrode is formed on the gate insulating film. The covering insulating film is formed to cover the side surface of the gate electrode, the gate insulating film and a part of the source region or the drain region. The first and second MISFETs differ from each other in the thickness of a first region of the covering insulating film positioned to cover the source region or the drain region.

Abstract: Disclosed is a semiconductor device in which first and second MISFETs are formed, each of the first and second MISFETs including a source region, a drain region, a gate insulating film, a gate electrode and a covering insulating film. The source region and the drain regions are formed apart from each other within a semiconductor substrate. The gate insulating film is formed on the surface of the semiconductor substrate and positioned between the source region and the drain region, and the gate electrode is formed on the gate insulating film. The covering insulating film is formed to cover the side surface of the gate electrode, the gate insulating film and a part of the source region or the drain region. The first and second MISFETs differ from each other in the thickness of a first region of the covering insulating film positioned to cover the source region or the drain region.

Abstract: The present invention provides a semiconductor device, comprising a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, and source-drain diffusion layer formed within the semiconductor substrate in the vicinity of the gate electrode. A silicide film is formed on each of the gate electrode and the source-drain diffusion layer. The silicide film positioned on the gate electrode is thicker than the silicide film positioned on the source-drain diffusion layer. The present invention also provides a method of manufacturing a semiconductor device, in which a gate electrode is formed on a gate insulating film covering a semiconductor substrate, followed by forming a source-drain diffusion layer within the semiconductor substrate.