Abstract: An electroplating apparatus includes an electroplating tank having a generally flat base on which a semiconductor substrate may be placed with a surface to be electroplated oriented upwardly. A first seal seals a tank body to the flat base and a second seal seals the tank body to a peripheral portion of the surface of the semiconductor substrate. A substantially sealed volume adjacent the surface of the semiconductor substrate is produced. A gas supply tube for pressurizing the volume and an electrolyte discharge arrangement for discharging electrolyte from the volume when pressurized by a gas introduced through the gas supply tube are also provided. The discharge tube extends through a wall of the tank body to a position immediately above the surface of the semiconductor substrate within the volume.

Abstract: An apparatus for adhering a wafer to a supporting substrate includes a chamber having a lower part including a wafer stage having a planar surface on which a wafer having a surface covered with an adhesive is mounted with the adhesive facing upward, an upper part for covering the planar surface of the wafer stage, an evacuation port for evacuating the chamber, and a pressure plate opposite a supporting substrate disposed on the wafer and movable downward so that the pressure plate presses the supporting substrate toward the wafer. At least three gauge blocks having a thickness larger than that of the wafer are disposed on the planar surface of the wafer stage, surrounding a wafer and sandwiched between the supporting substrate and the planar surface when the supporting substrate is pressed toward the wafer. Heaters for heating the wafer and the supporting substrate are embedded in the lower and upper parts of the chamber.

Abstract: A semiconductor device includes a semiconductor substrate having first and second main surfaces; a function element layer having heating element portions generating heat during operation, disposed on the first main surface that is thinned; and a plated heat sink of a heat conductive material, having a thickness equal to or greater than that of the semiconductor substrate, disposed on a circumferential region of the second main surface at the perimeter of the semiconductor substrate inward, on main heat generating regions of the second main surface including regions opposite the heating element portions, and on supporting regions of the second main surface connecting the circumferential region to the main heat generating regions. The semiconductor device maintains the heat generating function and the handling performance of the plated heat sink, reduces internal stress during plating and repeated stress produced by heat cycles during fabricating processes, and lessens chip breakage and plating peeling.

Abstract: A method of producing a semiconductor chip on a chip carrier includes preparing a semiconductor chip having opposite front and rear surfaces and an active element on the front surface, applying solder to the rear surface of the semiconductor chip to a prescribed thickness, picking up the semiconductor chip with a collet with the rear surface facing away from the collet and exposing the solder layer to a reducing atmosphere to remove an oxide film on the surface of the solder layer, adhering the semiconductor chip to a chip carrier via the solder layer by applying heat and by applying pressure to the semiconductor chip with the collet, and cooling the chip carrier to room temperature while pressing the semiconductor chip against the chip carrier.

Abstract: A semiconductor device including a conductive pad and a semiconductor chip soldered to the conductive pad, the semiconductor chip including a substrate having opposite front and rear surfaces, a first electrode disposed on the front surface, a dome-shaped via-hole having an opening at the rear surface of the substrate and a bottom in contact with the first electrode, and a second electrode covering the rear surface of the substrate and the internal surface of the via-hole. The semiconductor chip is soldered to the conductive pad so that a space is formed between the internal surface of the via-hole and the solder. The space has a distance d from the bottom of the via-hole in a direction perpendicular to the front surface of the substrate represented by ##EQU1## where x is the via-hole depth, y is rupture stress of the semi-conductor substrate, E.sub.1 is Young's modulus of a semi-conductor substrate, E.sub.2 is Young's modulus of the solder, .alpha..sub.

Abstract: An electroplating apparatus includes a casing having a large opening at the bottom, a substrate being electroplated in the casing, a plating solution injector penetrating through an upper part of the casing for introducing a plating solution into the casing, an exhaust port penetrating through an upper part of the casing for draining the plating solution, a vertically movable substrate stage disposed beneath the casing for holding the substrate and having an opening smaller than the substrate, and a spin chuck for carrying the substrate to the substrate stage. In this apparatus, initially, the substrate is put on the spin chuck. Then, the substrate stage moves up and closes the casing from the bottom, and the substrate is electroplated in the casing. After the electroplating, the substrate stage moves down, and the substrate is transferred to the spin chuck. Automatic transfer of the substrate is possible using a uniaxial robot that moves only in the vertical or horizontal directions.

Abstract: A semiconductor chip includes a semiconductor substrate having opposite front and rear surfaces and an active element on the front surface and a supporting substrate supporting the semiconductor substrate and disposed on the rear surface of the semiconductor substrate. The supporting substrate includes a radiating layer for radiating heat generated by the active element and disposed on a part of the rear surface of the semiconductor substrate directly opposite said active element and a plated metal layer of Rh, Pt, or Ni-B-W having a linear thermal expansion coefficient approximately equal to that of the semiconductor substrate and disposed on part of the rear surface of the semiconductor substrate but not directly opposite the active element. In this structure, the curvature of the chip during die-bonding is reduced. The plated metal layer is produced in a relatively simple process with no difficulty in controlling the composition of a plating solution.

Abstract: An amorphous Ni-P layer which nullifies the effects of the crystallinity of a base metal layer is formed on the base metal layer in a metallic element of a field effect transistor by electroless plating. An electrolytic Au layer is deposited on the amorphous Ni-P layer. Thus, there are no luster nonuniformities in the electrolytic Au layer, whereby the position of an electrode pad or like metallic element is easily detected mechanically and automated bonding and packaging of the field effect transistor are simplified.

Abstract: A high frequency and high power semiconductor device includes a semiconductor substrate having an active element on the front surface and a radiating metal layer for radiating heat generated by the active element on the rear surface of the substrate. The radiating metal layer is disposed on a part of the rear surface of the substrate directly opposite the active element. Further, a dispersion layer having a linear expansion coefficient equal to that of the substrate material and differing from that of the radiating metal layer is disposed on the rear surface of said semiconductor substrate but not directly opposite the active element.