Patents by Inventor Katsuyoshi Komatsu

Katsuyoshi Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11985907
    Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistance effect element including first and second magnetic layers each having a fixed magnetization direction, a third magnetic layer provided between the first and second magnetic layers, and having a variable magnetization direction, a first nonmagnetic layer between the first and third magnetic layers, and a second nonmagnetic layer between the second and third magnetic layers, and a switching element connected in series to the magnetoresistance effect element, changing from an electrically nonconductive state to an electrically conductive state when a voltage applied between two terminals is higher than or equal to a threshold voltage.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: May 14, 2024
    Assignee: Kioxia Corporation
    Inventors: Shogo Itai, Tadaomi Daibou, Yuichi Ito, Katsuyoshi Komatsu
  • Patent number: 11963459
    Abstract: A switching device according to an embodiment includes a switching layer disposed between a first electrode and a second electrode. The switching layer contains a material containing a first cation element Z, Te, and N. This material contains at least 5 atomic % or more of each of Z, Te, and N, and when an atomic ratio of Te is X, an atomic ratio of N is Y, an atomic ratio of Z is W, a ratio of Z2Te3 to ZN on a straight line connecting a compound of the first cation element Z with tellurium and nitride of the first cation element Z in a ternary phase diagram of Z, Te, and N is A, and a change in an N content from the Z2Te3—ZN line is B, the material has a composition satisfying X=1.2 (1?A) (0.5+B), Y=A (0.5+B), and W=1?X?Y, where ?0.06?B?0.06 is satisfied when ?>A and ¾<A, and ?0.06?B and Y?0.45 are satisfied when ??A?¾.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: April 16, 2024
    Assignee: Kioxia Corporation
    Inventors: Hiroshi Takehira, Katsuyoshi Komatsu, Tadaomi Daibou, Hiroki Kawai, Yuichi Ito
  • Publication number: 20240114811
    Abstract: According to one embodiment, a nonvolatile semiconductor memory includes a first electrode and a second electrode spaced from the first electrode. A memory element and a switching element are disposed between the first electrode and the second electrode. The switching element includes a tunnel insulating film enabling carrier tunneling, and the tunnel insulating film includes yttrium and oxygen and at least one of tantalum, titanium, and zirconium Ti, and Zr.
    Type: Application
    Filed: September 1, 2023
    Publication date: April 4, 2024
    Inventors: Jieqiong ZHANG, Katsuyoshi KOMATSU, Tadaomi DAIBOU, Yosuke MATSUSHIMA
  • Publication number: 20240099153
    Abstract: A storage device includes a first conductive layer, a second conductive layer, a third conductive layer, a variable resistance layer disposed between the first conductive layer and the second conductive layer, and a switching layer disposed between the second conductive layer and the third conductive layer. The second conductive layer is disposed between the first conductive layer and the third conductive layer. The switching layer includes a first area, a second area, and a third area disposed between the first area and the second area. The first area includes a first element selected from Sn, Ga, Zn, Ta, Ti, and In, and O or N. The second area includes a second element selected from Sn, Ga, Zn, Ta, Ti, and In, and O or N. The third area includes a third element selected from Zr, Y, Ce, Hf, Al, Mg, and Nb, O or N, and a metal element selected from Te, Sb, Bi, Ti, and Zn.
    Type: Application
    Filed: August 24, 2023
    Publication date: March 21, 2024
    Inventors: Takeshi IWASAKI, Zhu QI, Katsuyoshi KOMATSU, Jieqiong ZHANG
  • Publication number: 20240099020
    Abstract: According to one embodiment, memory device includes a first, second, and third conductive layers in this order, a resistance change layer between the first and the second conductive layers, and a switching layer between the second and the third conductive layers. The switching layer contains: at least one first substance from a group consisting of oxide of at least one element from a group consisting of Cr, La, Ce, Y, Sc, Zr, and Hf, nitride of the at least one element, and oxynitride of the at least one element; a second substance being at least one metal from a group consisting of Te, Se, Sb, Bi, Ge, and Sn; and at least one third substance from a group consisting of oxide of the second substance, nitride of the second substance, and oxynitride of the second substance.
    Type: Application
    Filed: June 30, 2023
    Publication date: March 21, 2024
    Applicant: Kioxia Corporation
    Inventors: Takeshi IWASAKI, Yosuke MATSUSHIMA, Katsuyoshi KOMATSU
  • Publication number: 20230301118
    Abstract: A semiconductor memory device includes a first wiring extending in a first direction; a second wiring extending in a second direction and spaced from the first wiring in a third direction; a stacked body disposed between the first and second wirings and including conductive layers and insulating layers alternately stacked on top of one another in the third direction; a columnar body extending through the stacked body and including: (a) an electrode disposed between the first wiring and the second wiring, (b) a memory layer disposed between the electrode and the conductive layers, and (c) a selection layer disposed between the electrode and the first wiring; and a diode disposed between the electrode and the second wiring.
    Type: Application
    Filed: September 1, 2022
    Publication date: September 21, 2023
    Applicant: Kioxia Corporation
    Inventors: Katsuyoshi KOMATSU, Hiroki TOKUHIRA, Hiroshi TAKEHIRA, Hiroyuki ODE, Jieqiong ZHANG
  • Patent number: 11678593
    Abstract: A semiconductor memory device includes a first electrode and a second electrode, a phase change layer disposed between the first electrode and the second electrode, and a first layer disposed between the first electrode and the phase change layer. The phase change layer contains at least one of germanium (Ge), antimony (Sb), and tellurium (Te). The first layer contains aluminum (Al) and antimony (Sb), or tellurium (Te) and at least one of zinc (Zn), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu).
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: June 13, 2023
    Assignee: Kioxia Corporation
    Inventors: Katsuyoshi Komatsu, Takeshi Iwasaki, Tadaomi Daibou, Hiroki Kawai
  • Publication number: 20230085722
    Abstract: A semiconductor storage device including a phase change memory film having a composition containing at least Ge, Sb, Te, and Se, and containing Se as a design composition ratio to Te in a composition ratio showing a phase change memory property with at least three elements Ge, Sb, and Te. The composition ratio of Se is 33.6 atom % or less.
    Type: Application
    Filed: March 4, 2022
    Publication date: March 23, 2023
    Inventors: Jieqiong ZHANG, Katsuyoshi KOMATSU, Tadaomi DAIBOU, Takeshi IWASAKI, Hiroki TOKUHIRA, Hiroki KAWAI, Hiroshi TAKEHIRA
  • Publication number: 20230085635
    Abstract: A resistance change device of an embodiment includes a first electrode, a second electrode, and a layer disposed between the first electrode and the second electrode and containing a resistance change material. In the resistance change device of the embodiment, the resistance change material contains: a first element including Sb and Te; a second element including at least one element selected from the group consisting of Ge and In; a third element including at least one element selected from the group consisting of Si, N, B, C, Al, and Ti; and a fourth element including at least one element selected from the group consisting of Sc, Y, La, Gd, Zr, and Hf.
    Type: Application
    Filed: March 7, 2022
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Hiroki KAWAI, Kasumi YASUDA, Hiroki TOKUHIRA, Kazuhiro KATONO, Akifumi GAWASE, Katsuyoshi KOMATSU, Tadaomi DAIBOU
  • Patent number: 11600772
    Abstract: A resistance variable device of an embodiment includes a stack arranged between a first electrode and a second electrode and including a resistance variable layer and a chalcogen-containing layer. The chalcogen-containing layer contains a material having a composition represented by a general formula: C1xC2yAz, where C1 is at least one element selected from Sc, Y, Zr, and Hf, C2 is at least one element selected from C, Si, Ge, B, Al, Ga, and In, A is at least one element selected from S, Se, and Te, and x, y, and z are numbers representing atomic ratios satisfying 0<x<1, 0<y<1, 0<z<1, and x+y+z=1, and when an oxidation number of the element C1 is set to a, and an oxidation number of the element C2 is set to b, the atomic ratio x of the element C1 satisfies x?(3?(3+b)×y?z)/(3+a).
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: March 7, 2023
    Assignee: Kioxia Corporation
    Inventors: Hiroki Kawai, Katsuyoshi Komatsu, Tadaomi Daibou, Hiroki Tokuhira, Masatoshi Yoshikawa, Yuichi Ito
  • Publication number: 20220238801
    Abstract: A semiconductor memory device includes a first electrode and a second electrode, a phase change layer disposed between the first electrode and the second electrode, and a first layer disposed between the first electrode and the phase change layer. The phase change layer contains at least one of germanium (Ge), antimony (Sb), and tellurium (Te). The first layer contains aluminum (Al) and antimony (Sb), or tellurium (Te) and at least one of zinc (Zn), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu).
    Type: Application
    Filed: August 12, 2021
    Publication date: July 28, 2022
    Applicant: Kioxia Corporation
    Inventors: Katsuyoshi KOMATSU, Takeshi IWASAKI, Tadaomi DAIBOU, Hiroki KAWAI
  • Publication number: 20220093851
    Abstract: A switching device according to an embodiment includes a switching layer disposed between a first electrode and a second electrode. The switching layer contains a material containing a first cation element Z, Te, and N. This material contains at least 5 atomic % or more of each of Z, Te, and N, and when an atomic ratio of Te is X, an atomic ratio of N is Y, an atomic ratio of Z is W, a ratio of Z2Te3 to ZN on a straight line connecting a compound of the first cation element Z with tellurium and nitride of the first cation element Z in a ternary phase diagram of Z, Te, and N is A, and a change in an N content from the Z2Te3-ZN line is B, the material has a composition satisfying X=1.2 (1?A) (0.5+B), Y=A (0.5+B), and W=1?X?Y, where ?0.06?B?0.06 is satisfied when ?>A and ¾<A, and ?0.06?B and Y?0.45 are satisfied when ??A?¾.
    Type: Application
    Filed: September 8, 2021
    Publication date: March 24, 2022
    Applicant: Kioxia Corporation
    Inventors: Hiroshi TAKEHIRA, Katsuyoshi KOMATSU, Tadaomi DAIBOU, Hiroki KAWAI, Yuichi ITO
  • Publication number: 20220083849
    Abstract: A switching circuit includes: a first circuit including a first capacitor, a first resistor, and a first selector above the first capacitor and resistor; and a second circuit including a second capacitor, a second resistor, and a second selector above the second capacitor and resistor. The capacitors have: a first and a second lower electrode on a semiconductor substrate; a dielectric layer on the lower electrodes; a resistive layer on the dielectric layer to form the resistors with the dielectric layer; a first upper electrode on the resistive layer opposite to the first lower electrode to form the first capacitor with the first lower electrode; and a second upper electrode on the resistive layer opposite to the second lower electrode to form the second capacitor with the second lower electrode.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Katsuyoshi KOMATSU, Kenichi MUROOKA, Tadaomi DAIBOU, Yuichi ITO
  • Publication number: 20220085277
    Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistance effect element including first and second magnetic layers each having a fixed magnetization direction, a third magnetic layer provided between the first and second magnetic layers, and having a variable magnetization direction, a first nonmagnetic layer between the first and third magnetic layers, and a second nonmagnetic layer between the second and third magnetic layers, and a switching element connected in series to the magnetoresistance effect element, changing from an electrically nonconductive state to an electrically conductive state when a voltage applied between two terminals is higher than or equal to a threshold voltage.
    Type: Application
    Filed: March 15, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Shogo ITAI, Tadaomi DAIBOU, Yuichi ITO, Katsuyoshi KOMATSU
  • Publication number: 20210296585
    Abstract: A switching device in an embodiment includes: a first electrode; a second electrode, and a switching layer disposed between the first electrode and the second electrode. The switching layer is made of a material containing hafnium nitride. Otherwise, the switching layer is made of a material containing bismuth and at least one selected from the group consisting of silicon oxide, aluminum oxide, zirconium oxide, and gallium oxide, or a material containing at least one selected from the group consisting of bismuth oxide, bismuth nitride, bismuth boride, and bismuth sulfide.
    Type: Application
    Filed: September 14, 2020
    Publication date: September 23, 2021
    Applicant: Kioxia Corporation
    Inventors: Tadaomi DAIBOU, Hiroki KAWAI, Katsuyoshi KOMATSU, Weidong LI, Shogo ITAI, Kouji MATSUO
  • Patent number: 11081525
    Abstract: A storage device includes a first conductor, a second conductor, a variable resistance layer, a first portion, and a second portion. The variable resistance layer connects with the first conductor or the second conductor. The first portion is provided between the first conductor and the second conductor, and has a first threshold voltage value at which the resistance value changes. The second portion is provided between the first conductor and the first portion and/or between the second conductor and the first portion, and has a second threshold voltage value at which the resistance value changes and which is higher than the first threshold voltage value.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: August 3, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takeshi Iwasaki, Katsuyoshi Komatsu, Hiroki Kawai
  • Publication number: 20210202838
    Abstract: A resistance variable device of an embodiment includes a stack arranged between a first electrode and a second electrode and including a resistance variable layer and a chalcogen-containing layer. The chalcogen-containing layer contains a material having a composition represented by a general formula: C1xC2yAz, where C1 is at least one element selected from Sc, Y, Zr, and Hf, C2 is at least one element selected from C, Si, Ge, B, Al, Ga, and In, A is at least one element selected from S, Se, and Te, and x, y, and z are numbers representing atomic ratios satisfying 0<x<1, 0<y<1, 0<z<1, and x+y+z=1, and when an oxidation number of the element C1 is set to a, and an oxidation number of the element C2 is set to b, the atomic ratio x of the element C2 satisfies x?(3?(3+b)×y?z)/(3+a).
    Type: Application
    Filed: September 8, 2020
    Publication date: July 1, 2021
    Applicant: Kioxia Corporation
    Inventors: Hiroki KAWAI, Katsuyoshi KOMATSU, Tadaomi DAIBOU, Hiroki TOKUHIRA, Masatoshi YOSHIKAWA, Yuichi ITO
  • Patent number: 10916698
    Abstract: A semiconductor storage device is disclosed. The device includes: a first conductive layer; a second conductive layer apart from the first conductive layer in a first direction; a variable resistance layer provided between the first conductive layer and the second conductive layer; a third conductive layer provided between the first conductive layer and the variable resistance layer; a nonlinear layer provided between the first conductive layer and the third conductive layer; and a first insulating layer provided at least between the first conductive layer and the nonlinear layer or between the third conductive layer and the nonlinear layer. The first insulating layer includes nitrogen (N) and boron (B).
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: February 9, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Katsuyoshi Komatsu, Takeshi Iwasaki
  • Patent number: 10892300
    Abstract: A storage device according to embodiments includes a first conductive layer; a second conductive layer; a resistance change element provided between the first conductive layer and the second conductive layer; and an intermediate layer provided in any one of a position between the resistance change element and the first conductive layer and a position between the resistance change element and the second conductive layer, the intermediate layer containing at least one element of silicon (Si) and germanium (Ge), tellurium (Te), and aluminum (Al).
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: January 12, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Takanori Usami, Takeshi Ishizaki, Ryohei Kitao, Katsuyoshi Komatsu, Takeshi Iwasaki, Atsuko Sakata
  • Publication number: 20200295086
    Abstract: A storage device includes a first conductor, a second conductor, a variable resistance layer, a first portion, and a second portion. The variable resistance layer connects with the first conductor or the second conductor. The first portion is provided between the first conductor and the second conductor, and has a first threshold voltage value at which the resistance value changes. The second portion is provided between the first conductor and the first portion and/or between the second conductor and the first portion, and has a second threshold voltage value at which the resistance value changes and which is higher than the first threshold voltage value.
    Type: Application
    Filed: August 28, 2019
    Publication date: September 17, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takeshi IWASAKI, Katsuyoshi KOMATSU, Hiroki KAWAI