Patents by Inventor Katsuyoshi Matsuura

Katsuyoshi Matsuura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040166596
    Abstract: There are provided a step of forming an insulating film over a semiconductor substrate, a step of exciting a plasma of a gas having a molecular structure in which hydrogen and nitrogen are bonded and then irradiating the plasma onto the insulating film, a step of forming a self-orientation layer made of substance having a self-orientation characteristic on the insulating film, and a step of forming a first conductive film made of conductive substance having the self-orientation characteristic on the self-orientation layer.
    Type: Application
    Filed: October 29, 2003
    Publication date: August 26, 2004
    Inventors: Naoya Sashida, Katsuyoshi Matsuura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Patent number: 6777287
    Abstract: A ferroelectric random access memory has a ferroelectric capacitor formed of a stacking of a lower electrode, a PZT film and an upper electrode of SrRuO3, wherein the PZT film includes pinholes, with a pinhole density of about 17 &mgr;m2 or less.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: August 17, 2004
    Assignee: Fujitsu Limited
    Inventors: Soichiro Ozawa, Shan Sun, Hideyuki Noshiro, George Hickert, Katsuyoshi Matsuura, Fan Chu, Takeyasu Saito
  • Patent number: 6740533
    Abstract: A semiconductor device has a ferroelectric capacitor including a ferroelectric film provided on a lower electrode and an upper electrode provided on the ferroelectric film, wherein the upper electrode is formed of a first layer of a non-stoichiometric oxide and a second layer of a non-stoichiometric or stoichiometric oxide provided on the first layer, the second oxide having a composition closer to the stoichiometric composition as compared with the first layer.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: May 25, 2004
    Assignee: Fujitsu Limited
    Inventors: Tomohiro Takamatsu, Ko Nakamura, Katsuyoshi Matsuura
  • Patent number: 6674633
    Abstract: A method for the fabrication of a cap layer on a top electrode layer of a ferroelectric capacitor includes the steps of depositing an amorphous layer, usually made of Sr(x)Ru(y)O3, on the top electrode and then annealing the amorphous layer in two stages in order convert the amorphous layer into the cap layer. The first anneal is performed at 500° C. to 700° C. in a non-oxidizing atmosphere, such as nitrogen, and converts the amorphous layer into a crystallized layer of Sr(x)Ru(y)O3. The second anneal is performed at 300° C. to 500° C. in an oxidizing atmosphere, such as oxygen, and converts the crystallized layer into the cap layer. The method is applied to the formation of a ferroelectric capacitor element of an integrated semiconductor device.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: January 6, 2004
    Assignee: Fujitsu Limited
    Inventors: Shan Sun, George Hickert, Katsuyoshi Matsuura, Takeyasu Saito, Soichiro Ozawa, Naoyuki Satoh, Mitsushi Fujiki, Satoru Mihara, Jeffrey S. Cross, Yoshimasa Horii
  • Publication number: 20030230773
    Abstract: A ferroelectric capacitor having a ferroelectric layer and a pair of electrodes, in which the ferroelectric layer contains carbon or carbon atoms of 5×1018cm−3 or less, and the pair of electrodes is formed by a MOCVD (Metal Organic Chemical Vapor Deposition) method. A process for manufacturing a ferroelectric capacitor having the steps of forming a ferroelectric layer on one of a pair of electrodes; heating the layer at a temperature higher than when forming the layer, and to form the other electrode on the ferroelectric layer, or the steps of forming a ferroelectric layer on one of a pair of electrodes; forming the other electrode on the ferroelectric layer; and heating the layer at a temperature higher than when forming the layer to form the other electrode on the ferroelectric layer, to control carbon atoms of the ferroelectric layer to be 5×1018cm.
    Type: Application
    Filed: February 21, 2003
    Publication date: December 18, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yoshimasa Horii, Osamu Matsuura, Katsuyoshi Matsuura, Kazuaki Takai
  • Publication number: 20030213986
    Abstract: A semiconductor device has a ferroelectric capacitor including a ferroelectric film provided on a lower electrode and an upper electrode provided on the ferroelectric film, wherein the upper electrode is formed of a first layer of a non-stoichiometric oxide and a second layer of a non-stoichiometric or stoichiometric oxide provided on the first layer, the second oxide having a composition closer to the stoichiometric composition as compared with the first layer.
    Type: Application
    Filed: June 20, 2003
    Publication date: November 20, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Tomohiro Takamatsu, Ko Nakamura, Katsuyoshi Matsuura
  • Publication number: 20030205743
    Abstract: A ferroelectric random access memory has a ferroelectric capacitor formed of a stacking of a lower electrode, a PZT film and an upper electrode of SrRuO3, wherein the PZT film includes pinholes, with a pinhole density of about 17 &mgr;m2 or less.
    Type: Application
    Filed: May 23, 2003
    Publication date: November 6, 2003
    Inventors: Soichiro Ozawa, Shan Sun, Hideyuki Noshiro, George Hickert, Katsuyoshi Matsuura, Fan Chu, Takeyasu Saito
  • Patent number: 6624458
    Abstract: A semiconductor device has a ferroelectric capacitor including a ferroelectric film provided on a lower electrode and an upper electrode provided on the ferroelectric film, wherein the upper electrode is formed of a first layer of a non-stoichiometric oxide and a second layer of a non-stoichiometric or stoichiometric oxide provided on the first layer, the second oxide having a composition closer to the stoichiometric composition as compared with the first layer.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: September 23, 2003
    Assignee: Fujitsu Limited
    Inventors: Tomohiro Takamatsu, Ko Nakamura, Katsuyoshi Matsuura
  • Patent number: 6617626
    Abstract: A ferroelectric random access memory has a ferroelectric capacitor formed of a stacking of a lower electrode, a PZT film and an upper electrode of SrRuO3, wherein the PZT film includes pinholes, with a pinhole density of about 17/&mgr;m2 or less.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: September 9, 2003
    Assignee: Fujitsu Limited
    Inventors: Soichiro Ozawa, Shan Sun, Hideyuki Noshiro, George Hickert, Katsuyoshi Matsuura, Fan Chu, Takeyasu Saito
  • Publication number: 20020185668
    Abstract: A semiconductor device has a ferroelectric capacitor including a ferroelectric film provided on a lower electrode and an upper electrode provided on the ferroelectric film, wherein the upper electrode is formed of a first layer of a non-stoichiometric oxide and a second layer of a non-stoichiometric or stoichiometric oxide provided on the first layer, the second oxide having a composition closer to the stoichiometric composition as compared with the first layer.
    Type: Application
    Filed: September 26, 2001
    Publication date: December 12, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Tomohiro Takamatsu, Ko Nakamura, Katsuyoshi Matsuura
  • Publication number: 20020177243
    Abstract: A method of fabricating a semiconductor device having a ferroelectric capacitor includes the steps of forming a lower electrode layer of the ferroelectric capacitor on an insulation film covering an active device element, forming a ferroelectric film on the lower electrode layer as a capacitor insulation film, crystallizing the ferroelectric film by applying a thermal annealing process in an atmosphere containing a non-oxidizing gas and an oxidizing gas, and forming an upper electrode layer on the ferroelectric film.
    Type: Application
    Filed: April 17, 2000
    Publication date: November 28, 2002
    Inventors: Katsuyoshi Matsuura, Mari Tani, Yoshimasa Horii, Fan Chu, Glen R. Fox, Brian Eastep
  • Publication number: 20020158278
    Abstract: A ferroelectric random access memory has a ferroelectric capacitor formed of a stacking of a lower electrode, a PZT film and an upper electrode of SrRuO3, wherein the PZT film includes pinholes, with a pinhole density of about 17/&mgr;m2 or less.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 31, 2002
    Inventors: Soichiro Ozawa, Shan Sun, Hideyuki Noshiro, George Hickert, Katsuyoshi Matsuura, Fan Chu, Takeyasu Saito
  • Publication number: 20020149040
    Abstract: A method for the fabrication of a cap layer on a top electrode layer of a ferroelectric capacitor includes the steps of depositing an amorphous layer, usually made of Sr(x)Ru(y)O3, on the top electrode and then annealing the amorphous layer in two stages in order convert the amorphous layer into the cap layer. The first anneal is performed at 500° C. to 700° C. in a non-oxidizing atmosphere, such as nitrogen, and converts the amorphous layer into a crystallized layer of Sr(x)Ru(y)O3. The second anneal is performed at 300° C. to 500° C. in an oxidizing atmosphere, such as oxygen, and converts the crystallized layer into the cap layer. The method is applied to the formation of a ferroelectric capacitor element of an integrated semiconductor device.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 17, 2002
    Inventors: Shan Sun, George Hickert, Katsuyoshi Matsuura, Takeyasu Saito, Soichiro Ozawa, Naoyuki Satoh, Mitsushi Fujiki, Satoru Mihara, Jeffrey S. Cross, Yoshimasa Horii
  • Publication number: 20020142489
    Abstract: A method of fabricating a semiconductor device having a ferroelectric capacitor includes the steps of forming a lower electrode layer of the ferroelectric capacitor on an insulation film covering an active device element, forming a ferroelectric film on the lower electrode layer as a capacitor insulation film, crystallizing the ferroelectric film by applying a thermal annealing process in an atmosphere containing a non-oxidizing gas and an oxidizing gas, and forming an upper electrode layer on the ferroelectric film.
    Type: Application
    Filed: January 4, 2002
    Publication date: October 3, 2002
    Inventors: Katsuyoshi Matsuura, Mari Tani, Yoshimasa Horii, Fan Chu, Glen R. Fox, Brian Eastep
  • Patent number: 5609721
    Abstract: An apparatus and method for manufacturing a semiconductor device includes a reaction chamber adapted to exhaust gas therefrom, and a cleaning gas supplying system for introducing cleaning gas containing ClF.sub.3 into the reaction chamber, the system having a plurality of gas blowout holes formed in the flow direction of gas at least in the reaction chamber. The reaction chamber may be a tubular chamber, and the cleaning gas supplying system may be a tube extending from one end to the other end of the reaction chamber along the inner wall or the central axis of the reaction chamber, a plurality of through holes being formed in the side wall of the tube. Damages to the inner surface of the reaction chamber of the semiconductor device manufacturing apparatus can be suppressed and a film attached to the inner wall of the reaction chamber can be removed in a short time.
    Type: Grant
    Filed: January 3, 1995
    Date of Patent: March 11, 1997
    Assignee: Fujitsu Limited
    Inventors: Atsuhiro Tsukune, Kiyokatsu Suzuki, Katsuyoshi Matsuura, Fumitake Mieno, Hirokazu Yamanishi