Abstract: A method and an apparatus are disclosed for enhancing the solution diffusibility of a developing liquid in a semiconductor wafer developing unit through the agitation of the liquid by acoustic power. Two embodiments are described using sonic and ultrasonic waves. In the first embodiment, a sonic wave couples into the developing liquid, agitating it and thereby enhancing its solution diffusibility. In the second embodiment, an ultrasonic wave couples into the semiconductor wafer, causing the photoresist pattern to vibrate, again enhancing the solution diffusibility of the developing liquid.

Abstract: A method and an apparatus are disclosed for enhancing the solution diffusibility of a developing liquid in a semiconductor wafer developing unit through the agitation of the liquid by acoustic power. Two embodiments are described using sonic and ultrasonic waves. In the first embodiment, a sonic wave couples into the developing liquid, agitating it and thereby enhancing its solution diffusibility. In the second embodiment, an ultrasonic wave couples into the semiconductor wafer, causing the photoresist pattern to vibrate, again enhancing the solution diffusibility of the developing liquid.

Abstract: A method is disclosed to improve the planarization of a coating upon a substrate, in particular to improve the planarization of a photoresist or spin-on-glass coating upon a semiconductor wafer. This is achieved by coupling an ultrasonic wave generator to either the chuck or the spindle of the chuck. Ultrasonic waves emanating from the ultrasonic generator are induced into the coating, vibrating it. The vibration causes coating material to fill in the valleys of the coating, thus planarizing the surface of the coating.

Abstract: A method and apparatus for curing a photoresist that is deposited in liquid form and spun on a surface of a wafer leaving a thin film to be cured. This invention teaches methods for curing the resist with improved thickness control using front side heating.

Abstract: A test apparatus and method for testing integrated circuit modules permitting visual observation of both top and bottom of the module under test. The test apparatus uses a first circuit board and a second circuit board interconnected by means of cables between cable sockets attached to each circuit board. The first circuit board has a display opening. An integrated circuit socket having a center opening is attached to the first circuit board so that the center opening of the integrated circuit socket is directly over the display opening of the first circuit board. Input connectors and jumper sockets attached to the second circuit board permit electrical signals to be connected to the integrated circuit socket contacts. Integrated circuit modules inserted into the integrated circuit socket can be visually observed directly or through the display opening in the first circuit board.