Patents by Inventor Kayo KUMAKURA

Kayo KUMAKURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11856836
    Abstract: A high-yield fabricating method of a semiconductor device including a peeling step is provided. A peeling method includes a step of stacking and forming a first material layer and a second material layer over a substrate and a step of separating the first material layer and the second material layer from each other. The second material layer is formed over the substrate with the first material layer therebetween. The first material layer includes a first compound layer in contact with the second material layer and a second compound layer positioned closer to the substrate side than the first compound layer is. The first compound layer has the highest oxygen content among the layers included in the first material layer. The second compound layer has the highest nitrogen content among the layers included in the first material layer. The second material layer includes a resin.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: December 26, 2023
    Inventors: Seiji Yasumoto, Kayo Kumakura, Yuka Sato, Satoru Idojiri, Hiroki Adachi, Kenichi Okazaki
  • Patent number: 11616206
    Abstract: The yield of a separation process is improved. The mass productivity of a display device which is formed through a separation process is improved. A layer is formed over a substrate with use of a material including a resin or a resin precursor. Next, a resin layer is formed by performing heat treatment on the layer. Next, a layer to be separated is formed over the resin layer. Then, the layer to be separated and the substrate are separated from each other. The heat treatment is performed in an atmosphere containing oxygen or while supplying a gas containing oxygen.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: March 28, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masakatsu Ohno, Kayo Kumakura, Hiroyuki Watanabe, Seiji Yasumoto, Satoru Idojiri, Hiroki Adachi
  • Patent number: 11232944
    Abstract: A method of fabricating a semiconductor device, which includes a separation step and has a high yield, is provided. A metal layer is formed over a substrate, fluorine is supplied to the metal layer, and the metal layer is then oxidized, whereby a metal compound layer is formed. A functional layer is formed over the metal compound layer, heat treatment is performed on the metal compound layer, and the functional layer is separated from the substrate with use of the metal compound layer. By performing first plasma treatment using a gas containing fluorine, fluorine can be supplied to the metal layer. By performing second plasma treatment using a gas containing oxygen, the metal layer supplied with fluorine can be oxidized.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: January 25, 2022
    Inventors: Masataka Sato, Kayo Kumakura, Seiji Yasumoto, Satoru Idojiri
  • Publication number: 20220013754
    Abstract: A high-yield fabricating method of a semiconductor device including a peeling step is provided. A peeling method includes a step of stacking and forming a first material layer and a second material layer over a substrate and a step of separating the first material layer and the second material layer from each other. The second material layer is formed over the substrate with the first material layer therebetween. The first material layer includes a first compound layer in contact with the second material layer and a second compound layer positioned closer to the substrate side than the first compound layer is. The first compound layer has the highest oxygen content among the layers included in the first material layer. The second compound layer has the highest nitrogen content among the layers included in the first material layer. The second material layer includes a resin.
    Type: Application
    Filed: September 20, 2021
    Publication date: January 13, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiji Yasumoto, Kayo KUMAKURA, Yuka SATO, Satoru IDOJIRI, Hiroki ADACHI, Kenichi OKAZAKI
  • Patent number: 11133491
    Abstract: A high-yield fabricating method of a semiconductor device including a peeling step is provided. A peeling method includes a step of stacking and forming a first material layer and a second material layer over a substrate and a step of separating the first material layer and the second material layer from each other. The second material layer is formed over the substrate with the first material layer therebetween. The first material layer includes a first compound layer in contact with the second material layer and a second compound layer positioned closer to the substrate side than the first compound layer is. The first compound layer has the highest oxygen content among the layers included in the first material layer. The second compound layer has the highest nitrogen content among the layers included in the first material layer. The second material layer includes a resin.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: September 28, 2021
    Inventors: Seiji Yasumoto, Kayo Kumakura, Yuka Sato, Satoru Idojiri, Hiroki Adachi, Kenichi Okazaki
  • Publication number: 20210175447
    Abstract: The yield of a separation process is improved. The mass productivity of a display device which is formed through a separation process is improved. A layer is formed over a substrate with use of a material including a resin or a resin precursor. Next, a resin layer is formed by performing heat treatment on the layer. Next, a layer to be separated is formed over the resin layer. Then, the layer to be separated and the substrate are separated from each other. The heat treatment is performed in an atmosphere containing oxygen or while supplying a gas containing oxygen.
    Type: Application
    Filed: February 17, 2021
    Publication date: June 10, 2021
    Inventors: Masakatsu OHNO, Kayo KUMAKURA, Hiroyuki WATANABE, Seiji YASUMOTO, Satoru IDOJIRI, Hiroki ADACHI
  • Patent number: 10930870
    Abstract: The yield of a separation process is improved. The mass productivity of a display device which is formed through a separation process is improved. A layer is formed over a substrate with use of a material including a resin or a resin precursor. Next, a resin layer is formed by performing heat treatment on the layer. Next, a layer to be separated is formed over the resin layer. Then, the layer to be separated and the substrate are separated from each other. The heat treatment is performed in an atmosphere containing oxygen or while supplying a gas containing oxygen.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: February 23, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masakatsu Ohno, Kayo Kumakura, Hiroyuki Watanabe, Seiji Yasumoto, Satoru Idojiri, Hiroki Adachi
  • Patent number: 10923350
    Abstract: The yield of a manufacturing process of a semiconductor device is increased. The mass productivity of a semiconductor device is increased. A semiconductor device is manufactured by forming a first material layer over a substrate; forming a second material layer over the first material layer; and separating the first material layer and the second material layer from each other; and heating the first material layer and the second material layer that are stacked before the separation. The first material layer includes a gas containing hydrogen, oxygen, or hydrogen and oxygen (e.g., water) in a metal oxide, for example. The second material layer includes a resin. The first material layer and the second material layer are separated from each other by a break of a hydrogen bond. Specifically water is separated out at the interface or near the interface, and then adhesion is reduced due to the water present.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: February 16, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masataka Sato, Seiji Yasumoto, Kayo Kumakura, Satoru Idojiri
  • Publication number: 20200388776
    Abstract: A method of fabricating a semiconductor device, which includes a separation step and has a high yield, is provided. A metal layer is formed over a substrate, fluorine is supplied to the metal layer, and the metal layer is then oxidized, whereby a metal compound layer is formed. A functional layer is formed over the metal compound layer, heat treatment is performed on the metal compound layer, and the functional layer is separated from the substrate with use of the metal compound layer. By performing first plasma treatment using a gas containing fluorine, fluorine can be supplied to the metal layer. By performing second plasma treatment using a gas containing oxygen, the metal layer supplied with fluorine can be oxidized.
    Type: Application
    Filed: December 3, 2018
    Publication date: December 10, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masataka SATO, Kayo KUMAKURA, Seiji YASUMOTO, Satoru IDOJIRI
  • Publication number: 20200235323
    Abstract: The yield of a separation process is improved. The mass productivity of a display device which is formed through a separation process is improved. A layer is formed over a substrate with use of a material including a resin or a resin precursor. Next, a resin layer is formed by performing heat treatment on the layer. Next, a layer to be separated is formed over the resin layer. Then, the layer to be separated and the substrate are separated from each other. The heat treatment is performed in an atmosphere containing oxygen or while supplying a gas containing oxygen.
    Type: Application
    Filed: April 8, 2020
    Publication date: July 23, 2020
    Inventors: Masakatsu OHNO, Kayo KUMAKURA, Hiroyuki WATANABE, Seiji YASUMOTO, Satoru IDOJIRI, Hiroki ADACHI
  • Patent number: 10629831
    Abstract: The yield of a separation process is improved. The mass productivity of a display device which is formed through a separation process is improved. A layer is formed over a substrate with use of a material including a resin or a resin precursor. Next, a resin layer is formed by performing heat treatment on the layer. Next, a layer to be separated is formed over the resin layer. Then, the layer to be separated and the substrate are separated from each other. The heat treatment is performed in an atmosphere containing oxygen or while supplying a gas containing oxygen.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: April 21, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masakatsu Ohno, Kayo Kumakura, Hiroyuki Watanabe, Seiji Yasumoto, Satoru Idojiri, Hiroki Adachi
  • Publication number: 20200067027
    Abstract: A high-yield fabricating method of a semiconductor device including a peeling step is provided. A peeling method includes a step of stacking and forming a first material layer and a second material layer over a substrate and a step of separating the first material layer and the second material layer from each other. The second material layer is formed over the substrate with the first material layer therebetween. The first material layer includes a first compound layer in contact with the second material layer and a second compound layer positioned closer to the substrate side than the first compound layer is. The first compound layer has the highest oxygen content among the layers included in the first material layer. The second compound layer has the highest nitrogen content among the layers included in the first material layer. The second material layer includes a resin.
    Type: Application
    Filed: March 6, 2018
    Publication date: February 27, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiji YASUMOTO, Kayo KUMAKURA, Yuka SATO, Satoru IDOJIRI, Hiroki ADACHI, Kenichi OKAZAKI
  • Patent number: 10475820
    Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: November 12, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junpei Yanaka, Kayo Kumakura, Masataka Sato, Satoru Idojiri, Kensuke Yoshizumi, Mari Tateishi, Natsuko Takase
  • Patent number: 10442172
    Abstract: A processing apparatus of a stack is provided. The stack includes two substrates attached to each other with a gap provided between their end portions. The processing apparatus includes a fixing mechanism that fixes part of the stack, a plurality of adsorption jigs that fix an outer peripheral edge of one of the substrates of the stack, and a wedge-shaped jig that is inserted into a corner of the stack. The plurality of adsorption jigs include a mechanism that allows the adsorption jigs to move separately in a vertical direction and a horizontal direction. The processing apparatus further includes a sensor sensing a position of the gap between the end portion in the stack. A tip of the wedge-shaped jig moves along a chamfer formed on an end surface of the stack. The wedge-shaped jig is inserted into the gap between the end portions in the stack.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: October 15, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kayo Kumakura, Tomoya Aoyama, Akihiro Chida, Kohei Yokoyama, Masakatsu Ohno, Satoru Idojiri, Hisao Ikeda, Hiroki Adachi, Yoshiharu Hirakata, Shingo Eguchi, Yasuhiro Jinbo
  • Patent number: 10343191
    Abstract: An object is to eliminate a harmful effect when a film is bonded by wiping an adhering sealant (30a). Characterized is a wiping device (200) including a stage (230) that supports a sheet-like member (220), a wiping means (210) that wipes an adhering object (30a) adhering on a peripheral portion of the sheet-like member (220), a wiping cloth (241) that is attachably and detachably provided for the wiping means (210), and a solvent (261) that adheres to the wiping cloth (241), in which the wiping means (210) is provided with the wiping cloth (241), makes the solvent (261) adhere to the wiping cloth (241), and wipes the adhering object (30a), or a stack manufacturing apparatus (1000) including such a wiping device (200).
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: July 9, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masakatsu Ohno, Kayo Kumakura, Satoru Idojiri, Yoshiharu Hirakata, Kohei Yokoyama
  • Publication number: 20190035820
    Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.
    Type: Application
    Filed: September 27, 2018
    Publication date: January 31, 2019
    Inventors: Junpei YANAKA, Kayo KUMAKURA, Masataka SATO, Satoru IDOJIRI, Kensuke YOSHIZUMI, Mari TATEISHI, Natsuko TAKASE
  • Patent number: 10141526
    Abstract: A flexible device is provided. The hardness of a bonding layer of the flexible device is set to be higher than Shore D of 70, or preferably higher than or equal to Shore D of 80. The coefficient of expansion of a flexible substrate of the flexible device is set to be less than 58 ppm/° C., or preferably less than or equal to 30 ppm/° C.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: November 27, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Sakuishi, Yutaka Uchida, Hiroki Adachi, Saki Eguchi, Junpei Yanaka, Kayo Kumakura, Seiji Yasumoto, Kohei Yokoyama, Akihiro Chida
  • Patent number: 10134904
    Abstract: Provided is a flexible device with fewer defects caused by a crack or a flexible device having high productivity. A semiconductor device including: a display portion over a flexible substrate, including a transistor and a display element; a semiconductor layer surrounding the display portion; and an insulating layer over the transistor and the semiconductor layer. When seen in a direction perpendicular to a surface of the flexible substrate, an end portion of the substrate is substantially aligned with an end portion of the semiconductor layer, and an end portion of the insulating layer is positioned over the semiconductor layer.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: November 20, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Adachi, Kayo Kumakura
  • Patent number: 10096621
    Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: October 9, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junpei Yanaka, Kayo Kumakura, Masataka Sato, Satoru Idojiri, Kensuke Yoshizumi, Mari Tateishi, Natsuko Takase
  • Patent number: 10079353
    Abstract: A flexible device is provided. The hardness of a bonding layer of the flexible device is set to be higher than Shore D of 70, or preferably higher than or equal to Shore D of 80. The coefficient of expansion of a flexible substrate of the flexible device is set to be less than 58 ppm/° C., or preferably less than or equal to 30 ppm/° C.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: September 18, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Sakuishi, Yutaka Uchida, Hiroki Adachi, Saki Eguchi, Junpei Yanaka, Kayo Kumakura, Seiji Yasumoto, Kohei Yokoyama, Akihiro Chida