Patents by Inventor Kazuaki Karasawa

Kazuaki Karasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11714057
    Abstract: A gas sensor device includes a first electrode, a second electrode, and a polythiophene film which is formed between the first and second electrodes to be electrically coupled to the first and second electrodes, and to which cuprous bromide is adsorbed.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: August 1, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Satoru Momose, Michio Ushigome, Kazuaki Karasawa, Osamu Tsuboi
  • Publication number: 20210278357
    Abstract: A gas sensor device includes a first electrode, a second electrode, and a polythiophene film which is formed between the first and second electrodes to be electrically coupled to the first and second electrodes, and to which cuprous bromide is adsorbed.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 9, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Satoru Momose, Michio USHIGOME, Kazuaki Karasawa, Osamu Tsuboi
  • Patent number: 11073492
    Abstract: A sensor device includes a first electrode and a second electrode disposed over a substrate, and a sensitive film including a base film which couples the first electrode and the second electrode to each other and contains Cu and a halogen element and PEDOT/PSS which bonds to the base film.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: July 27, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Michio Ushigome, Osamu Tsuboi, Kazuaki Karasawa
  • Patent number: 10495595
    Abstract: A gas sensor device includes: a sensor film including a sensor surface and a resistance which increases with an increase in an amount of gas adsorbed on the sensor surface; a first electrode, a second electrode, and a third electrode that are electrically coupled to the sensor film; and a protective film that covers the sensor surface in a region between the first electrode and the second electrode, wherein the sensor surface is exposed in a region near the third electrode.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: December 3, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Kazuaki Karasawa, Michio Ushigome, Satoru Momose, Ryozo Takasu, Osamu Tsuboi
  • Patent number: 10481146
    Abstract: A gas sensor includes a p-type semiconductor layer in which a surface at a contacting side with detection target gas is covered with tertiary amine and two electrodes electrically coupled with each other through the p-type semiconductor layer.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: November 19, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Satoru Momose, Kazuaki Karasawa, Osamu Tsuboi
  • Patent number: 10371658
    Abstract: A gas sensor includes a p-type semiconductor layer that contains copper or silver cations and contacts with detection target gas, a first electrode that is a Schottky electrode to the p-type semiconductor layer, a high-resistance layer that is provided between the p-type semiconductor layer and the first electrode such that the p-type semiconductor layer and the first electrode partly contact with each other and has resistance higher than that of each of the p-type semiconductor layer and the first electrode, and a second electrode that is an ohmic electrode to the p-type semiconductor layer.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: August 6, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Satoru Momose, Osamu Tsuboi, Kazuaki Karasawa
  • Publication number: 20190137428
    Abstract: A sensor device includes a first electrode and a second electrode disposed over a substrate, and a sensitive film including a base film which couples the first electrode and the second electrode to each other and contains Cu and a halogen element and PEDOT/PSS which bonds to the base film.
    Type: Application
    Filed: October 25, 2018
    Publication date: May 9, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Michio USHIGOME, Osamu Tsuboi, Kazuaki Karasawa
  • Publication number: 20180313776
    Abstract: A gas sensor device includes a first electrode, a second electrode, and a polythiophene film which is formed between the first and second electrodes to be electrically coupled to the first and second electrodes, and to which cuprous bromide is adsorbed.
    Type: Application
    Filed: April 20, 2018
    Publication date: November 1, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Satoru Momose, Michio USHIGOME, Kazuaki Karasawa, Osamu Tsuboi
  • Publication number: 20170350839
    Abstract: A gas sensor includes a p-type semiconductor layer that contains copper or silver cations and contacts with detection target gas, a first electrode that is a Schottky electrode to the p-type semiconductor layer, a high-resistance layer that is provided between the p-type semiconductor layer and the first electrode such that the p-type semiconductor layer and the first electrode partly contact with each other and has resistance higher than that of each of the p-type semiconductor layer and the first electrode, and a second electrode that is an ohmic electrode to the p-type semiconductor layer.
    Type: Application
    Filed: August 22, 2017
    Publication date: December 7, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Satoru Momose, Osamu Tsuboi, Kazuaki Karasawa
  • Patent number: 9820412
    Abstract: A modular data center includes: a rack which houses an electronic device; a blower device capable of switching a flowing direction of air and configured to feed the air into the rack; a space housing a moisture absorbent; an in-rack temperature detector which detects a temperature inside the rack; a dew-point temperature detector which detects a dew-point temperature of outside air; and a controller. The controller receives signals inputted from the in-rack temperature detector and the dew-point temperature detector, and controls shutters and the blower device.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: November 14, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kazuaki Karasawa, Masatoshi Ogawa, Hiroshi Endo, Takahiro Arioka, Shigeyoshi Umemiya, Yoshio Kikuchi, Shino Tokuyo, Hiroyuki Fukuda, Masao Kondo, Hiroaki Yoshida, Ayasa So
  • Publication number: 20170299536
    Abstract: A gas analyzer including: a chamber; a first gas sensor provided in the chamber and including a first gas sensitive member; a second gas sensor provided in the chamber and including a second gas sensitive member; and a detector that detects each of resistance changes of the first and the second gas sensitive members; wherein the first gas sensitive member is an oxide semiconductor mainly composed of at least one of Sn, W, Zn and In or a semiconductor mainly composed of C, and the second gas sensitive member is mainly composed of a halide or an oxide of Cu or Ag.
    Type: Application
    Filed: March 22, 2017
    Publication date: October 19, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Osamu Tsuboi, Satoru Momose, Michio USHIGOME, Kazuaki Karasawa, Ryozo Takasu
  • Publication number: 20170254767
    Abstract: A gas sensor device includes: a sensor film including a sensor surface and a resistance which increases with an increase in an amount of gas adsorbed on the sensor surface; a first electrode, a second electrode, and a third electrode that are electrically coupled to the sensor film; and a protective film that covers the sensor surface in a region between the first electrode and the second electrode, wherein the sensor surface is exposed in a region near the third electrode.
    Type: Application
    Filed: December 15, 2016
    Publication date: September 7, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Kazuaki Karasawa, Michio USHIGOME, Satoru Momose, Ryozo Takasu, Osamu Tsuboi
  • Publication number: 20160341717
    Abstract: A gas sensor includes a p-type semiconductor layer in which a surface at a contacting side with detection target gas is covered with tertiary amine and two electrodes electrically coupled with each other through the p-type semiconductor layer.
    Type: Application
    Filed: March 15, 2016
    Publication date: November 24, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Satoru Momose, Kazuaki Karasawa, Osamu Tsuboi
  • Publication number: 20160007506
    Abstract: A modular data center includes: a rack which houses an electronic device; a blower device capable of switching a flowing direction of air and configured to feed the air into the rack; a space housing a moisture absorbent; an in-rack temperature detector which detects a temperature inside the rack; a dew-point temperature detector which detects a dew-point temperature of outside air; and a controller. The controller receives signals inputted from the in-rack temperature detector and the dew-point temperature detector, and controls shutters and the blower device.
    Type: Application
    Filed: September 18, 2015
    Publication date: January 7, 2016
    Inventors: Kazuaki Karasawa, Masatoshi OGAWA, Hiroshi ENDO, Takahiro Arioka, Shigeyoshi UMEMIYA, Yoshio Kikuchi, SHINO TOKUYO, Hiroyuki FUKUDA, Masao KONDO, Hiroaki Yoshida, Ayasa SO
  • Patent number: 7339277
    Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: March 4, 2008
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Karasawa, Kazuaki Kurihara
  • Publication number: 20050156279
    Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
    Type: Application
    Filed: February 16, 2005
    Publication date: July 21, 2005
    Applicant: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Karasawa, Kazuaki Kurihara
  • Patent number: 6873038
    Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: March 29, 2005
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Karasawa, Kazuaki Kurihara
  • Publication number: 20050062157
    Abstract: Methods and apparatus for forming solder bumps on terminal pads of a semiconductor substrate for an integrated circuit device employ a solder bump transfer plate and a mask to form solder deposits on the plate. One embodiment of the invention employs a metal mask having a plurality of through holes for forming solder deposits on the solder bump transfer plate by vapor phase deposition through the through holes each area of which increases in step wise from the first surface of the mask to the second surface opposite to the first surface, thereby preventing solder deposits in the through holes from being removed when the mask is separated from the plate.
    Type: Application
    Filed: November 4, 2004
    Publication date: March 24, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Kazuaki Karasawa, Teru Nakanishi, Toshiya Akamatsu
  • Publication number: 20040209453
    Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.
    Type: Application
    Filed: May 18, 2004
    Publication date: October 21, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Toshiya Akamatsu, Kazuaki Karasawa, Teru Nakanishi, Kozo Shimizu
  • Patent number: 6764938
    Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: July 20, 2004
    Assignee: Fujitsu Limited
    Inventors: Toshiya Akamatsu, Kazuaki Karasawa, Teru Nakanishi, Kozo Shimizu