Patents by Inventor Kazuaki Karasawa
Kazuaki Karasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11714057Abstract: A gas sensor device includes a first electrode, a second electrode, and a polythiophene film which is formed between the first and second electrodes to be electrically coupled to the first and second electrodes, and to which cuprous bromide is adsorbed.Type: GrantFiled: May 24, 2021Date of Patent: August 1, 2023Assignee: FUJITSU LIMITEDInventors: Satoru Momose, Michio Ushigome, Kazuaki Karasawa, Osamu Tsuboi
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Publication number: 20210278357Abstract: A gas sensor device includes a first electrode, a second electrode, and a polythiophene film which is formed between the first and second electrodes to be electrically coupled to the first and second electrodes, and to which cuprous bromide is adsorbed.Type: ApplicationFiled: May 24, 2021Publication date: September 9, 2021Applicant: FUJITSU LIMITEDInventors: Satoru Momose, Michio USHIGOME, Kazuaki Karasawa, Osamu Tsuboi
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Patent number: 11073492Abstract: A sensor device includes a first electrode and a second electrode disposed over a substrate, and a sensitive film including a base film which couples the first electrode and the second electrode to each other and contains Cu and a halogen element and PEDOT/PSS which bonds to the base film.Type: GrantFiled: October 25, 2018Date of Patent: July 27, 2021Assignee: FUJITSU LIMITEDInventors: Michio Ushigome, Osamu Tsuboi, Kazuaki Karasawa
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Patent number: 10495595Abstract: A gas sensor device includes: a sensor film including a sensor surface and a resistance which increases with an increase in an amount of gas adsorbed on the sensor surface; a first electrode, a second electrode, and a third electrode that are electrically coupled to the sensor film; and a protective film that covers the sensor surface in a region between the first electrode and the second electrode, wherein the sensor surface is exposed in a region near the third electrode.Type: GrantFiled: December 15, 2016Date of Patent: December 3, 2019Assignee: FUJITSU LIMITEDInventors: Kazuaki Karasawa, Michio Ushigome, Satoru Momose, Ryozo Takasu, Osamu Tsuboi
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Patent number: 10481146Abstract: A gas sensor includes a p-type semiconductor layer in which a surface at a contacting side with detection target gas is covered with tertiary amine and two electrodes electrically coupled with each other through the p-type semiconductor layer.Type: GrantFiled: March 15, 2016Date of Patent: November 19, 2019Assignee: FUJITSU LIMITEDInventors: Satoru Momose, Kazuaki Karasawa, Osamu Tsuboi
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Patent number: 10371658Abstract: A gas sensor includes a p-type semiconductor layer that contains copper or silver cations and contacts with detection target gas, a first electrode that is a Schottky electrode to the p-type semiconductor layer, a high-resistance layer that is provided between the p-type semiconductor layer and the first electrode such that the p-type semiconductor layer and the first electrode partly contact with each other and has resistance higher than that of each of the p-type semiconductor layer and the first electrode, and a second electrode that is an ohmic electrode to the p-type semiconductor layer.Type: GrantFiled: August 22, 2017Date of Patent: August 6, 2019Assignee: FUJITSU LIMITEDInventors: Satoru Momose, Osamu Tsuboi, Kazuaki Karasawa
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Publication number: 20190137428Abstract: A sensor device includes a first electrode and a second electrode disposed over a substrate, and a sensitive film including a base film which couples the first electrode and the second electrode to each other and contains Cu and a halogen element and PEDOT/PSS which bonds to the base film.Type: ApplicationFiled: October 25, 2018Publication date: May 9, 2019Applicant: FUJITSU LIMITEDInventors: Michio USHIGOME, Osamu Tsuboi, Kazuaki Karasawa
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Publication number: 20180313776Abstract: A gas sensor device includes a first electrode, a second electrode, and a polythiophene film which is formed between the first and second electrodes to be electrically coupled to the first and second electrodes, and to which cuprous bromide is adsorbed.Type: ApplicationFiled: April 20, 2018Publication date: November 1, 2018Applicant: FUJITSU LIMITEDInventors: Satoru Momose, Michio USHIGOME, Kazuaki Karasawa, Osamu Tsuboi
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Publication number: 20170350839Abstract: A gas sensor includes a p-type semiconductor layer that contains copper or silver cations and contacts with detection target gas, a first electrode that is a Schottky electrode to the p-type semiconductor layer, a high-resistance layer that is provided between the p-type semiconductor layer and the first electrode such that the p-type semiconductor layer and the first electrode partly contact with each other and has resistance higher than that of each of the p-type semiconductor layer and the first electrode, and a second electrode that is an ohmic electrode to the p-type semiconductor layer.Type: ApplicationFiled: August 22, 2017Publication date: December 7, 2017Applicant: FUJITSU LIMITEDInventors: Satoru Momose, Osamu Tsuboi, Kazuaki Karasawa
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Patent number: 9820412Abstract: A modular data center includes: a rack which houses an electronic device; a blower device capable of switching a flowing direction of air and configured to feed the air into the rack; a space housing a moisture absorbent; an in-rack temperature detector which detects a temperature inside the rack; a dew-point temperature detector which detects a dew-point temperature of outside air; and a controller. The controller receives signals inputted from the in-rack temperature detector and the dew-point temperature detector, and controls shutters and the blower device.Type: GrantFiled: September 18, 2015Date of Patent: November 14, 2017Assignee: FUJITSU LIMITEDInventors: Kazuaki Karasawa, Masatoshi Ogawa, Hiroshi Endo, Takahiro Arioka, Shigeyoshi Umemiya, Yoshio Kikuchi, Shino Tokuyo, Hiroyuki Fukuda, Masao Kondo, Hiroaki Yoshida, Ayasa So
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Publication number: 20170299536Abstract: A gas analyzer including: a chamber; a first gas sensor provided in the chamber and including a first gas sensitive member; a second gas sensor provided in the chamber and including a second gas sensitive member; and a detector that detects each of resistance changes of the first and the second gas sensitive members; wherein the first gas sensitive member is an oxide semiconductor mainly composed of at least one of Sn, W, Zn and In or a semiconductor mainly composed of C, and the second gas sensitive member is mainly composed of a halide or an oxide of Cu or Ag.Type: ApplicationFiled: March 22, 2017Publication date: October 19, 2017Applicant: FUJITSU LIMITEDInventors: Osamu Tsuboi, Satoru Momose, Michio USHIGOME, Kazuaki Karasawa, Ryozo Takasu
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Publication number: 20170254767Abstract: A gas sensor device includes: a sensor film including a sensor surface and a resistance which increases with an increase in an amount of gas adsorbed on the sensor surface; a first electrode, a second electrode, and a third electrode that are electrically coupled to the sensor film; and a protective film that covers the sensor surface in a region between the first electrode and the second electrode, wherein the sensor surface is exposed in a region near the third electrode.Type: ApplicationFiled: December 15, 2016Publication date: September 7, 2017Applicant: FUJITSU LIMITEDInventors: Kazuaki Karasawa, Michio USHIGOME, Satoru Momose, Ryozo Takasu, Osamu Tsuboi
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Publication number: 20160341717Abstract: A gas sensor includes a p-type semiconductor layer in which a surface at a contacting side with detection target gas is covered with tertiary amine and two electrodes electrically coupled with each other through the p-type semiconductor layer.Type: ApplicationFiled: March 15, 2016Publication date: November 24, 2016Applicant: FUJITSU LIMITEDInventors: Satoru Momose, Kazuaki Karasawa, Osamu Tsuboi
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Publication number: 20160007506Abstract: A modular data center includes: a rack which houses an electronic device; a blower device capable of switching a flowing direction of air and configured to feed the air into the rack; a space housing a moisture absorbent; an in-rack temperature detector which detects a temperature inside the rack; a dew-point temperature detector which detects a dew-point temperature of outside air; and a controller. The controller receives signals inputted from the in-rack temperature detector and the dew-point temperature detector, and controls shutters and the blower device.Type: ApplicationFiled: September 18, 2015Publication date: January 7, 2016Inventors: Kazuaki Karasawa, Masatoshi OGAWA, Hiroshi ENDO, Takahiro Arioka, Shigeyoshi UMEMIYA, Yoshio Kikuchi, SHINO TOKUYO, Hiroyuki FUKUDA, Masao KONDO, Hiroaki Yoshida, Ayasa SO
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Patent number: 7339277Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.Type: GrantFiled: February 16, 2005Date of Patent: March 4, 2008Assignee: Fujitsu LimitedInventors: Takeshi Shioga, Kazuaki Karasawa, Kazuaki Kurihara
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Publication number: 20050156279Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.Type: ApplicationFiled: February 16, 2005Publication date: July 21, 2005Applicant: Fujitsu LimitedInventors: Takeshi Shioga, Kazuaki Karasawa, Kazuaki Kurihara
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Patent number: 6873038Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.Type: GrantFiled: July 30, 2003Date of Patent: March 29, 2005Assignee: Fujitsu LimitedInventors: Takeshi Shioga, Kazuaki Karasawa, Kazuaki Kurihara
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Publication number: 20050062157Abstract: Methods and apparatus for forming solder bumps on terminal pads of a semiconductor substrate for an integrated circuit device employ a solder bump transfer plate and a mask to form solder deposits on the plate. One embodiment of the invention employs a metal mask having a plurality of through holes for forming solder deposits on the solder bump transfer plate by vapor phase deposition through the through holes each area of which increases in step wise from the first surface of the mask to the second surface opposite to the first surface, thereby preventing solder deposits in the through holes from being removed when the mask is separated from the plate.Type: ApplicationFiled: November 4, 2004Publication date: March 24, 2005Applicant: FUJITSU LIMITEDInventors: Kazuaki Karasawa, Teru Nakanishi, Toshiya Akamatsu
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Publication number: 20040209453Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.Type: ApplicationFiled: May 18, 2004Publication date: October 21, 2004Applicant: FUJITSU LIMITEDInventors: Toshiya Akamatsu, Kazuaki Karasawa, Teru Nakanishi, Kozo Shimizu
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Patent number: 6764938Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.Type: GrantFiled: September 9, 1999Date of Patent: July 20, 2004Assignee: Fujitsu LimitedInventors: Toshiya Akamatsu, Kazuaki Karasawa, Teru Nakanishi, Kozo Shimizu