Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.

Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.

Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.

Abstract: A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.

Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.

Abstract: A solder bump transfer plate having a plurality of solder deposits on the surface non-wettable to molten solder both diameter and spacing of which are both smaller than diameter and spacing of the terminal pads on a semiconductor substrate.

Abstract: A bump forming step forms a predetermined number of bumps on at least a first one of two components. A height measuring step measures the heights of the predetermined number of bumps. A fixing step fixes the two components together by means of the bumps with the distance between the two components determined, using the result of the height measurement, so that all of the predetermined number of bumps should come in contact with the second one of the two components. An oxide-film removing step removes the oxide film formed on the predetermined number of bumps after the height measuring step and before the fixing step. The fixing step comprises a press fixing step for press fixing the two components at the above distance by means of a press fixing method, and a melting step for causing the bumps to melt in a predetermined atmosphere so that the bumps firmly join the two components together. The distance is established by at least one of the press fixing step and the melting step.

Abstract: Methods for forming solder bumps on terminal pads of a semiconductor substrate for an integrated circuit device employ a solder bump transfer plate and a mask to form solder deposits on the plate. One embodiment of the invention employs a metal mask having a plurality of through holes for forming solder deposits on the solder bump transfer plate by vapor phase deposition through the through holes each area of which increases in step wise from the first surface of the mask to the second surface opposite to the first surface, thereby preventing solder deposits in the through holes from being removed when the mask is separated from the plate. Another embodiment of the invention is a solder bump transfer plate having a plurality of solder deposits on the surface non-wettable to molten solder both diameter and spacing of which are both smaller than diameter and spacing of the terminal pads on the semiconductor substrate, whereby a single solder bump is accurately formed on each of the terminal pads.

Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.

Abstract: A method for manufacturing and mounting a semiconductor device in which a void in a bonding portion is eliminated. A material which is to be formed into a protruding electrode is placed on a semiconductor element. The protruding electrode material is heated in a depressurized atmosphere so as to be melted. Then, the protruding electrode material is heated in a pressurized atmosphere which provides a pressure greater than a pressure in said depressurized atmosphere. Finally, the protruding electrode material is cooled so as to be solidified while the pressurized atmosphere is maintained. The semiconductor device is mounted to a mount board after a surface layer is electroplated on an electrode of the mount board.

Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.

Abstract: A process for a flip chip connection of a semiconductor chip includes the steps of forming a plurality of stud bumps on the semiconductor chip, on which a plurality of solder bumps are formed, in the vicinity of the outer periphery thereof and on the outside of the solder bumps, providing a cut groove between a plurality of the solder bumps and the stud bumps, mating the solder bumps on the semiconductor chip and the corresponding solder bumps on the circuit board and heating for subsequent integration of the mating solder bumps, and breaking way the outer peripheral portion of the semiconductor chip along the cutting groove after a flip chip connection in order to remove the stud bumps.