Patents by Inventor Kazuaki Kozasa

Kazuaki Kozasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11628534
    Abstract: A silicon wafer single-side polishing method that can significantly improve the stepped minute defect occurrence rate is provided. The silicon wafer single-side polishing method comprises: a first polishing step of performing polishing on one side of a silicon wafer under a first polishing condition; and a second polishing step of performing polishing on the silicon wafer under a second polishing condition in which at least one of an applied pressure and a relative speed in the first polishing condition is changed, after the first polishing step, wherein a polishing rate ratio according to the first polishing condition is higher than a polishing rate ratio according to the second polishing condition.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: April 18, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Toshiharu Nakajima, Kazuaki Kozasa, Katsuhisa Sugimori, Syunya Kobuchi
  • Patent number: 11554458
    Abstract: A polishing head of a wafer polishing apparatus is provided with: a membrane head that can independently control a center control pressure pressing a center portion of a wafer, and an outer periphery control pressure pressing an outer peripheral portion of the wafer; an outer ring integrated with the membrane head so as to configure the outer peripheral portion of the membrane head; and a contact type retainer ring provided outside the membrane head. The membrane head has a central pressure chamber of a single compartment structure that controls the center control pressure, and an outer peripheral pressure chamber that is provided above the central pressure chamber, and that controls the outer periphery control pressure. A position of a lower end of the outer ring reaches at least a position of an inner bottom surface of the central pressure chamber.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: January 17, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Yuki Nakano, Katsuhisa Sugimori, Kazuaki Kozasa, Jiro Kajiwara, Katsutoshi Yamamoto, Takayuki Kihara, Ryoya Terakawa
  • Publication number: 20220415666
    Abstract: Provided is a wafer polishing method capable of improving nanotopography characteristics within a site on the surface of a wafer having a 2 mm square area or a small area equivalent thereto and a silicon wafer polished by the wafer polishing method, and further provided is a method of chemical-mechanical polishing the surface of a wafer through a polishing step in two or more polishing steps with different polishing rates, in which the in-plane thickness variation (standard deviation) of a polishing pad 150 used in a polishing step with a machining allowance of 0.3 ?m or more is 2.0 ?m or less.
    Type: Application
    Filed: October 21, 2020
    Publication date: December 29, 2022
    Applicant: SUMCO CORPORATION
    Inventors: Kazuaki KOZASA, Katsuhisa SUGIMORI, Kazuki NISHIOKA, Tsuyoshi MORITA
  • Patent number: 11211285
    Abstract: In a method of producing a bonded wafer, the amount of depression of the polishing cloth is 50 ?m to 90 ?m, and the surface hardness (ASKER C) of the polishing cloth is 50 to 60. In the bonded wafer, the polycrystalline silicon layer has a thickness variation ?t of 5% or less, and the support substrate wafer has a GBIR of 0.2 ?m or less and an SFQR of 0.06 ?m or less after the polycrystalline silicon layer is polished.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: December 28, 2021
    Assignee: SUMCO CORPORATION
    Inventors: Youzou Satou, Kazuaki Kozasa
  • Publication number: 20210331285
    Abstract: A polishing head of a wafer polishing apparatus is provided with: a membrane head that can independently control a center control pressure pressing a center portion of a wafer, and an outer periphery control pressure pressing an outer peripheral portion of the wafer; an outer ring integrated with the membrane head so as to configure the outer peripheral portion of the membrane head; and a contact type retainer ring provided outside the membrane head. The membrane head has a central pressure chamber of a single compartment structure that controls the center control pressure, and an outer peripheral pressure chamber that is provided above the central pressure chamber, and that controls the outer periphery control pressure. A position of a lower end of the outer ring reaches at least a position of an inner bottom surface of the central pressure chamber.
    Type: Application
    Filed: February 13, 2019
    Publication date: October 28, 2021
    Applicant: SUMCO CORPORATION
    Inventors: Yuki NAKANO, Katsuhisa SUGIMORI, Kazuaki KOZASA, Jiro KAJIWARA, Katsutoshi YAMAMOTO, Takayuki KIHARA, Ryoya TERAKAWA
  • Publication number: 20200343130
    Abstract: In a method of producing a bonded wafer, the amount of depression of the polishing cloth is 50 ?m to 90 ?m, and the surface hardness (ASKER C) of the polishing cloth is 50 to 60. In the bonded wafer, the polycrystalline silicon layer has a thickness variation ?t of 5% or less, and the support substrate wafer has a GBIR of 0.2 ?m or less and an SFQR of 0.06 ?m or less after the polycrystalline silicon layer is polished.
    Type: Application
    Filed: January 8, 2019
    Publication date: October 29, 2020
    Applicant: SUMCO Corporation
    Inventors: Youzou SATOU, Kazuaki KOZASA
  • Publication number: 20190030676
    Abstract: A silicon wafer single-side polishing method that can significantly improve the stepped minute defect occurrence rate is provided. The silicon wafer single-side polishing method comprises: a first polishing step of performing polishing on one side of a silicon wafer under a first polishing condition; and a second polishing step of performing polishing on the silicon wafer under a second polishing condition in which at least one of an applied pressure and a relative speed in the first polishing condition is changed, after the first polishing step, wherein a polishing rate ratio according to the first polishing condition is higher than a polishing rate ratio according to the second polishing condition.
    Type: Application
    Filed: December 2, 2016
    Publication date: January 31, 2019
    Applicant: SUMCO CORPORATION
    Inventors: Toshiharu NAKAJIMA, Kazuaki KOZASA, Katsuhisa SUGIMORI, Syunya KOBUCHI
  • Patent number: 9991110
    Abstract: A mirror-finishing chamfer polishing is applied using an abrasive-grain-free polishing solution to a chamfered portion of a semiconductor wafer having an oxide film on a top side or the top and bottom sides of the semiconductor wafer and having no oxide film on the chamfered portion. Further, prior to the mirror-finishing chamfer polishing, a pre-finish mirror chamfer polishing is applied using an abrasive-grain-containing polishing solution to the chamfered portion of the semiconductor wafer having the oxide film on the top side or the top and bottom sides and on the chamfered portion.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: June 5, 2018
    Assignee: SUMCO CORPORATION
    Inventors: Kazuaki Kozasa, Syunya Kobuchi, Katsuhisa Sugimori
  • Patent number: 9956663
    Abstract: A method of a polishing a wafer includes: a first polishing step of polishing a surface of the wafer while supplying a rough polishing liquid onto a polishing surface of a rough polishing cloth; subsequent to the first polishing step, a protection film formation step of supplying a protection film formation solution containing a water-soluble polymer to the rough polishing cloth after being used in the first polishing step and bringing the protection film formation solution into contact with the polished surface of the wafer to form a protection film on the polished surface; and a second polishing step of polishing the surface of the wafer where the protection film is formed while supplying a finish polishing liquid to a polishing surface of a finish polishing cloth different from the rough polishing cloth.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: May 1, 2018
    Assignee: SUMCO CORPORATION
    Inventors: Kazuaki Kozasa, Katsuhisa Sugimori, Syunya Kobuchi
  • Publication number: 20170252891
    Abstract: A method of a polishing a wafer includes: a first polishing step of polishing a surface of the wafer while supplying a rough polishing liquid onto a polishing surface of a rough polishing cloth; subsequent to the first polishing step, a protection film formation step of supplying a protection film formation solution containing a water-soluble polymer to the rough polishing cloth after being used in the first polishing step and bringing the protection film formation solution into contact with the polished surface of the wafer to form a protection film on the polished surface; and a second polishing step of polishing the surface of the wafer where the protection film is formed while supplying a finish polishing liquid to a polishing surface of a finish polishing cloth different from the rough polishing cloth.
    Type: Application
    Filed: May 13, 2015
    Publication date: September 7, 2017
    Applicant: SUMCO CORPORATION
    Inventors: Kazuaki KOZASA, Katsuhisa SUGIMORI, Syunya KOBUCHI
  • Publication number: 20170011903
    Abstract: A mirror-finishing chamfer polishing is applied using an abrasive-grain-free polishing solution to a chamfered portion of a semiconductor wafer having an oxide film on a top side or the top and bottom sides of the semiconductor wafer and having no oxide film on the chamfered portion. Further, prior to the mirror-finishing chamfer polishing, a pre-finish mirror chamfer polishing is applied using an abrasive-grain-containing polishing solution to the chamfered portion of the semiconductor wafer having the oxide film on the top side or the top and bottom sides and on the chamfered portion.
    Type: Application
    Filed: November 19, 2014
    Publication date: January 12, 2017
    Applicant: SUMCO CORPORATION
    Inventors: Kazuaki KOZASA, Syunya KOBUCHI, Katsuhisa SUGIMORI
  • Patent number: 9305850
    Abstract: A method and an apparatus of etching a semiconductor wafer are provided. The etching apparatus of a semiconductor wafer having a marker inside includes: a monitoring device capable of monitoring a surface of the semiconductor wafer so as to detect the marker; a nozzle capable of jetting a mixed gas that contains hydrogen fluoride and ozone onto the surface of the semiconductor wafer; a regulator capable of adjusting at least one of hydrogen fluoride concentration and ozone concentration in the mixed gas; and a controller capable of determining whether the marker is detected by the monitoring device and terminating the etching process.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: April 5, 2016
    Assignee: SUMCO TECHXIV CORPORATION
    Inventors: Kazuaki Kozasa, Tomonori Kawasaki
  • Patent number: 8992791
    Abstract: A silicon wafer surface other than a defect is oxidized by ozone to form a silicon oxide film. A hydrofluoric acid is sprayed and subsequently a cleaning gas is sprayed onto the surface of the silicon wafer.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: March 31, 2015
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuaki Kozasa, Tomonori Kawasaki, Takahisa Sugiman, Hironori Nishimura
  • Patent number: 8696809
    Abstract: A manufacturing method of an epitaxial silicon wafer is provided. The epitaxial silicon wafer includes: a substrate cut out from a silicon monocrystal that has been manufactured, doped with nitrogen and pulled up in accordance with Czochralski method; and an epitaxial layer formed on the substrate. The manufacturing method includes: cleaning a surface of the substrate with fluorinated acid by spraying onto the surface of the substrate fluorinated acid vaporized by a bubbling tank of a substrate cleaning apparatus; and forming an epitaxial layer on the cleaned surface of the substrate.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: April 15, 2014
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuaki Kozasa, Kosuke Miyoshi
  • Publication number: 20120305187
    Abstract: A method and an apparatus of etching a semiconductor wafer are provided. The etching apparatus of a semiconductor wafer having a marker inside includes: a monitoring device capable of monitoring a surface of the semiconductor wafer so as to detect the marker; a nozzle capable of jetting a mixed gas that contains hydrogen fluoride and ozone onto the surface of the semiconductor wafer; a regulator capable of adjusting at least one of hydrogen fluoride concentration and ozone concentration in the mixed gas; and a controller capable of determining whether the marker is detected by the monitoring device and terminating the etching process.
    Type: Application
    Filed: August 15, 2012
    Publication date: December 6, 2012
    Applicant: SUMCO TECHXIV CORPORATION
    Inventors: Kazuaki Kozasa, Tomonori Kawasaki
  • Patent number: 8303373
    Abstract: A diluted slurry supplying apparatus utilized in a polishing apparatus for finishing a semiconductor wafer with a slurry containing colloidal silica and water-soluble polymer is provided. The polishing method comprises: a slurry supplier capable of supplying the slurry containing the colloidal silica and the water-soluble polymer; a diluent supplier capable of supplying a diluent containing an aggregation preventing agent to dilute the slurry; a mixer capable of receiving the slurry and the diluent having been supplied from the slurry supplier and the diluent supplier, respectively, the mixer forming a diluted slurry with a pH value of at least 9; and an ultrasonic vibrator capable of applying an ultrasonic vibration to the diluted slurry staying in the mixer or being fed out from the mixer. Here, the diluent supplying apparatus can change a dilution proportion of the diluted slurry.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: November 6, 2012
    Assignee: Sumco Techxiv Corporation
    Inventor: Kazuaki Kozasa
  • Patent number: 8273260
    Abstract: A method of etching a semiconductor wafer is provided. The method comprises the steps of: jetting a mixed gas including hydrogen fluoride and ozone onto a surface of a semiconductor wafer; monitoring the surface of the semiconductor wafer; analyzing the surface of the semiconductor wafer; and adjusting at least one of the hydrogen fluoride concentration and the ozone concentration in the mixed gas based on a result of the analysis.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: September 25, 2012
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuaki Kozasa, Tomonori Kawasaki
  • Publication number: 20100093177
    Abstract: A silicon wafer surface other than a defect is oxidized by ozone to form a silicon oxide film. A hydrofluoric acid is sprayed and subsequently a cleaning gas is sprayed onto the surface of the silicon wafer.
    Type: Application
    Filed: September 30, 2009
    Publication date: April 15, 2010
    Applicant: SUMCO TECHXIV CORPORATION
    Inventors: Kazuaki KOZASA, Tomonori KAWASAKI, Takahisa SUGIMAN, Hironori NISHIMURA
  • Patent number: 7666063
    Abstract: A rough-polishing method for conducting a rough polishing before mirror-finish polishing on a semiconductor wafer using a polishing apparatus includes a first polishing step for polishing the semiconductor wafer using slurry containing colloidal silica supplied by a slurry supplying unit and a second polishing step for polishing the semiconductor wafer using alkali solution provided by mixing deionized water supplied from a deionized-water supplying unit and alkali concentrate solution supplied by an alkali-concentrate-solution supplying unit. The pH value of the alkali solution and polishing time in the second polishing step are determined based on the load current value of the polishing table in the first polishing step.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: February 23, 2010
    Assignee: Sumco Techxiv Corporation
    Inventors: Kazuaki Kozasa, Tomonori Kawasaki, Kosuke Miyoshi
  • Publication number: 20090298393
    Abstract: A diluted slurry supplying apparatus utilized in a polishing apparatus for finishing a semiconductor wafer with a slurry containing colloidal silica and water-soluble polymer is provided. The polishing method comprises: a slurry supplier capable of supplying the slurry containing the colloidal silica and the water-soluble polymer; a diluent supplier capable of supplying a diluent containing an aggregation preventing agent to dilute the slurry; a mixer capable of receiving the slurry and the diluent having been supplied from the slurry supplier and the diluent supplier, respectively, the mixer forming a diluted slurry with a pH value of at least 9; and an ultrasonic vibrator capable of applying an ultrasonic vibration to the diluted slurry staying in the mixer or being fed out from the mixer. Here, the diluent supplying apparatus can change a dilution proportion of the diluted slurry.
    Type: Application
    Filed: May 22, 2009
    Publication date: December 3, 2009
    Inventor: Kazuaki Kozasa