Abstract: The invention presents a memory controller capable of shortening the creation time of address management table at the time of initialization of memory card, while avoiding decline of access speed due to process of writing back the address management table in normal operation.

Abstract: A capsule type endoscope which is introduced into a subject to acquire subject internal information and transmits the acquired subject internal information to the outside through the subject has a plurality of electrodes arranged on an outer peripheral surface thereof. An electrode selecting section selects two electrodes with a small transmission power loss from the plurality of electrodes as transmitting electrodes that are utilized to transmit the subject internal information. A transmitting section uses the two transmitting electrodes selected by the electrode selecting section to transmit the subject internal information to the outside of the subject.

Abstract: The capsule medical apparatus of the present invention including an information acquisition section that acquires information on the inside of a test subject comprises a plurality of communication electrodes that are disposed on the surface of the capsule medical apparatus and capable of communication for outputting the information acquired by the information acquisition section to the outside of the test subject, a signal conversion section that converts an electric signal outputted according to the information acquired by the information acquisition section into electrode drive signals for driving the communication electrodes by inducing a potential difference therebetween, a signal output switching section that switches between output states of the electrode drive signals, and a signal switching control section that controls the signal output switching section based on the output state of the electric signal to stop outputting the electrode drive signals during the period in which the electric signal is no

Abstract: The present invention provides a nonvolatile memory device that can be used in combination with a plurality of types of memory controllers that are different in number of banks to be simultaneously accessed, the nonvolatile memory device being also capable of achieving high-speed access. The nonvolatile memory device of the present invention includes: a memory area divided into a plurality of banks from/to which data can be read/written independently; and data registers for storing data that has been read from the memory area or that is to be written to the memory area, the data registers being at least equal in number to the banks, and connections between the banks and the data registers are changed in accordance with the number of banks that are to be simultaneously accessed.

Abstract: A capsule type endoscope that is introduced into a subject, acquires information of the inside of the subject, and transmits the information of the inside of the subject to the outside of the subject has a plurality of transmitting electrodes arranged on an outer peripheral surface of the capsule type endoscope to transmit the information of the inside of the subject to the outside of the subject. A static protecting section is connected with the plurality of transmitting electrodes and limits a voltage that is generated in the transmitting electrodes due to static electricity that is equal to or higher than a threshold value.

Abstract: The capsule medical apparatus of the present invention is disposed in a test subject and acquires information on the inside of the test subject. The capsule medical apparatus comprises a plurality of communication electrodes that are disposed on the surface of the capsule medical apparatus and capable of communication for outputting the information acquired by the capsule medical apparatus to the outside of the test subject, a judgment section that judges whether or not the plurality of communication electrodes can perform the communication based on the state of the plurality of communication electrodes, and a control section that suspends, based on the judgment result obtained in the judgment section, the operations of at least part of various sections of the capsule medical apparatus when the plurality of communication electrodes cannot perform the communication.

Abstract: A semiconductor memory card 1 includes a user data area 21 and a management information area 22, in a data storing unit 2. According to a writing test command from a memory access device 6, a memory controller 3 writes data into a user data storing area and measures the writing rate, and transmits the measurement result to the memory access device 6 via a host interface unit 4. Thereby, the memory access device 6 can recognize the writing rate.

Abstract: An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.

Abstract: An intro-subject introduction apparatus which is introduced into the inside of a subject and is movable inside the subject includes an information acquisition section for acquiring intra-subject information. A wireless transmission section transmits a transmission signal including the acquired intra-subject information to an extracorporeal receiving apparatus provided outside the subject. A reflected signal deriving section derives a reflected signal generated between the wireless transmission section and the inside of the subject. A transmission signal control section controls the wireless transmission section on the basis of the derived reflected signal.

Abstract: A writing completion flag table (105) for storing a writing completion flag corresponding to a predetermined storage unit such as a cluster or a physical block is stored in a non-volatile control memory (106). When completion of data writing into a predetermined storage unit is detected, a write completion flag is written in the corresponding address of the storage unit on the write completion flag table (105). Thus, it is possible to recognize that data has been written normally. Even when the flag indicating completion of writing into a page of the writing unit of the main storage memory cannot be written, it is possible to improve the writing reliability.

Abstract: A semiconductor memory device in which data is not written in a transfer destination under a state including an error when an error occurs at the time of reading data at the transfer destination. The semiconductor memory device (1) comprising a nonvolatile memory (2) having a data writing unit smaller than a physical block is provided with an error detecting/correcting circuit (23) in the non-volatile memory (2). When data stored in a specified block of the non-volatile memory (2) is transferred to a different physical block and written, the error detecting/correcting circuit (23) performs error detection and correction of data.

Abstract: A card information-storing portion is provided in a semiconductor memory card, and information relating to access performance such as access condition and access rate is held in the storing portion. Further, an access device acquires the held information from the semiconductor memory card to make it possible that the information can be used for control of a file system. This optimizes processing of the access device and the semiconductor memory card independent of differences in characteristics of semiconductor memory cards and management methods used, realizing high-rate access from the access device to a semiconductor memory card.

Abstract: A controller 102 and four flash memories F0 to F3 are connected by twos to two memory buses, and each flash memory is divided into two regions of substantially the same size to form a first half and a last half regions. In a four-memory configuration, a consecutive logical address specified by a host apparatus is divided into a predetermined size, and a write operation is performed in a format that repeatedly circulates through F0, F1, F2, F3 in this order. In a two-memory configuration, the write operation is performed in a format that repeatedly circulates through F00, F10, F01, F11. Thus, a controller processing is made common regardless of the number of flash memories connected to the controller.

Abstract: A controller 102 and four flash memories F0 to F3 are connected by twos to two memory buses, and each flash memory is divided into two regions of substantially the same size to form a first half and a last half regions. In a four-memory configuration, a consecutive logical address specified by a host apparatus is divided into a predetermined size, and a write operation is performed in a format that repeatedly circulates through F0, F1, F2, F3 in this order. In a two-memory configuration, the write operation is performed in a format that repeatedly circulates through F00, F10, F01, F11. Thus, a controller processing is made common regardless of the number of flash memories connected to the controller.

Abstract: With nonvolatile memory device employing a nonvolatile memory such as multiple-valued NAND flash memory or the like in which each memory cell holds data in a plurality of pages, there is such a problem that, if an error occurred under writing data, data stored in other page in the same group of the current page is changed, and hence the object of the present invention is to solve this problem. In writing data into a nonvolatile memory 110, when error occurred under writing data into a certain page, an error page identification part 128 identifies an error type and a physical address of the page where error occurred. An error corrector 129 then corrects errors occurred in other pages belonging to the same group of error occurrence page.

Abstract: A host information memory is provided in a semiconductor memory card and a data write start address and a data size supplied by an access unit are stored. A free physical area generation section determines whether or not to perform erasing of an invalid block of a nonvolatile memory when writing of data based on the data write start address and data size, and determines the number of blocks to be erased. When erasing, writing of data and erasing of invalid blocks are simultaneously performed with respect to different memory chips. Erase process of data, herewith, can be optimized and high speed access from the access unit to a semiconductor memory card can be realized.

Abstract: A controller 102 and four flash memories F0 to F3 are connected by twos to two memory buses, and each flash memory is divided into two regions of substantially the same size to form a first half and a last half regions. In a four-memory configuration, a consecutive logical address specified by a host apparatus is divided into a predetermined size, and a write operation is performed in a format that repeatedly circulates through F0, F1, F2, F3 in this order. In a two-memory configuration, the write operation is performed in a format that repeatedly circulates through F00, F10, F01, F11. Thus, a controller processing is made common regardless of the number of flash memories connected to the controller.

Abstract: When a file system control part 155A writes file data into a main memory 142, a file can be easily written continuously and the number of file copy can be decreased at updating a directory entry by writing the file data and a directory entry into different allocation units. In this manner, when using a nonvolatile memory in which physical block size as an erase unit is larger than cluster size, the write performance can be enhanced.

Abstract: A semiconductor memory card 1 includes a user data area 21 and a management information area 22, in a data storing unit 2. According to a writing test command from a memory access device 6, a memory controller 3 writes data into a user data storing area and measures the writing rate, and transmits the measurement result to the memory access device 6 via a host interface unit 4. Thereby, the memory access device 6 can recognize the writing rate.

Abstract: A read/write memory 109 is provided with a memory controller 110 so as to store address management information temporarily. A non-volatile memory access unit 106 writes user data on a non-volatile memory 111 according to a write instruction. When the user data is rewritten, an address management information controller 105 causes a physical block, which is an object to which the address management information 108 is rewritten, to be a to-be-invalid block. After completion of a series of writing process, the to-be-invalid block is turned into an invalid block and the address management information in the read/write memory 109 is rewritten on the non-volatile memory 111.