Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: Provided is an electronic circuit capable of preventing a switching device from breakage when a short-circuit occurs. When a gate control signal CG1 is inverted from an L level to an H level, a first switching circuit 32 selects a first input terminal a, and connects an output terminal d to the first input terminal a, whereby turning on a MOSFET 21. When a predetermined time Tx elapses after the output terminal d of the first switching circuit 32 is connected to the first input terminal a, a second switching circuit 34 selects a first input terminal e, and connects an output terminal g to the first input terminal e. Furthermore, immediately after the connection, the first switching circuit 32 selects a second input terminal b, and connects the output terminal d to the second input terminal b. Consequently, immediately after the MOSFET 21 is turned on, a gate resistor is switched from a first gate resistor 33 having a small resistance value to a second gate resistor 35 having a large resistance value.

Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.

Abstract: When an overcurrent is detected by an overcurrent detecting circuit (36), a first switch circuit (32) selects a second input terminal (b) and connects an output terminal (c) to the second input terminal (b), with the result that the output terminal (c) of the first switch circuit (32) is put into a high-impedance state. The second switch circuit (34) selects a second output terminal (f) and connects an input terminal (d) to the second output terminal (f), with the result that the input terminal (d) of the second switch circuit (34) is grounded. That is, the gate of a first MOSFET (21) is grounded via a current interrupting resistor (35).

Abstract: Provided is an electronic circuit capable of preventing a switching device from breakage when a short-circuit occurs. When a gate control signal CG1 is inverted from an L level to an H level, a first switching circuit 32 selects a first input terminal a, and connects an output terminal d to the first input terminal a, whereby turning on a MOSFET 21. When a predetermined time Tx elapses after the output terminal d of the first switching circuit 32 is connected to the first input terminal a, a second switching circuit 34 selects a first input terminal e, and connects an output terminal g to the first input terminal e. Furthermore, immediately after the connection, the first switching circuit 32 selects a second input terminal b, and connects the output terminal d to the second input terminal b. Consequently, immediately after the MOSFET 21 is turned on, a gate resistor is switched from a first gate resistor 33 having a small resistance value to a second gate resistor 35 having a large resistance value.

Abstract: When an overcurrent is detected by an overcurrent detecting circuit (36), a first switch circuit (32) selects a second input terminal (b) and connects an output terminal (c) to the second input terminal (b), with the result that the output terminal (c) of the first switch circuit (32) is put into a high-impedance state. The second switch circuit (34) selects a second output terminal (f) and connects an input terminal (d) to the second output terminal (f), with the result that the input terminal (d) of the second switch circuit (34) is grounded. That is, the gate of a first MOSFET (21) is grounded via a current interrupting resistor (35).

Abstract: A plasma processing apparatus for processing an object to be processed using a plasma. The apparatus includes a processing chamber defining a processing cavity for containing an object to be processed and a process gas therein, a microwave radiating antenna having a microwave radiating surface for radiating a microwave in order to excite a plasma in the processing cavity, and a dielectric body provided so as to be opposed to the microwave radiating surface, in which the distance D between the microwave radiating surface and a surface of the dielectric body facing away from the microwave radiating surface, which is represented with the wavelength of the microwave being a distance unit, is determined to be in the range satisfying the inequality 0.7×n/4?D?1.3×n/4 (n being a natural number).

Abstract: A plasma processing apparatus for processing an object to be processed using a plasma. The apparatus includes a processing chamber defining a processing cavity for containing an object to be processed and a process gas therein, a microwave radiating antenna having a microwave radiating surface for radiating a microwave in order to excite a plasma in the processing cavity, and a dielectric body provided so as to be opposed to the microwave radiating surface, in which the distance D between the microwave radiating surface and a surface of the dielectric body facing away from the microwave radiating surface, which is represented with the wavelength of the microwave being a distance unit, is determined to be in the range satisfying the inequality 0.7×n/4?D?1.3×n/4 (n being a natural number).

Abstract: A plasma processing apparatus for processing an object to be processed using a plasma. The apparatus includes a processing chamber defining a processing cavity for containing an object to be processed and a process gas therein, a microwave radiating antenna having a microwave radiating surface for radiating a microwave in order to excite a plasma in the processing cavity, and a dielectric body provided so as to be opposed to the microwave radiating surface, in which the distance D between the microwave radiating surface and a surface of the dielectric body facing away from the microwave radiating surface, which is represented with the wavelength of the microwave being a distance unit, is determined to be in the range satisfying the inequality 0.7×n/4?D?1.3×n/4 (n being a natural number).

Abstract: A plasma processing apparatus for processing an object to be processed using a plasma. The apparatus includes a processing chamber defining a processing cavity for containing an object to be processed and a process gas therein, a microwave radiating antenna having a microwave radiating surface for radiating a microwave in order to excite a plasma in the processing cavity, and a dielectric body provided so as to be opposed to the microwave radiating surface, in which the distance D between the microwave radiating surface and a surface of the dielectric body facing away from the microwave radiating surface, which is represented with the wavelength of the microwave being a distance unit, is determined to be in the range satisfying the inequality 0.7×n/4?D?1.3×n/4 (n being a natural number).