Abstract: A semiconductor device includes a metal plate capacitor that includes a heat-resistant metal plate and a capacitor unit including a sintered dielectric formed on at least one surface of the heat-resistant metal plate, a semiconductor chip disposed on the metal plate capacitor, a connector configured to electrically connect the semiconductor chip and the metal plate capacitor, and a protector configured to protect the semiconductor chip, the metal plate capacitor, and the connector.

Abstract: A semiconductor device includes a metal plate capacitor that includes a heat-resistant metal plate and a capacitor unit including a sintered dielectric formed on at least one surface of the heat-resistant metal plate, a semiconductor chip disposed on the metal plate capacitor, a connector configured to electrically connect the semiconductor chip and the metal plate capacitor, and a protector configured to protect the semiconductor chip, the metal plate capacitor, and the connector.

Abstract: A semiconductor device comprises a first semiconductor chip; and a second semiconductor chip provided on the first semiconductor chip with having chip-on-chip connection to the first semiconductor chip, wherein when seen from a direction perpendicular to an upper surface of the second semiconductor chip, an outline of the second semiconductor chip is larger than an outline of the first semiconductor chip, a plurality of electrode terminals for the first semiconductor chip are provided on an upper surface of the first semiconductor chip, the plurality of electrode terminals for the first semiconductor chip comprise one or more first covered terminals which are covered with the second semiconductor chip and one or more first uncovered terminals which are not covered with the second semiconductor chip.

Abstract: A semiconductor device comprises a first semiconductor chip; and a second semiconductor chip provided on the first semiconductor chip with having chip-on-chip connection to the first semiconductor chip, wherein when seen from a direction perpendicular to an upper surface of the second semiconductor chip, an outline of the second semiconductor chip is larger than an outline of the first semiconductor chip, a plurality of electrode terminals for the first semiconductor chip are provided on an upper surface of the first semiconductor chip, the plurality of electrode terminals for the first semiconductor chip comprise one or more first covered terminals which are covered with the second semiconductor chip and one or more first uncovered terminals which are not covered with the second semiconductor chip.

Abstract: A semiconductor device includes a first extended semiconductor chip including a first semiconductor chip and an extension extending outwardly from a side surface of the first semiconductor chip. The semiconductor device also includes a second semiconductor chip mounted above the first extended semiconductor chip and electrically connected with the first semiconductor chip. The first extended semiconductor chip includes a first extension electrode pad provided above the extension and electrically connected with an electrode of the first semiconductor chip.

Abstract: A semiconductor device includes a first extended semiconductor chip including a first semiconductor chip and an extension extending outwardly from a side surface of the first semiconductor chip. The semiconductor device also includes a second semiconductor chip mounted above the first extended semiconductor chip and electrically connected with the first semiconductor chip. The first extended semiconductor chip includes a first extension electrode pad provided above the extension and electrically connected with an electrode of the first semiconductor chip.

Abstract: In an interposer substrate, a plating stub conductor and a ground conductor form a capacitor, and a plating stub conductor and the ground conductor form a capacitor. Capacitances of the capacitors are adjusted so that a phase difference between signals transmitted by a differential transmission using a signal line including a connection wiring conductor and a signal line including a connection wiring conductor is equal to 180 degrees.

Abstract: A circuit board analyzer includes a storage unit for storing mesh position information on an analyzed mesh-division model and extracted circuit constants in relation to each other; a division-model configuration unit for dividing the layout of a circuit board into meshes to configure a new mesh-division model; an identical-mesh determination unit for making a comparison between mesh position information on the new mesh-division model and mesh position information on the analyzed mesh-division model to determine identical meshes that have identical mesh position information; and a circuit-constant extraction unit for performing analytical processing based on the new mesh-division model to extract new circuit constants and reusing, as a new circuit constant associated with the identical meshes, an extracted circuit constant that is related to the mesh position information on the identical meshes.

Abstract: A circuit board analyzing method and a circuit board analyzer are provided which can greatly reduce analyzing time. The circuit board analyzer includes a computing unit 110, a memory unit 140 connected to the computing unit 110, and an input unit 160 connected to the computing unit 110. The computing unit 110 includes a wiring data acquiring section 310 acquiring data of wirings formed on a circuit board, a basic circuit diagram forming section 320 dividing the wirings into meshes and setting cells and branches connecting the adjacent cells, and an interference analysis setting section 330 setting an element ignoring range of elements set in the cells and the branches.

Abstract: In a differential transmission line, a substrate has first and second surfaces parallel to each other, and a first grounding conductor is formed on the second surface of the substrate. A dielectric layer is formed on the first grounding conductor, and a second grounding conductor is formed on the dielectric layer. First and the second signal conductors are formed to be parallel to each other on the first surface of the substrate. The first signal conductor and the first and second grounding conductors constitute a first transmission line, and the second signal conductor and the first and second grounding conductors constitute a second transmission line. A slot is formed in the first grounding conductor to three-dimensionally intersect with the first and second signal conductors and to be orthogonal to a longitudinal direction thereof, and a connecting conductor is formed for connecting the first grounding conductor with the second grounding conductor.

Abstract: For example, in a conventional high frequency switch used for a mobile phone and so on, high frequency distortion is caused by a diode which is turned off upon transmission. A high frequency switch includes a switch circuit for switching transmission and reception performed via a transmitting terminal and receiving terminals, said switch circuit having a diode turned off upon transmission, and a low-pass filter for suppressing high frequency distortion caused by the diode upon transmission.

Abstract: In an interposer substrate, a plating stub conductor and a ground conductor form a capacitor, and a plating stub conductor and the ground conductor form a capacitor. Capacitances of the capacitors are adjusted so that a phase difference between signals transmitted by a differential transmission using a signal line including a connection wiring conductor and a signal line including a connection wiring conductor is equal to 180 degrees.

Abstract: In a differential transmission line, a substrate has first and second surfaces parallel to each other, and a first grounding conductor is formed on the second surface of the substrate. A dielectric layer is formed on the first grounding conductor, and a second grounding conductor is formed on the dielectric layer. First and the second signal conductors are formed to be parallel to each other on the first surface of the substrate. The first signal conductor and the first and second grounding conductors constitutes a first transmission line, and the second signal conductor and the first and second grounding conductors constitutes a second transmission line. A slot is formed in the first grounding conductor to sterically intersect with the first and second signal conductors and to be orthogonal to a longitudinal direction thereof, and a connecting conductor is formed for connecting the first grounding conductor with the second grounding conductor.

Abstract: A circuit board analyzer includes a storage unit for storing mesh position information on an analyzed mesh-division model and extracted circuit constants in relation to each other; a division-model configuration unit for dividing the layout of a circuit board into meshes to configure a new mesh-division model; an identical-mesh determination unit for making a comparison between mesh position information on the new mesh-division model and mesh position information on the analyzed mesh-division model to determine identical meshes that have identical mesh position information; and a circuit-constant extraction unit for performing analytical processing based on the new mesh-division model to extract new circuit constants and reusing, as a new circuit constant associated with the identical meshes, an extracted circuit constant that is related to the mesh position information on the identical meshes.

Abstract: A circuit board analyzing method and a circuit board analyzer are provided which can greatly reduce analyzing time. The circuit board analyzer includes a computing unit 110, a memory unit 140 connected to the computing unit 110, and an input unit 160 connected to the computing unit 110. The computing unit 110 includes a wiring data acquiring section 310 acquiring data of wirings formed on a circuit board, a basic circuit diagram forming section 320 dividing the wirings into meshes and setting cells and branches connecting the adjacent cells, and an interference analysis setting section 330 setting an element ignoring range of elements set in the cells and the branches.

Abstract: A 3-frequency branching circuit in the past could not be used for a system wherein a TDMA method such as GSM and DCS and a W-CDMA method such as UMTS are mixed. The 3-frequency branching circuit equipped with branching means having first and second internal terminals, an antenna terminal of connecting to an antenna, a low-pass filter connected between the first internal terminal and the antenna terminal, and a high-pass filter connected between the second internal terminal and the antenna terminal, a switching circuit of switching between GSM TX and GSM RX, a switching circuit of switching between DCS TX, DCS RX and a third internal terminal, and a duplexer connected to the third internal terminal.

Abstract: A method for analyzing an electromagnetic field includes: a step S1 for setting up initial shapes of conductor patterns in each layer of a multilayer circuit board; a step S2 for setting up initial ports for input or output of an external signal in each conductor pattern; a step S3 for dividing two-dimensionally the multilayer circuit board into a plurality of areas; steps S4a and S4b for setting up additive ports on edges of the conductor pattern which has been created by area-division; steps S5a and S5b for setting up individual analysis conditions for the initial ports and the additive ports, respectively; steps S6a and S6b for performing an electromagnetic analysis of the multilayer circuit board by the divided area, based on the analysis conditions; and a step S8 for integrating results of the electromagnetic analysis over each of the divided areas, thereby obtaining results of the electromagnetic analysis over the whole circuit board.

Abstract: A high frequency switch having a plurality of signal paths for four frequency bands, the high frequency switch, has branching means, first and second transmission reception changeover means connected to the branching means, and a plurality of filters placed in the plurality of signal paths, the first transmission reception changeover means has a first common transmitting end for transmission signals of the first frequency band and the second frequency band, a first receiving end for a reception signal of the first frequency band, and a second receiving end for a reception signal of the second frequency band, and the second transmission reception changeover means has a second common transmitting end for transmission signals of the third frequency band and the fourth frequency band, a third receiving end for a reception signal of the third frequency band, and a fourth receiving end for a reception signal of the fourth frequency band.