Abstract: One aspect of the present invention relates to a resin composition comprising a curable resin and a curing agent, which is used for forming an inter-wiring layer insulating layer in contact with a copper wiring.

Abstract: To provide a manufacturing method capable of manufacturing a high density semiconductor device excellent in transmission between chips at a favorable yield and at low cost. A method for manufacturing a semiconductor device includes an insulating layer forming step of forming an insulating layer 3 having a trench 4 above a substrate 1, a copper layer forming step of forming a copper layer 5a on the insulating layer 3 so as to fill the trench 4, and a removing step of removing the copper layer 5a on the insulating layer 3 by a fly cutting method so as to retain a copper layer part in the trench 4.

Abstract: Provided is copper paste for joining including metal particles, and a dispersion medium. The metal particles include sub-micro copper particles having a volume-average particle size of 0.12 ?m to 0.8 ?m, and micro copper particles having a volume-average particle size of 2 ?m to 50 ?m, a sum of the amount of the sub-micro copper particles contained and the amount of the micro copper particles contained is 80% by mass or greater on the basis of a total mass of the metal particles, and the amount of the sub-micro copper particles contained is 30% by mass to 90% by mass on the basis of a sum of a mass of the sub-micro copper particles and a mass of the micro copper particles.

Abstract: There are provided an organic interposer capable of improving insulation reliability and a method for manufacturing the organic interposer. An organic interposer 10 is provided with: an organic insulating laminate 12 comprising a plurality of organic insulating layers; and a plurality of wires 13 arranged in the organic insulating laminate 12, and each of the wires 13 and each of the organic insulating layers are separated by a barrier metal film 14. The organic insulating laminate 12 may include: a first organic insulating layer 21 having a plurality of grooves 21a each having each of the wires 13 disposed therein; and a second organic insulating layer 22 laminated to the first organic insulating layer 21 in such a way as to embed the wires 13.

Abstract: Provided is a joined body including: a first member; a second member; and a sintered metal layer that joins the first member and the second member. The sintered metal layer includes a structure that is derived from flake-shaped copper particles which are oriented in approximately parallel to an interface between the first member or the second member, and the sintered metal layer, and the amount of copper contained in the sintered metal layer is 65% by volume or greater on the basis of a volume of the sintered metal layer.

Abstract: To provide a manufacturing method capable of manufacturing a high density semiconductor device excellent in transmission between chips at a favorable yield and at low cost. A method for manufacturing a semiconductor device includes an insulating layer forming step of forming an insulating layer 3 having a trench 4 above a substrate 1, a copper layer forming step of forming a copper layer 5a on the insulating layer 3 so as to fill the trench 4, and a removing step of removing the copper layer 5a on the insulating layer 3 by a fly cutting method so as to retain a copper layer part in the trench 4.

Abstract: Provided is copper paste for joining including metal particles, and a dispersion medium. The metal particles include sub-micro copper particles having a volume-average particle size of 0.12 ?m to 0.8 ?m, and micro copper particles having a volume-average particle size of 2 ?m to 50 ?m, a sum of the amount of the sub-micro copper particles contained and the amount of the micro copper particles contained is 80% by mass or greater on the basis of a total mass of the metal particles, and the amount of the sub-micro copper particles contained is 30% by mass to 90% by mass on the basis of a sum of a mass of the sub-micro copper particles and a mass of the micro copper particles.

Abstract: A method for manufacturing a structure containing a conductor circuit according to the present invention can provide openings in various shapes by patterning a first photosensitive resin layer in a first patterning process according to shapes of openings formed in a heat-curable resin layer. Further, in the method for manufacturing a structure containing a conductor circuit, a plurality of openings can be formed at the same time and a residue of the resin around the opening can be reduced, unlike a case in which openings are formed with a laser. Therefore, it is possible to sufficiently efficiently manufacture the structure having excellent reliability even when the number of pins of a semiconductor element increases and it is necessary to provide a great number of fine openings.

Abstract: A method for manufacturing a structure containing a conductor circuit according to the present invention can provide openings in various shapes by patterning a first photosensitive resin layer in a first patterning process according to shapes of openings formed in a heat-curable resin layer. Further, in the method for manufacturing a structure containing a conductor circuit, a plurality of openings can be formed at the same time and a residue of the resin around the opening can be reduced, unlike a case in which openings are formed with a laser. Therefore, it is possible to sufficiently efficiently manufacture the structure having excellent reliability even when the number of pins of a semiconductor element increases and it is necessary to provide a great number of fine openings.

Abstract: A method for manufacturing a structure containing a conductor circuit according to the present invention can provide openings in various shapes by patterning a first photosensitive resin layer in a first patterning process according to shapes of openings formed in a heat-curable resin layer. Further, in the method for manufacturing a structure containing a conductor circuit, a plurality of openings can be formed at the same time and a residue of the resin around the opening can be reduced, unlike a case in which openings are formed with a laser. Therefore, it is possible to sufficiently efficiently manufacture the structure having excellent reliability even when the number of pins of a semiconductor element increases and it is necessary to provide a great number of fine openings.

Abstract: The photosensitive resin composition for a protective film of a printed wiring board for a semiconductor package, according to the invention, comprises (A) an acid-modified vinyl group-containing epoxy resin, (B) a phenol compound, (C) a compound having at least one ethylenically unsaturated group in each molecule, (D) a photopolymerization initiator and (E) inorganic fine particles.

Abstract: A method for manufacturing a structure containing a conductor circuit according to the present invention can provide openings in various shapes by patterning a first photosensitive resin layer in a first patterning process according to shapes of openings formed in a heat-curable resin layer. Further, in the method for manufacturing a structure containing a conductor circuit, a plurality of openings can be formed at the same time and a residue of the resin around the opening can be reduced, unlike a case in which openings are formed with a laser. Therefore, it is possible to sufficiently efficiently manufacture the structure having excellent reliability even when the number of pins of a semiconductor element increases and it is necessary to provide a great number of fine openings.

Abstract: The photosensitive resin composition for a protective film of a printed wiring board for a semiconductor package, according to the invention, comprises (A) an acid-modified vinyl group-containing epoxy resin, (B) a phenol compound, (C) a compound having at least one ethylenically unsaturated group in each molecule, (D) a photopolymerization initiator and (E) inorganic fine particles.

Abstract: A resin-sealed semiconductor device which comprises a lead frame having a die bond pad and an inner lead, a semiconductor chip installed on the die bond pad via a die bonding material and a sealing material for sealing the semiconductor chip and the lead frame, wherein properties of the die bonding material and the sealing material after curing satisfies the following formulae: &sgr;e≦0.2×&sgr;b formula (1) Ui≧2.0×10−6×&sgr;ei formula (2) Ud≧4.

Abstract: A resin-sealed semiconductor device which comprises a lead frame having a die bond pad and an inner lead, a semiconductor chip installed on the die bond pad via a die bonding material and a sealing material for sealing the semiconductor chip and the lead frame, wherein properties of the die bonding material and the sealing material after curing satisfies the following formulae: &sgr;e≦0.2×&sgr;b formula (1) Ui≧2.0×10−6×&sgr;ei formula (2) Ud≧4.

Abstract: The minimum spacing between wires disposed on a printed circuit board of a printed circuit board ball grid array package is reduced. Wiring layers are narrower than in the prior art because they are not plated and because only one metal layer is plated on the wiring layers. The narrower wiring layers can be formed easily with small spaces between wires.

Abstract: The minimum spacing between wires disposed on a printed circuit board of a printed circuit board ball grid array package is reduced. Wiring layers are narrower than in the prior art because they are not plated and because only one metal layer is plated on the wiring layers. The narrower wiring layers can be formed easily with small spaces between wires.

Abstract: An evaluation board for evaluating electrical characteristics of an IC package has an electrically insulating support board having signal wire patterns for contact by a measurement probe formed on a first surface and mounting pads for contact with solder balls of an IC package formed on a surface. The signal wire patterns and the mounting pads are electrically connected with each other via through holes formed in the support board. The signal wire patterns are surrounded by and spaced from a ground pattern formed on the first surface.

Abstract: A semiconductor device having a rectangular COB substrate body, a die pad on the surface of the substrate body, a plurality of outer leads at the periphery of the substrate body, a plurality of wiring patterns on the surface of the substrate body connected to corresponding outer leads, a plurality of inner leads on the surface of the substrate body surrounding the die pad, connected to corresponding outer leads by the corresponding wiring patterns, and arranged in a substantially rectangular shape having sides, each respectively forming a predetermined acute angle with respect to a corresponding side of the substrate body whereby intervals between adjacent wiring patterns are longer than a predetermined length, a semiconductor chip having a plurality of electrode pads and mounted on the die pad, and a plurality of wires establishing electrical connections between the plurality of electrode pads of the semiconductor chip and corresponding inner leads.