Patents by Inventor Kazuhiko Yamamoto
Kazuhiko Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9564214Abstract: According to one embodiment, a memory device includes a controller; a first electrode and a second electrode connected to the controller; and a variable resistance layer provided between the first electrode and the second electrode. The variable resistance layer has a first structure, and a second structure. The controller configured to be able to perform a first operation of applying a first voltage between the first electrode and the second electrode, a second operation of applying a second voltage between the first electrode and the second electrode and determining whether or not the variable resistance layer has the second structure, and a third operation of applying a third voltage between the first electrode and the second electrode having the interposed variable resistance layer determined to not have the second structure in the second operation.Type: GrantFiled: August 4, 2015Date of Patent: February 7, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Yamamoto, Kunifumi Suzuki
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Publication number: 20160293839Abstract: A memory device includes a plurality of bit lines, including first and second bit lines, extending in a first direction away from a substrate, a plurality of word lines, including first and second word lines, extending in a second direction crossing the first direction and substantially parallel to a surface of the substrate, a first variable resistance film between the first word line and the first bit line and a second variable resistance film between the second word line and the second bit line, an insulating material electrically isolating the first and second word lines and the first and second bit lines, and a plurality of air gaps between the first and second bit lines.Type: ApplicationFiled: August 28, 2015Publication date: October 6, 2016Inventors: Kunifumi SUZUKI, Kazuhiko YAMAMOTO
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Publication number: 20160267967Abstract: According to one embodiment, a memory device includes a controller; a first electrode and a second electrode connected to the controller; and a variable resistance layer provided between the first electrode and the second electrode. The variable resistance layer has a first structure, and a second structure. The controller configured to be able to perform a first operation of applying a first voltage between the first electrode and the second electrode, a second operation of applying a second voltage between the first electrode and the second electrode and determining whether or not the variable resistance layer has the second structure, and a third operation of applying a third voltage between the first electrode and the second electrode having the interposed variable resistance layer determined to not have the second structure in the second operation.Type: ApplicationFiled: August 4, 2015Publication date: September 15, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Kazuhiko YAMAMOTO, Kunifumi SUZUKI
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Publication number: 20160268503Abstract: According to one embodiment, a memory device includes a first electrode; a variable resistance layer provided on the first electrode, the variable resistance layer including a chalcogenide compound having a crystal structure; and a second electrode provided on the variable resistance layer. The variable resistance layer includes a first region covering one of an upper surface of the first electrode or a lower surface of the second electrode, and a second region, a concentration of the chemical element being lower in the second region than in the first region.Type: ApplicationFiled: July 24, 2015Publication date: September 15, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Kunifumi SUZUKI, Kazuhiko YAMAMOTO
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Publication number: 20160240179Abstract: The object of the invention is to switch between plural sets of waveform data at desired timing while preventing noise. In response to an instruction for switching from a currently reproduced set of waveform data to another set of waveform data, either a switching position in the other set of waveform data or a switching in the currently reproduced set of waveform data is set as end timing for ending the reproduction of the currently reproduced set, with reference to switching position information of the two sets. If the switching position in the currently reproduced set is present within a 50 msec time range before a switching position in the other set that is present immediately after the switching instruction, the switching position in the currently reproduced set is set as the ending; if not, the switching position in the other set is set as the end timing.Type: ApplicationFiled: October 7, 2014Publication date: August 18, 2016Inventors: Norihiro UEMURA, Kazuhiko YAMAMOTO
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Patent number: 9404555Abstract: A centrifugal pendulum damping device includes a support body provided with a pair of first curved tracks and fixed to a rotating shaft, inertial masses provided with a pair of second curved tracks and supported on an outer peripheral part of the support body, and pins rollably fitted in a section where a first and second curved track intersect each other. Since the shapes of the pair of first curved tracks are different from each other and the shapes of the pair of second curved tracks are different from each other, the inertial mass moves rotationally and translationally in the peripheral direction of the support body, which improves damping low frequency vibration performance. Since the inertial mass moves rotationally, it is less likely to extend outside the region of the support body.Type: GrantFiled: November 8, 2013Date of Patent: August 2, 2016Assignee: HONDA MOTOR CO., LTD.Inventors: Fumiya Nishii, Kazuhiko Yamamoto
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Patent number: 9406721Abstract: A memory device includes a bit line extending in a first direction, a word line extending in a second direction crossing the first direction, an insulating material between the word line and another word line, a first layer made of a Group IV element, between the word line and the insulating material and between the word line and the bit line, and a second layer made of a compound of a Group V element and a Group VI element, between the insulating material and the bit line. The word line includes a first portion that is metallic and a second portion between the first portion and the first layer. In addition, a variable resistance portion in contact with the first and second layers and the second portion of the word line, contains the Group IV element and the compound of the Group V element and the Group VI element.Type: GrantFiled: August 31, 2015Date of Patent: August 2, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Yamamoto, Kunifumi Suzuki
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Publication number: 20160079522Abstract: According to one embodiment, a memory device includes a plug, a variable resistance film provided on the plug, and an electrode provided on the variable resistance film. The variable resistance film includes, a first portion having a superlattice structure, and a second portion having an amorphous structure.Type: ApplicationFiled: January 21, 2015Publication date: March 17, 2016Applicant: Kabushiki Kaisha ToshibaInventor: Kazuhiko YAMAMOTO
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Patent number: 9281473Abstract: According to one embodiment, a memory device includes a resistance change film, a selection element connected with the resistance change film in series, and an electrode connected with at least one of the resistance change film and the selection element. The selection element contains a chalcogenide compound, the chalcogenide compound containing silicon.Type: GrantFiled: July 9, 2015Date of Patent: March 8, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Kunifumi Suzuki, Kazuhiko Yamamoto
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Publication number: 20160034446Abstract: A desired character train included in a predefined reference character train, such as lyrics, is set as a target character train, and a user designates a target phoneme train that is indirectly representative of the target character train by use of a limited plurality of kinds of particular phonemes, such as vowels and a particular consonants. A reference phoneme train indirectly representative of the reference character train by use of the particular phonemes is prepared in advance. Based on a comparison between the target phoneme train and the reference phoneme train, a sequence of the particular phonemes in the reference phoneme train that matches the target phoneme train is identified, and a character sequence in the reference character train that corresponds to the identified sequence of the particular phonemes is identified. The thus-identified character sequence estimates the target character train.Type: ApplicationFiled: July 29, 2015Publication date: February 4, 2016Inventor: Kazuhiko YAMAMOTO
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Publication number: 20150292594Abstract: A centrifugal pendulum damping device includes a support body provided with a pair of first curved tracks and fixed to a rotating shaft, inertial masses provided with a pair of second curved tracks and supported on an outer peripheral part of the support body, and pins rollably fitted in a section where a first and second curved track intersect each other. Since the shapes of the pair of first curved tracks are different from each other and the shapes of the pair of second curved tracks are different from each other, the inertial mass moves rotationally and translationally in the peripheral direction of the support body, which improves damping low frequency vibration performance. Since the inertial mass moves rotationally, it is less likely to extend outside the region of the support body.Type: ApplicationFiled: November 8, 2013Publication date: October 15, 2015Applicant: HONDA MOTOR CO., LTD.Inventors: Fumiya Nishii, Kazuhiko Yamamoto
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Patent number: 9147388Abstract: Waveform data are stored in advance together with reference position information indicative of reference positions, in the waveform data, corresponding to reference timing, such as beat timing, and correction position information indicative of correction positions in the waveform data that are different from the reference positions. The reference timing is advanced when the waveform data are reproduced. In response to arrival of the reference timing, a deviation between a reproduction position of the currently reproduced waveform data and the reference position is evaluated. When the reproduction position arrives at the correction position, the reproduction position is corrected according to the evaluated deviation.Type: GrantFiled: June 25, 2013Date of Patent: September 29, 2015Assignee: Yamaha CorporationInventors: Norihiro Uemura, Takashi Mizuhiki, Kazuhiko Yamamoto, Atsuhiko Matsushita
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Publication number: 20150252882Abstract: A stepless transmission 100 includes: a primary damper 30 placed between an engine output shaft 21 and an input shaft 11 of a stepless transmission mechanism 10, and elastically connecting the engine output shaft 21 and the input shaft 11; a secondary damper 40 composed of a hub member 41 fixed to the input shaft 11 and a plurality of mass bodies 42 swingably attached to the hub member 41; and a start device 80 provided between external teeth 13a for output and a drive shaft 91.Type: ApplicationFiled: November 18, 2013Publication date: September 10, 2015Applicant: HONDA MOTOR CO., LTD.Inventors: Kazuhiko Yamamoto, Takashi Kitahara, Masaki Sagawa
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Patent number: 9099646Abstract: A manufacturing method includes forming a laminated body on a substrate. A mask layer is formed on the laminated body, and then a portion of the mask layer is removed to form an opening. Then, using the mask layer as a template, a first portion of the laminated body is removed to expose a portion of the substrate beneath the laminated body. The substrate is processed to alter the ratio between the size of mask opening and the removed first portion. A variable resistance layer is then deposited on exposed portions of the mask layer, the laminated body, and the substrate. Then the variable resistance layer is processed to remove at least a portion covering the substrate to permit contact with the underlying substrate. A second electrode layer is deposited to fill the removed portions of the laminated body.Type: GrantFiled: February 27, 2013Date of Patent: August 4, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hideki Inokuma, Kazuhiko Yamamoto
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Patent number: 9076417Abstract: A plurality of sets of waveform data and switchover position information indicative of, for each of the sets of waveform data, one or more possible switchover positions in the waveform data are prestored, and one set of waveform data is reproduced in accordance with the passage of time. During reproduction of a first set of waveform data, a second set of waveform data is designated at given timing in response to a user's instruction. Control is performed such that the waveform data to be reproduced is switched from the first set of waveform data over to the second set of waveform data in response to waveform data reproduction timing arriving at one of the possible switchover positions indicated by the switchover position information corresponding to the second set of waveform data. Reproduction of the second set of waveform data is started at the switchover position corresponding to the reproduction timing.Type: GrantFiled: June 25, 2013Date of Patent: July 7, 2015Assignee: Yamaha CorporationInventors: Norihiro Uemura, Takashi Mizuhiki, Kazuhiko Yamamoto, Atsuhiko Matsushita
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Patent number: 8895952Abstract: A nonvolatile storage device is formed by laminating a plurality of memory cell arrays, the memory cell array including a plurality of word lines, a plurality of bit lines, and memory cells. The memory cell includes a current rectifying device and a variable resistance device, the variable resistance device includes a lower electrode, an upper electrode, and a resistance change layer including a conductive nano material formed between the lower electrode and the upper electrode, one of the variable resistance devices provided adjacent to each other in the laminating direction has titanium oxide (TiOx) between the resistance change layer and the lower electrode serving as a cathode, the other of the variable resistance devices provided adjacent to each other in the laminating direction has titanium oxide (TiOx) between the resistance change layer and the upper electrode serving as a cathode.Type: GrantFiled: February 24, 2012Date of Patent: November 25, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shigeki Kobayashi, Kazuhiko Yamamoto, Kenji Aoyama, Shigeto Oshino, Kei Watanabe, Shinichi Nakao, Satoshi Ishikawa, Takeshi Yamaguchi
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Patent number: 8866119Abstract: According to one embodiment, a memory device includes a selection element layer, a nanomaterial aggregate layer, and a fine particle. The nanomaterial aggregate layer is stacked on the selection element layer. The nanomaterial aggregate layer has a plurality of micro conductive bodies aggregated with an interposed gap. The fine particle has at least a surface made of silicon oxynitride. The fine particle is dispersed between the micro conductive bodies in one portion of the nanomaterial aggregate layer piercing the nanomaterial aggregate layer in a thickness direction.Type: GrantFiled: March 18, 2011Date of Patent: October 21, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Yamamoto, Kenji Aoyama
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Patent number: 8860000Abstract: A nonvolatile semiconductor memory device in accordance with an embodiment comprises a lower electrode layer, a variable resistance layer, and an upper electrode layer. The lower electrode layer is provided over a substrate. The variable resistance layer is provided on the lower electrode layer and is configured such that an electrical resistance of the variable resistance layer can be changed. The upper electrode layer is provided on the variable resistance layer. The variable resistance layer comprises a carbon nanostructure and metal atoms. The carbon nanostructure is stacked to have a plurality of gaps. The metal atoms are diffused into the gaps.Type: GrantFiled: February 2, 2011Date of Patent: October 14, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Yamamoto, Takuya Konno
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Patent number: 8765565Abstract: According to one embodiment, a nonvolatile memory device includes a selection element layer and a nanomaterial aggregate layer. The selection element layer includes silicon. The nanomaterial aggregate layer is stacked on the selection element layer. The nanomaterial aggregate layer includes a plurality of micro conductive bodies and fine particles dispersed in a plurality of gaps between the micro conductive bodies. At least a surface of the fine particle is made of an insulating material other than silicon oxide.Type: GrantFiled: July 9, 2013Date of Patent: July 1, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Aoyama, Kazuhiko Yamamoto, Satoshi Ishikawa, Shigeto Oshino
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Publication number: 20140147942Abstract: According to one embodiment, a memory device includes a nanomaterial assembly layer, a first electrode layer and a second electrode layer. The nanomaterial assembly layer is formed of an assembly of a plurality of micro conductors via gaps between the micro conductors. The first electrode layer is provided on the nanomaterial assembly layer. The second electrode layer is provided on the first electrode layer.Type: ApplicationFiled: February 4, 2014Publication date: May 29, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Kenji AOYAMA, Kazuhiko YAMAMOTO, Satoshi ISHIKAWA, Shigeto OSHINO