Patents by Inventor Kazuhiro Fukutomi
Kazuhiro Fukutomi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11579773Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.Type: GrantFiled: December 7, 2021Date of Patent: February 14, 2023Assignee: Toshiba Memory CorporationInventors: Hiroshi Yao, Shinichi Kanno, Kazuhiro Fukutomi
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Publication number: 20220156182Abstract: According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.Type: ApplicationFiled: February 1, 2022Publication date: May 19, 2022Applicant: KIOXIA CORPORATIONInventors: Kazuhiro FUKUTOMI, Kenichiro YOSHII, Shinichi KANNO, Shigehiro ASANO
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Publication number: 20220100377Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.Type: ApplicationFiled: December 7, 2021Publication date: March 31, 2022Applicant: Toshiba Memory CorporationInventors: Hiroshi YAO, Shinichi KANNO, Kazuhiro FUKUTOMI
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Patent number: 11269766Abstract: According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.Type: GrantFiled: August 17, 2020Date of Patent: March 8, 2022Assignee: KIOXIA CORPORATIONInventors: Kazuhiro Fukutomi, Kenichiro Yoshii, Shinichi Kanno, Shigehiro Asano
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Patent number: 11216185Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.Type: GrantFiled: September 11, 2020Date of Patent: January 4, 2022Assignee: Toshiba Memory CorporationInventors: Hiroshi Yao, Shinichi Kanno, Kazuhiro Fukutomi
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Publication number: 20200409555Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.Type: ApplicationFiled: September 11, 2020Publication date: December 31, 2020Applicant: Toshiba Memory CorporationInventors: Hiroshi YAO, Shinichi KANNO, Kazuhiro FUKUTOMI
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Patent number: 10877664Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.Type: GrantFiled: August 25, 2014Date of Patent: December 29, 2020Assignee: Toshiba Memory CorporationInventors: Hiroshi Yao, Shinichi Kanno, Kazuhiro Fukutomi
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Patent number: 10871900Abstract: According to one embodiment, a memory system comprises a non-volatile semiconductor memory having a plurality of first storage areas, the first storage areas being capable of including one or more second storage areas, a plurality of third storage areas in which data is written in a first mode, and a plurality of fourth storage areas in which data is written in a second mode, the first mode being different from the second mode, and processing circuitry.Type: GrantFiled: July 24, 2018Date of Patent: December 22, 2020Assignee: Toshiba Memory CorporationInventors: Hiroshi Yao, Shinichi Kanno, Kazuhiro Fukutomi
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Publication number: 20200379901Abstract: According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.Type: ApplicationFiled: August 17, 2020Publication date: December 3, 2020Applicant: Toshiba Memory CorporationInventors: Kazuhiro FUKUTOMI, Kenichiro YOSHII, Shinichi KANNO, Shigehiro ASANO
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Patent number: 10783072Abstract: According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.Type: GrantFiled: January 23, 2019Date of Patent: September 22, 2020Assignee: Toshiba Memory CorporationInventors: Kazuhiro Fukutomi, Kenichiro Yoshii, Shinichi Kanno, Shigehiro Asano
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Patent number: 10572187Abstract: According to an embodiment, a controller includes a write control unit configured to make a control that converts data requested to be written by an external device into pieces of cluster data with a size of a cluster of a storage medium, compresses each piece of cluster data, determines a corresponding physical address of a write destination in the storage medium according to a predetermined rule, and writes the compressed pieces of cluster data to the storage medium using the physical address of the write destination. The write control unit also makes a control that writes a correspondence between the physical address and a corresponding logical address to a storage unit. The controller also includes a read control unit configured to a control that reads a piece of cluster data from the storage medium using an acquired physical address, and decompresses the read piece of cluster data.Type: GrantFiled: July 11, 2016Date of Patent: February 25, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kazuhiro Fukutomi, Shinichi Kanno
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Patent number: 10417124Abstract: A storage system connectable to a host includes a plurality of interface units, a plurality of semiconductor memory modules, each being detachably coupled with one of the interface units, and a controller configured to maintain an address conversion table indicating mappings between logical addresses and physical addresses of memory locations in the semiconductor memory modules. When the controller determines that a first semiconductor memory module needs to be detached, the controller converts physical addresses of the first semiconductor memory module into corresponding logical addresses using the address conversion table and copies valid data stored in the corresponding logical addresses to another semiconductor memory module and update the address conversion table to indicate new mappings for the corresponding logical addresses of the valid data.Type: GrantFiled: August 24, 2018Date of Patent: September 17, 2019Assignee: Toshiba Memory CorporationInventors: Kazuhiro Fukutomi, Shingo Tanaka
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Patent number: 10366003Abstract: According to an embodiment, a controller is connected to an external storage device and controls access to a semiconductor storage device including blocks each including memory cell groups each having memory cells. The block includes pages associated with each memory cell group. A writing process for each memory cell group includes writing stages. The controller includes a determining unit configured to determine data to be transferred to the page required in the writing process for a first memory cell group before the writing stage first starts when the writing stage is performed; a reading unit configured to read the determined data from the semiconductor storage device and to store the read data in the external storage device before the writing stage starts; and a writing unit configured to perform the writing process using the data stored in the external storage device when the writing stage is performed.Type: GrantFiled: July 20, 2016Date of Patent: July 30, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kazuhiro Fukutomi, Shinichi Kanno, Shigehiro Asano
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Publication number: 20190220215Abstract: According to one embodiment, a data storage device includes a first storage unit, a second storage unit, a first queue, a second queue, and a distributor. The second storage unit is used as a cache of the first storage unit and has a lower write transfer rate and a faster response time than the first storage unit. The first queue corresponds to the first storage unit. The second queue corresponds to the second storage unit. The distributor distributes a write command received presently from a host to one of the first and second queues in which the number of write commands registered presently is smaller.Type: ApplicationFiled: March 27, 2019Publication date: July 18, 2019Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shinichi Kanno, Kazuhiro Fukutomi
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Patent number: 10339020Abstract: According to one embodiment, an object storage system is configured to store a key and a value in association with each other. The object storage system includes a first storage region, a second storage region and a controller. The controller is configured to control the first storage region and the second storage region. The controller is configured to store the value in the first storage region, and to store first information and second information in the second storage region. The first information is used for managing an association between the key and a storage position of the value. The second information is used for managing a position of a defective storage area in the first storage region.Type: GrantFiled: September 15, 2016Date of Patent: July 2, 2019Assignee: Toshiba Memory CorporationInventors: Kazuhiro Fukutomi, Shingo Tanaka
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Publication number: 20190179745Abstract: According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.Type: ApplicationFiled: January 23, 2019Publication date: June 13, 2019Applicant: Toshiba Memory CorporationInventors: Kazuhiro Fukutomi, Kenichiro Yoshii, Shinichi Kanno, Shigehiro Asano
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Patent number: 10268415Abstract: According to one embodiment, a data storage device includes a first storage unit, a second storage unit, a first queue, a second queue, and a distributor. The second storage unit is used as a cache of the first storage unit and has a lower write transfer rate and a faster response time than the first storage unit. The first queue corresponds to the first storage unit. The second queue corresponds to the second storage unit. The distributor distributes a write command received presently from a host to one of the first and second queues in which the number of write commands registered presently is smaller.Type: GrantFiled: July 29, 2016Date of Patent: April 23, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Shinichi Kanno, Kazuhiro Fukutomi
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Patent number: 10229053Abstract: According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.Type: GrantFiled: February 21, 2018Date of Patent: March 12, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kazuhiro Fukutomi, Kenichiro Yoshii, Shinichi Kanno, Shigehiro Asano
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Publication number: 20180364924Abstract: A storage system connectable to a host includes a plurality of interface units, a plurality of semiconductor memory modules, each being detachably coupled with one of the interface units, and a controller configured to maintain an address conversion table indicating mappings between logical addresses and physical addresses of memory locations in the semiconductor memory modules. When the controller determines that a first semiconductor memory module needs to be detached, the controller converts physical addresses of the first semiconductor memory module into corresponding logical addresses using the address conversion table and copies valid data stored in the corresponding logical addresses to another semiconductor memory module and update the address conversion table to indicate new mappings for the corresponding logical addresses of the valid data.Type: ApplicationFiled: August 24, 2018Publication date: December 20, 2018Inventors: Kazuhiro FUKUTOMI, Shingo TANAKA
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Publication number: 20180356984Abstract: According to one embodiment, a memory system comprises a non-volatile semiconductor memory having a plurality of first storage areas, the first storage areas being capable of including one or more second storage areas, a plurality of third storage areas in which data is written in a first mode, and a plurality of fourth storage areas in which data is written in a second mode, the first mode being different from the second mode, and processing circuitry.Type: ApplicationFiled: July 24, 2018Publication date: December 13, 2018Applicant: Toshiba Memory CorporationInventors: Hiroshi YAO, Shinichi KANNO, Kazuhiro FUKUTOMI