Abstract: According to one embodiment, a data storage device includes a first storage unit, a second storage unit, a first queue, a second queue, and a distributor. The second storage unit is used as a cache of the first storage unit and has a lower write transfer rate and a faster response time than the first storage unit. The first queue corresponds to the first storage unit. The second queue corresponds to the second storage unit. The distributor distributes a write command received presently from a host to one of the first and second queues in which the number of write commands registered presently is smaller.

Abstract: According to an embodiment, a controller includes a write control unit configured to make a control that converts data requested to be written by an external device into pieces of cluster data with a size of a cluster of a storage medium, compresses each piece of cluster data, determines a corresponding physical address of a write destination in the storage medium according to a predetermined rule, and writes the compressed pieces of cluster data to the storage medium using the physical address of the write destination. The write control unit also makes a control that writes a correspondence between the physical address and a corresponding logical address to a storage unit. The controller also includes a read control unit configured to a control that reads a piece of cluster data from the storage medium using an acquired physical address, and decompresses the read piece of cluster data.

Abstract: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory including first blocks configured to store an address indicating a data storage position, and second blocks configured to store the data, a first table configured to store a first address including first information and second information, the second information indicating a data storage position in the first block, and a second table configured to convert the first information into third information, the first information having a first data size by which one entry of the second table can be identified, the third information having a second data size which is larger than the first data size and by which one of the first blocks and the second blocks can be identified.

Abstract: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.

Abstract: According an embodiment, a semiconductor memory device includes a semiconductor memory chip to store plural pieces of data that are written and read in units of a page and are erased in units of a block including plural pages; a discarding unit to discard, after the data is written in the semiconductor memory chip with a logic address being designated, at least a portion of valid data among the plural pieces of data; a compaction unit to write the valid data excluding the discarded data in a second block among the valid data stored in a first block and erase the first block; and a controller to output, in response to a request for reading the discarded data, a response indicating that the data is unable to be read. When all the valid data included in a block are discarded, the discarding unit erases the block.

Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.

Abstract: According to one embodiment, a data storage device includes a first storage unit, a second storage unit, a first queue, a second queue, and a distributor. The second storage unit is used as a cache of the first storage unit and has a lower write transfer rate and a faster response time than the first storage unit. The first queue corresponds to the first storage unit. The second queue corresponds to the second storage unit. The distributor distributes a write command received presently from a host to one of the first and second queues in which the number of write commands registered presently is smaller.

Abstract: According to one embodiment, a data storage device includes a first storage medium, a second nonvolatile storage medium, and a controller. The controller allows write data requested to be written from a host device to be recorded into the first storage medium which is a cache memory of the second storage medium according to a first recording method and allows read data that is read from the second storage medium to be recorded into the first storage medium according to a second recording method that provides lower reliability but larger memory capacity than the first recording method.

Abstract: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.

Abstract: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory including first blocks configured to store an address indicating a data storage position, and second blocks configured to store the data, a first table configured to store a first address including first information and second information, the second information indicating a data storage position in the first block, and a second table configured to convert the first information into third information, the first information having a first data size by which one entry of the second table can be identified, the third information having a second data size which is larger than the first data size and by which one of the first blocks and the second blocks can be identified.

Abstract: According to one embodiment, apparatus includes non-volatile memory chips, and a first controller which executes processing for reading first valid data stored in a first storage region of a first non-volatile memory chip in the non-volatile memory chips, processing for storing the first valid data in a buffer memory, processing for writing the first valid data stored in the buffer memory in a second storage region of the first non-volatile memory chip, and processing for erasing data stored in the first storage region. Each of the non-volatile memory chips comprises erase blocks. Each erase block includes write blocks. Each of the first storage region and the second storage region includes at least one erase block.

Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.

Abstract: According to an embodiment, a memory system includes semiconductor memories each having a plurality of blocks; a first table; a receiving unit; a generating unit; a second table; and a writing unit. The first table includes a plurality of memory areas each associated with each block and in each of which defect information is stored. The generating unit generates a set of blocks by selecting one block to which data are to be written in each semiconductor memory based on an index number indicating one of a plurality of rows in the first table and the first table. In the second table, an index number and a channel number are stored for each logical block address in association with one another. When a write command is received by the receiving unit, the writing unit writes data to a block associated with a selected channel number among blocks constituting the set.

Abstract: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.

Abstract: According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.

Abstract: According to one embodiment, a controller controls writing into and reading from a storage apparatus that includes a first data-storage unit and a second data-storage unit. The second data-storage unit stores user data and parity data of the user data. The first data-storage unit stores the parity data. The controller includes a parity updating unit and a parity writing unit. When parity data is updated, the parity updating unit writes the updated parity data into the first data-storage unit. When a certain requirement is satisfied, the parity writing unit reads the parity data written in the first data-storage unit, and writes the parity data thus read into the second data-storage unit.

Abstract: According an embodiment, a semiconductor memory device includes a semiconductor memory chip to store plural pieces of data that are written and read in units of a page and are erased in units of a block including plural pages; a discarding unit to discard, after the data is written in the semiconductor memory chip with a logic address being designated, at least a portion of valid data among the plural pieces of data; a compaction unit to write the valid data excluding the discarded data in a second block among the valid data stored in a first block and erase the first block; and a controller to output, in response to a request for reading the discarded data, a response indicating that the data is unable to be read. When all the valid data included in a block are discarded, the discarding unit erases the block.

Abstract: According to an embodiment, a controller includes a write control unit configured to make a control that converts data requested to be written by an external device into pieces of cluster data with a size of a cluster of a storage medium, compresses each piece of cluster data, determines a corresponding physical address of a write destination in the storage medium according to a predetermined rule, and writes the compressed pieces of cluster data to the storage medium using the physical address of the write destination. The write control unit also makes a control that writes a correspondence between the physical address and a corresponding logical address to a storage unit. The controller also includes a read control unit configured to a control that reads a piece of cluster data from the storage medium using an acquired physical address, and decompresses the read piece of cluster data.