Patents by Inventor Kazuhiro Hotta

Kazuhiro Hotta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220301135
    Abstract: A semiconductor inspection method by an observation system includes a step of acquiring a first pattern image showing a pattern of a semiconductor device, a step of acquiring a second pattern image showing a pattern of the semiconductor device and having a different resolution from a resolution of the first pattern image, a step of learning a reconstruction process of the second pattern image using the first pattern image as training data by machine learning, and reconstructing the second pattern image into a reconstructed image having a different resolution from a resolution of the second pattern image by the reconstruction process based on a result of the learning, and a step of performing alignment based on a region calculated to have a high degree of certainty by the reconstruction process in the reconstructed image and the first pattern image.
    Type: Application
    Filed: April 16, 2020
    Publication date: September 22, 2022
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomochika TAKESHIMA, Takafumi HIGUCHI, Kazuhiro HOTTA
  • Publication number: 20220301197
    Abstract: An observation system includes a detector that detects light from a semiconductor device and outputs a detection signal, a 2D camera, an optical device that guides light to the detector and the 2D camera, an image processing unit that generates a first optical image of the semiconductor device based on the detection signal and receives an input of a first CAD image, an image analysis unit that learns a conversion process of the first CAD image by machine learning using the first optical image as training data, and converts the first CAD image into a second CAD image resembling the first optical image by the conversion process based on a result of the learning, and an alignment unit that performs alignment based on a second optical image and the second CAD image.
    Type: Application
    Filed: April 16, 2020
    Publication date: September 22, 2022
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomochika TAKESHIMA, Takafumi HIGUCHI, Kazuhiro HOTTA
  • Publication number: 20220221411
    Abstract: A semiconductor apparatus examination method includes a step of acquiring a first interference waveform based on signals from a plurality of drive elements according to light from a first light beam spot including the plurality of drive elements in a semiconductor apparatus, a step of acquiring a second interference waveform based on signals from the plurality of drive elements according to light from a second light beam spot having a region configured to partially overlap the first spot and including the plurality of drive elements, and a step of separating a waveform signal for each of the drive elements in the first and second spots based on the first and second interference waveforms.
    Type: Application
    Filed: April 9, 2020
    Publication date: July 14, 2022
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomochika TAKESHIMA, Takafumi HIGUCHI, Kazuhiro HOTTA
  • Publication number: 20220206063
    Abstract: A semiconductor device examination method includes a step of acquiring a first interference waveform based on signals from a plurality of drive elements according to light from a first light beam spot including the plurality of drive elements in a semiconductor device, a step of acquiring a second interference waveform based on signals from the plurality of drive elements according to light from a second light beam spot having a region configured to partially overlap the first spot and including the plurality of drive elements, and a step of separating a waveform signal for each of the drive elements in the first and second spots based on the first and second interference waveforms.
    Type: Application
    Filed: April 9, 2020
    Publication date: June 30, 2022
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomochika TAKESHIMA, Takafumi HIGUCHI, Kazuhiro HOTTA
  • Publication number: 20210373071
    Abstract: An inspection apparatus includes a light sensor that detects light from a semiconductor device to which an electric signal has been input, an optical system that guides light from the semiconductor device to the light sensor, and a control device electrically connected to the light sensor. The control device includes a measurement unit that acquires waveform data obtained by optical measurement for each of a plurality of positions on a defective semiconductor device and waveform data obtained by the optical measurement for each of a plurality of positions on a non-defective semiconductor device, a calculation unit that calculates a degree of correspondence between the waveform data of the defective semiconductor device and the waveform data of the non-defective semiconductor device, and an analysis unit that analyzes a defective part of the defective semiconductor device on the basis of the degree of correspondence for each of the plurality of positions.
    Type: Application
    Filed: September 5, 2018
    Publication date: December 2, 2021
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Akira SHIMASE, Kazuhiro HOTTA
  • Patent number: 11181361
    Abstract: A semiconductor device inspection apparatus includes: a light sensor that detects light from a semiconductor device as a DUT to which an electric signal has been input; an optical system that guides light from the semiconductor device to the light sensor; and a control device electrically connected to the light sensor. The control device includes: a data reading unit that reads mask data indicating a mask layout of the semiconductor device; a search unit that searches for a position of a transistor in the semiconductor device on the basis of polygon data of a gate layer of the semiconductor device included in the mask data; a setting unit that sets the searched position of the transistor as an optical measurement target position; and a measurement unit that performs optical measurement for the set optical measurement target position to acquire a measurement result.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: November 23, 2021
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Akira Shimase, Kazuhiro Hotta
  • Patent number: 11062458
    Abstract: An extraction section extracts, from each of a plurality of non-defective product images which show the appearance of the inspection target determined to be a non-defective product, the non-defective vector representing a feature of each non-defective product image. A generation section generates a transformation matrix by using a plurality of non-defective product vectors extracted by the extraction section. The transformation matrix is a matrix representing sequentially performing first mapping for mapping the feature vector to a feature space and second mapping for mapping a result of the first mapping to the whole space to which the feature vector belongs. An adjusting section adjusts each element of the transformation matrix generated by the generation section by using, as learning data, the feature vector extracted from a pseudo defect image.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: July 13, 2021
    Assignees: DENSO CORPORATION, MEIJO UNIVERSITY
    Inventors: Yoshio Yokoyama, Yoshitaka Sakamoto, Kazuhiro Hotta, Tomokazu Murata
  • Publication number: 20200333134
    Abstract: A semiconductor device inspection apparatus includes: a light sensor that detects light from a semiconductor device as a DUT to which an electric signal has been input; an optical system that guides light from the semiconductor device to the light sensor; and a control device electrically connected to the light sensor. The control device includes: a data reading unit that reads mask data indicating a mask layout of the semiconductor device; a search unit that searches for a position of a transistor in the semiconductor device on the basis of polygon data of a gate layer of the semiconductor device included in the mask data; a setting unit that sets the searched position of the transistor as an optical measurement target position; and a measurement unit that performs optical measurement for the set optical measurement target position to acquire a measurement result.
    Type: Application
    Filed: September 5, 2018
    Publication date: October 22, 2020
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Akira SHIMASE, Kazuhiro HOTTA
  • Publication number: 20200111217
    Abstract: An extraction section extracts, from each of a plurality of non-defective product images which show the appearance of the inspection target determined to be a non-defective product, the non-defective vector representing a feature of each non-defective product image. A generation section generates a transformation matrix by using a plurality of non-defective product vectors extracted by the extraction section. The transformation matrix is a matrix representing sequentially performing first mapping for mapping the feature vector to a feature space and second mapping for mapping a result of the first mapping to the whole space to which the feature vector belongs. An adjusting section adjusts each element of the transformation matrix generated by the generation section by using, as learning data, the feature vector extracted from a pseudo defect image.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Yoshio YOKOYAMA, Yoshitaka SAKAMOTO, Kazuhiro HOTTA, Tomokazu MURATA
  • Patent number: 9734571
    Abstract: An image processing method includes a step of acquiring a measured image G1B measured from a semiconductor device S and a first pattern image G2B showing a pattern of the semiconductor device S, a step of acquiring a reference measured image G3B measured from a reference semiconductor device SR being the semiconductor device S or a semiconductor device different from the semiconductor device S and a second pattern image G4B showing a pattern of the reference semiconductor device SR, a step of acquiring matching information indicating a correlation of the first pattern image G2B and the second pattern image G4B, and a step of determining a difference of the measured image G1B and the reference measured image G3B based on the matching information to acquire a comparative image G5B.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: August 15, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventor: Kazuhiro Hotta
  • Patent number: 9536300
    Abstract: An image processing method in an observation system 1A includes a step of acquiring a measured image G1 measured from a semiconductor device S and a first pattern image G2 showing a pattern of the semiconductor device S corresponding to the measured image G1, a step of acquiring a second pattern image G3 showing a pattern of the semiconductor device S, a step of acquiring matching information indicating a correlation of the first pattern image G2 and the second pattern image G3 based on the first pattern image G2 and the second pattern image G3, and a step of superimposing the second pattern image G3 and the measured image G1 based on the matching information to acquire a superimposed image G4.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: January 3, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventor: Kazuhiro Hotta
  • Publication number: 20150187059
    Abstract: An image processing method includes a step of acquiring a measured image G1B measured from a semiconductor device S and a first pattern image G2B showing a pattern of the semiconductor device S, a step of acquiring a reference measured image G3B measured from a reference semiconductor device SR being the semiconductor device S or a semiconductor device different from the semiconductor device S and a second pattern image G4B showing a pattern of the reference semiconductor device SR, a step of acquiring matching information indicating a correlation of the first pattern image G2B and the second pattern image G4B, and a step of determining a difference of the measured image G1B and the reference measured image G3B based on the matching information to acquire a comparative image G5B.
    Type: Application
    Filed: December 24, 2014
    Publication date: July 2, 2015
    Inventor: Kazuhiro HOTTA
  • Publication number: 20150187058
    Abstract: An image processing method in an observation system 1A includes a step of acquiring a measured image G1 measured from a semiconductor device S and a first pattern image G2 showing a pattern of the semiconductor device S corresponding to the measured image G1, a step of acquiring a second pattern image G3 showing a pattern of the semiconductor device S, a step of acquiring matching information indicating a correlation of the first pattern image G2 and the second pattern image G3 based on the first pattern image G2 and the second pattern image G3, and a step of superimposing the second pattern image G3 and the measured image G1 based on the matching information to acquire a superimposed image G4.
    Type: Application
    Filed: December 24, 2014
    Publication date: July 2, 2015
    Inventor: Kazuhiro HOTTA
  • Patent number: 8047810
    Abstract: A double-headed piston type compressor connected with an external device is provided. The compressor includes a plurality of cylinder bore pairs, double-headed pistons, a first rotary valve, a second rotary valve, first suction passages, and second suction passages. In each cylinder bore pair, a first time period from a first top dead center timing, which is timing when the double-headed piston reaches a top dead center in a first compression chamber, to a first communication start timing, which is timing when a first introduction passage starts to communicate with a first suction passage, is different from a second time period from a second top dead center timing, which is timing when the double-headed piston reaches a top dead center in a second compression chamber, to a second communication start timing, which is timing when the second introduction passage starts to communicate with a second suction passages.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: November 1, 2011
    Assignee: Kabushiki Kaisha Toyota Jidoshokki
    Inventors: Manabu Sugiura, Akio Saiki, Norikazu Deto, Kazuhiro Hotta
  • Patent number: 7865012
    Abstract: A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure. The failure analyzer 13 extracts as a candidate interconnection for a failure, an interconnection passing an analysis region, out of a plurality of interconnections, using interconnection information to describe a configuration of interconnections in the semiconductor device by a pattern data group of interconnection patterns in respective layers, and, for extracting the candidate interconnection, it performs an equipotential trace of the interconnection patterns using the pattern data group, thereby extracting the candidate interconnection.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: January 4, 2011
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Toshiyuki Majima, Akira Shimase, Hirotoshi Terada, Kazuhiro Hotta
  • Patent number: 7805691
    Abstract: A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure. The failure analyzer 13 extracts candidate nets passing at least one of analysis regions set from the failure observed image, out of a plurality of nets in the semiconductor device, and passage counts of the respective candidate nets through the analysis regions, selects a candidate net with the largest passage count as a first failure net, and selects a second failure net with attention to analysis regions where the first failure net does not pass. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: September 28, 2010
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Toshiyuki Majima, Akira Shimase, Hirotoshi Terada, Kazuhiro Hotta
  • Patent number: 7752594
    Abstract: A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring at least a pattern image P1 of a semiconductor device, a layout information acquirer 12 for acquiring a layout image P3, a failure analyzer 13 for analyzing a failure of the semiconductor device, and an analysis screen display controller 14 for letting a display device 40 display information about the failure analysis. The analysis screen display controller 14 generates a superimposed image in which the pattern image P1 and the layout image P3 are superimposed, as an image of the semiconductor device to be displayed by the display device 40, and sets a transmittance of the layout image P3 relative to the pattern image P1 in the superimposed image. This substantializes a semiconductor failure analysis apparatus, analysis method, analysis program, and analysis system capable of securely and efficiently carrying out the analysis of the failure of the semiconductor device.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: July 6, 2010
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Masahiro Takeda, Kazuhiro Hotta
  • Publication number: 20080286125
    Abstract: A double-headed piston type compressor connected with an external device is provided. The compressor includes a plurality of cylinder bore pairs, double-headed pistons, a first rotary valve, a second rotary valve, first suction passages, and second suction passages. In each cylinder bore pair, a first time period from a first top dead center timing, which is timing when the double-headed piston reaches a top dead center in a first compression chamber, to a first communication start timing, which is timing when a first introduction passage starts to communicate with a first suction passage, is different from a second time period from a second top dead center timing, which is timing when the double-headed piston reaches a top dead center in a second compression chamber, to a second communication start timing, which is timing when the second introduction passage starts to communicate with a second suction passages.
    Type: Application
    Filed: January 29, 2008
    Publication date: November 20, 2008
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Manabu SUGIURA, Akio SAIKI, Norikazu DETO, Kazuhiro HOTTA
  • Publication number: 20070290696
    Abstract: A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure of the semiconductor device. The failure analyzer 13 has an analysis region setter for comparing an intensity distribution in the failure observed image with a predetermined intensity threshold to extract a reaction region arising from a failure, and for setting an analysis region used in the failure analysis of the semiconductor device, in correspondence to the reaction region. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.
    Type: Application
    Filed: October 26, 2006
    Publication date: December 20, 2007
    Inventors: Toshiyuki Majima, Akira Shimase, Hirotoshi Terada, Kazuhiro Hotta
  • Patent number: D576179
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: September 2, 2008
    Assignee: Kabushiki Kaisha Toyota Jidoshokki
    Inventors: Jun Kondo, Hitoshi Inukai, Kazuhiro Hotta, Hiroko Asaoka