Patents by Inventor Kazuhiro Iizuka
Kazuhiro Iizuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10729926Abstract: The method for detoxifying asbestos disclosed here includes: preparing an asbestos-containing substance that contains at least one type of asbestos; preparing an asbestos treatment agent that contains a mineral acid, N-methyl-2-pyrrolidone and a fluoride; and bringing the asbestos-containing substance into contact with the asbestos treatment agent so as to detoxify asbestos in the asbestos-containing substance. Due to this configuration, asbestos in the asbestos-containing substance can be favorably detoxified.Type: GrantFiled: July 6, 2018Date of Patent: August 4, 2020Assignees: KOKIGUMI CO., LTD., NATIONAL UNIVERSITY CORPORATION TOTTORI UNIVERSITYInventors: Toshimitsu Myoga, Koichi Takahashi, Kazuhiro Iizuka, Yuhei Matsubara, Toshiyuki Tanaka, Hisaki Okamoto
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Patent number: 10722742Abstract: The method for detoxifying asbestos disclosed here includes: preparing an asbestos-containing substance that contains at least one type of asbestos; preparing an asbestos treatment agent that contains a mineral acid and N-methyl-2-pyrrolidone; and bringing the asbestos-containing substance into contact with the asbestos treatment agent so as to detoxify asbestos in the asbestos-containing substance. Due to this configuration, asbestos in the asbestos-containing substance can be favorably detoxified.Type: GrantFiled: July 6, 2018Date of Patent: July 28, 2020Assignees: KOKIGUMI CO., LTD, NATIONAL UNIVERSITY CORPORATION TOTTORI UNIVERSITYInventors: Toshimitsu Myoga, Koichi Takahashi, Kazuhiro Iizuka, Yuhei Matsubara, Toshiyuki Tanaka, Hisaki Okamoto
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Publication number: 20190374805Abstract: The method for detoxifying asbestos disclosed here includes: preparing an asbestos-containing substance that contains at least one type of asbestos; preparing an asbestos treatment agent that contains a mineral acid and N-methyl-2-pyrrolidone; and bringing the asbestos-containing substance into contact with the asbestos treatment agent so as to detoxify asbestos in the asbestos-containing substance. Due to this configuration, asbestos in the asbestos-containing substance can be favorably detoxified.Type: ApplicationFiled: July 6, 2018Publication date: December 12, 2019Applicants: KOKIGUMI CO., LTD, NATIONAL UNIVERSITY CORPORATION TOTTORI UNIVERSITYInventors: Toshimitsu MYOGA, Koichi TAKAHASHI, Kazuhiro IIZUKA, Yuhei MATSUBARA, Toshiyuki TANAKA, Hisaki OKAMOTO
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Publication number: 20190358480Abstract: The method for detoxifying asbestos disclosed here includes: preparing an asbestos-containing substance that contains at least one type of asbestos; preparing an asbestos treatment agent that contains a mineral acid, N-methyl-2-pyrrolidone and a fluoride; and bringing the asbestos-containing substance into contact with the asbestos treatment agent so as to detoxify asbestos in the asbestos-containing substance. Due to this configuration, asbestos in the asbestos-containing substance can be favorably detoxified.Type: ApplicationFiled: July 6, 2018Publication date: November 28, 2019Applicants: KOKIGUMI CO., LTD, KOKIGUMI CO., LTD, NATIONAL UNIVERSITY CORPORATION TOTTORI UNIVERSITY, NATIONAL UNIVERSITY CORPORATION TOTTORI UNIVERSITYInventors: Toshimitsu MYOGA, Koichi TAKAHASHI, Kazuhiro IIZUKA, Yuhei MATSUBARA, Toshiyuki TANAKA, Hisaki OKAMOTO
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Patent number: 10019793Abstract: According to an embodiment, A test system includes: a moving unit configured to move a test object, the test object including a first surface, a mark being printed on the first surface; a first imaging device configured to photograph the first surface of test object to obtain a first image; a cutter configured to scratch the first surface; a first unit configured to attach a tape to the first surface; a second unit configured to detach the tape from the first surface; a second imaging device configured to photograph the first surface after detaching the tape to obtain a second image; and a controller configured to compare the first image and the second image to output a comparison result.Type: GrantFiled: March 30, 2015Date of Patent: July 10, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kazuhiro Iizuka, Kohei Noma
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Publication number: 20150279015Abstract: According to an embodiment, A test system includes: a moving unit configured to move a test object, the test object including a first surface, a mark being printed on the first surface; a first imaging device configured to photograph the first surface of test object to obtain a first image; a cutter configured to scratch the first surface; a first unit configured to attach a tape to the first surface; a second unit configured to detach the tape from the first surface; a second imaging device configured to photograph the first surface after detaching the tape to obtain a second image; and a controller configured to compare the first image and the second image to output a comparison result.Type: ApplicationFiled: March 30, 2015Publication date: October 1, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Kazuhiro IIZUKA, Kohei NOMA
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Publication number: 20150070043Abstract: A method of inspecting a semiconductor device in which a plurality of conductive members is stacked includes drilling through the conductive layers using a drill and, while drilling, monitoring a probe device that is electrically connected to one of the conductive layers. When an electrical connection is established between the drill and probe device, the drilling is halted and said one of the conductive layers is inspected.Type: ApplicationFiled: February 28, 2014Publication date: March 12, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tomokazu NAKAI, Kazuhiro IIZUKA
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Publication number: 20150064876Abstract: A separating device separates a chip mounted on a substrate through a connecting material, from the substrate. The separating device includes a heating unit that heats the substrate at a temperature less than a melting point of the connecting material.Type: ApplicationFiled: February 28, 2014Publication date: March 5, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Kazuhiro IIZUKA
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Patent number: 7833836Abstract: A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semiconductor chip with the adhesive layer disposed therebetween and is wire-bonded to the printed circuit board by wire bonding. Likewise, at least one semiconductor chip is sequentially stacked on the thus attained semiconductor structure to form a stack MCP.Type: GrantFiled: December 31, 2008Date of Patent: November 16, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Shinya Takyu, Kazuhiro Iizuka, Mika Kiritani
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Publication number: 20090111218Abstract: A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semiconductor chip with the adhesive layer disposed therebetween and is wire-bonded to the printed circuit board by wire bonding. Likewise, at least one semiconductor chip is sequentially stacked on the thus attained semiconductor structure to form a stack MCP.Type: ApplicationFiled: December 31, 2008Publication date: April 30, 2009Inventors: Shinya TAKYU, Kazuhiro Iizuka, Mika Kiritani
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Patent number: 7482695Abstract: A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semiconductor chip with the adhesive layer disposed therebetween and is wire-bonded to the printed circuit board by wire bonding. Likewise, at least one semiconductor chip is sequentially stacked on the thus attained semiconductor structure to form a stack MCP.Type: GrantFiled: July 13, 2007Date of Patent: January 27, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Shinya Takyu, Kazuhiro Iizuka, Mika Kiritani
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Publication number: 20070262445Abstract: A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semiconductor chip with the adhesive layer disposed therebetween and is wire-bonded to the printed circuit board by wire bonding. Likewise, at least one semiconductor chip is sequentially stacked on the thus attained semiconductor structure to form a stack MCP.Type: ApplicationFiled: July 13, 2007Publication date: November 15, 2007Inventors: Shinya Takyu, Kazuhiro Iizuka, Mika Kiritani
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Patent number: 7285864Abstract: A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semiconductor chip with the adhesive layer disposed therebetween and is wire-bonded to the printed circuit board by wire bonding. Likewise, at least one semiconductor chip is sequentially stacked on the thus attained semiconductor structure to form a stack MCP.Type: GrantFiled: July 15, 2004Date of Patent: October 23, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Shinya Takyu, Kazuhiro Iizuka, Mika Kiritani
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Publication number: 20050179127Abstract: A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semiconductor chip with the adhesive layer disposed therebetween and is wire-bonded to the printed circuit board by wire bonding. Likewise, at least one semiconductor chip is sequentially stacked on the thus attained semiconductor structure to form a stack MCP.Type: ApplicationFiled: July 15, 2004Publication date: August 18, 2005Inventors: Shinya Takyu, Kazuhiro Iizuka, Mika Kiritani
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Publication number: 20050026326Abstract: A manufacturing method of a semiconductor device to electrically connect a semiconductor chip and a wiring board via a first bump electrode, at least one of the semiconductor chip and the wiring board having a second bump electrode or a connection electrode, the method includes: collectively performing flip chip bonding of the semiconductor chip to the wiring board and resin sealing processing between the semiconductor chip and the wiring board; wherein the collective processing includes controlling viscosity of a sealing resin with ultrasonic vibration so that the first bump electrode penetrates the sealing resin; and using the ultrasonic vibration to electrically connect the first bump electrode to the second bump electrode when at least one of the semiconductor chip and the wiring board has the second bump electrode, or using the ultrasonic vibration to electrically connect the first bump electrode to the connection electrode when at least one of the semiconductor chip and the wiring board has the connectiType: ApplicationFiled: May 12, 2004Publication date: February 3, 2005Inventors: Mika Kiritani, Shinya Takyu, Kazuhiro Iizuka
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Patent number: 6838316Abstract: A bump is formed on at least one of a semiconductor chip and printed circuit board. A sealing material is applied to the surface of one of the semiconductor chip and printed circuit board. The printed circuit board is flip-chip-connected to the semiconductor chip via the sealing material while ultrasonic waves are applied to the printed circuit board to promote bonding by the bump.Type: GrantFiled: March 5, 2003Date of Patent: January 4, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiro Iizuka, Shinya Takyu
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Publication number: 20030180986Abstract: A bump is formed on at least one of a semiconductor chip and printed circuit board. A sealing material is applied to the surface of one of the semiconductor chip and printed circuit board. The printed circuit board is flip-chip-connected to the semiconductor chip via the sealing material while ultrasonic waves are applied to the printed circuit board to promote bonding by the bump.Type: ApplicationFiled: March 5, 2003Publication date: September 25, 2003Inventors: Kazuhiro Iizuka, Shinya Takyu
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Patent number: D554084Type: GrantFiled: October 31, 2005Date of Patent: October 30, 2007Assignee: Kabushiki Kaisha ToshibaInventor: Kazuhiro Iizuka