Patents by Inventor Kazuhiro Nagaoka

Kazuhiro Nagaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11924958
    Abstract: A hard disk drive flexible printed circuit (FPC) includes a plurality of fingers extending from a main portion, with each finger having a first wiring layer including a first electrically conductive trace layout, a second wiring layer including a second electrically conductive trace layout, and a base film interposed between the first and second wiring layers, where the first conductive trace layout includes at least one thermally conductive protective island overlaying a respective portion of the second trace layout to provide a protective thermal barrier to the base film. Hence, maximum temperatures across various layers of the FPC laminate can be reduced, damage to the FPC prevented, and manufacturing yields improved.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: March 5, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Teruhiro Nakamiya, Kazuhiro Nagaoka, Satoshi Nakamura, Nobuyuki Okunaga
  • Publication number: 20240040688
    Abstract: A flexible printed circuit (FPC) for a hard disk drive includes a plurality of electrical traces, whereby aggressor traces are isolated from victim traces to avoid crosstalk that could degrade signals. Aggressor traces may be positioned together at one of the edges of each of the top wiring layer and the bottom wiring layer, physically isolated from victim traces. Aggressor traces may be grouped together at either the top wiring layer or the bottom wiring layer, with the victim traces positioned on the layer opposing the aggressor traces. With aggressor and victim traces routed on the same wiring layer, aggressor traces may be routed away from the victim traces with multi-layer routing, by way of vias.
    Type: Application
    Filed: October 12, 2023
    Publication date: February 1, 2024
    Inventors: Masahiro Kishimoto, John Contreras, Kazuhiro Nagaoka, Satoshi Nakamura
  • Patent number: 11818834
    Abstract: A flexible printed circuit (FPC) for a hard disk drive includes a plurality of electrical traces, whereby aggressor traces are isolated from victim traces to avoid crosstalk that could degrade signals. Aggressor traces may be positioned together at one of the edges of each of the top wiring layer and the bottom wiring layer, physically isolated from victim traces. Aggressor traces may be grouped together at either the top wiring layer or the bottom wiring layer, with the victim traces positioned on the layer opposing the aggressor traces. With aggressor and victim traces routed on the same wiring layer, aggressor traces may be routed away from the victim traces with multi-layer routing, by way of vias.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: November 14, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Masahiro Kishimoto, John Contreras, Kazuhiro Nagaoka, Satoshi Nakamura
  • Publication number: 20230276566
    Abstract: A hard disk drive flexible printed circuit (FPC) includes a plurality of fingers extending from a main portion, with each finger having a first wiring layer including a first electrically conductive trace layout, a second wiring layer including a second electrically conductive trace layout, and a base film interposed between the first and second wiring layers, where the first conductive trace layout includes at least one thermally conductive protective island overlaying a respective portion of the second trace layout to provide a protective thermal barrier to the base film. Hence, maximum temperatures across various layers of the FPC laminate can be reduced, damage to the FPC prevented, and manufacturing yields improved.
    Type: Application
    Filed: May 10, 2023
    Publication date: August 31, 2023
    Inventors: Teruhiro Nakamiya, Kazuhiro Nagaoka, Satoshi Nakamura, Nobuyuki Okunaga
  • Patent number: 11657841
    Abstract: A hard disk drive flexible printed circuit (FPC) includes a plurality of fingers extending from a main portion, with each finger having a thermally-conductive stiffener, at least one wiring layer over the stiffener, and a cover film over the at least one wiring layer, where the centroid of the stiffener is offset from the centerline of the cover film. Thus, utilizing the heat-sink characteristics of the stiffener, temperature differences among the upper and lower electrical pads of the FPC resulting from a heat-based interconnection procedure can be reduced and the temperatures across the FPC finger made more uniform, damage to the FPC prevented, and soldering yields improved.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: May 23, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Teruhiro Nakamiya, Kazuhiro Nagaoka, Satoshi Nakamura, Nobuyuki Okunaga
  • Publication number: 20220418078
    Abstract: A hard disk drive flexible printed circuit (FPC) includes a plurality of fingers extending from a main portion, with each finger having a first wiring layer including a first electrically conductive trace layout, a second wiring layer including a second electrically conductive trace layout, and a base film interposed between the first and second wiring layers, where the first conductive trace layout includes at least one thermally conductive protective island overlaying a respective portion of the second trace layout to provide a protective thermal barrier to the base film. Hence, maximum temperatures across various layers of the FPC laminate can be reduced, damage to the FPC prevented, and manufacturing yields improved.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 29, 2022
    Inventors: Teruhiro Nakamiya, Kazuhiro Nagaoka, Satoshi Nakamura, Nobuyuki Okunaga
  • Publication number: 20220418092
    Abstract: A flexible printed circuit (FPC) for a hard disk drive includes a plurality of electrical traces, whereby aggressor traces are isolated from victim traces to avoid crosstalk that could degrade signals. Aggressor traces may be positioned together at one of the edges of each of the top wiring layer and the bottom wiring layer, physically isolated from victim traces. Aggressor traces may be grouped together at either the top wiring layer or the bottom wiring layer, with the victim traces positioned on the layer opposing the aggressor traces. With aggressor and victim traces routed on the same wiring layer, aggressor traces may be routed away from the victim traces with multi-layer routing, by way of vias.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 29, 2022
    Inventors: Masahiro Kishimoto, John Contreras, Kazuhiro Nagaoka, Satoshi Nakamura
  • Publication number: 20220415346
    Abstract: A hard disk drive flexible printed circuit (FPC) includes a plurality of fingers extending from a main portion, with each finger having a thermally-conductive stiffener, at least one wiring layer over the stiffener, and a cover film over the at least one wiring layer, where the centroid of the stiffener is offset from the centerline of the cover film. Thus, utilizing the heat-sink characteristics of the stiffener, temperature differences among the upper and lower electrical pads of the FPC resulting from a heat-based interconnection procedure can be reduced and the temperatures across the FPC finger made more uniform, damage to the FPC prevented, and soldering yields improved.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 29, 2022
    Inventors: Teruhiro Nakamiya, Kazuhiro Nagaoka, Satoshi Nakamura, Nobuyuki Okunaga
  • Patent number: 10575424
    Abstract: Embodiments disclosed herein generally relate to hermetic electrical connectors used in hard disk drives. The hermetic electrical connector includes a barrier structure having a first plurality of connecting pads disposed on a first surface of the barrier structure and a second plurality of connecting pads disposed on a second surface of the barrier structure opposite the first surface. A plurality of conductors is disposed within the barrier structure, and each conductor is coupled to a connecting pad of the first plurality of connecting pads and a corresponding connecting pad of the second plurality of connecting pads. The barrier structure further includes a dielectric material between the first and second surfaces, and one or more layers embedded in the dielectric material. The addition of the layers helps choke the helium gas flow, thus improving sealing of the electrical connector while maintaining high-speed electrical transmission.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: February 25, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yuta Onobu, Takako Hayakawa, Kimihiko Sudo, Seong-Hun Choe, Takehito Nagata, Yuji Soga, Nobumasa Nishiyama, Kazuhiro Nagaoka
  • Patent number: 10515668
    Abstract: A low permeability electrical feed-through involves a laminate structure having alternating conductive and insulating layers with a conductive through-hole positioned therethrough, by which a lower connector pad is electrically connected with an upper connector pad. Such a feed-through may be used at an interface between a hermetically-sealed internal environment, such as in a lighter-than-air gas filled data storage device, and the external environment. An insulating layer is positioned and configured such that an associated horizontal leak path can meet an allowable feed-through leak rate, while the collection of layers is configured such that an associated vertical leak path can meet the feed-through leak rate.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: December 24, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kimihiko Sudo, Seong-Hun Choe, Kazuhiro Nagaoka
  • Publication number: 20190378545
    Abstract: A flexible type electrical feed-through involves a flexible printed circuit (FPC) part constructed as a laminate structure of a base insulating layer, a conductor layer, and a cover insulating layer, where the FPC part is wrapped around a metal part, forming a connector assembly. Such a feed-through may be used at an interface between a hermetically-sealed internal environment, such as in a lighter-than-air gas filled data storage device, and the external environment. The FPC may be shaped so that when wrapped around the metal part, portion(s) of the metal part are exposed on at least one side, which when adhered to a metal enclosure base, provides for a metal-to-metal bonding interface. A board-to-board connector receptacle and/or plug may be electrically connected to the feed-through, enabling smaller electrical connection pads on the feed-through.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 12, 2019
    Inventors: Kimihiko Sudo, Miki Namihisa, Masahiro Kishimoto, Kazuhiro Nagaoka
  • Publication number: 20190304510
    Abstract: A low permeability electrical feed-through involves a laminate structure having alternating conductive and insulating layers with a conductive through-hole positioned therethrough, by which a lower connector pad is electrically connected with an upper connector pad. Such a feed-through may be used at an interface between a hermetically-sealed internal environment, such as in a lighter-than-air gas filled data storage device, and the external environment. An insulating layer is positioned and configured such that an associated horizontal leak path can meet an allowable feed-through leak rate, while the collection of layers is configured such that an associated vertical leak path can meet the feed-through leak rate.
    Type: Application
    Filed: June 21, 2019
    Publication date: October 3, 2019
    Inventors: Kimihiko Sudo, Seong-Hun Choe, Kazuhiro Nagaoka
  • Patent number: 10395694
    Abstract: A low permeability electrical feed-through involves a laminate structure having alternating conductive and insulating layers with a conductive through-hole positioned therethrough, by which a lower connector pad is electrically connected with an upper connector pad. Such a feed-through may be used at an interface between a hermetically-sealed internal environment, such as in a lighter-than-air gas filled data storage device, and the external environment. An insulating layer is positioned and configured such that an associated horizontal leak path can meet an allowable feed-through leak rate, while the collection of layers is configured such that an associated vertical leak path can meet the feed-through leak rate.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: August 27, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kimihiko Sudo, Seong-Hun Choe, Kazuhiro Nagaoka
  • Publication number: 20190104630
    Abstract: Embodiments disclosed herein generally relate to hermetic electrical connectors used in hard disk drives. The hermetic electrical connector includes a barrier structure having a first plurality of connecting pads disposed on a first surface of the barrier structure and a second plurality of connecting pads disposed on a second surface of the barrier structure opposite the first surface. A plurality of conductors is disposed within the barrier structure, and each conductor is coupled to a connecting pad of the first plurality of connecting pads and a corresponding connecting pad of the second plurality of connecting pads. The barrier structure further includes a dielectric material between the first and second surfaces, and one or more layers embedded in the dielectric material. The addition of the layers helps choke the helium gas flow, thus improving sealing of the electrical connector while maintaining high-speed electrical transmission.
    Type: Application
    Filed: February 20, 2017
    Publication date: April 4, 2019
    Inventors: Yuta ONOBU, Takako HAYAKAWA, Kimihiko SUDO, Seong-Hun CHOE, Takehito NAGATA, Yuji SOGA, Nobumasa NISHIYAMA, Kazuhiro NAGAOKA
  • Patent number: 9870806
    Abstract: Embodiments disclosed herein generally relate to hermetic electrical connectors used in hard disk drives. The hermetic electrical connector includes a barrier structure having a first plurality of connecting pads disposed on a first surface of the barrier structure and a second plurality of connecting pads disposed on a second surface of the barrier structure opposite the first surface. A plurality of conductors is disposed within the barrier structure, and each conductor is coupled to a connecting pad of the first plurality of connecting pads and a corresponding connecting pad of the second plurality of connecting pads. The barrier structure further includes a dielectric material between the first and second surfaces, and one or more layers embedded in the dielectric material. The addition of the layers helps choke the helium gas flow, thus improving sealing of the electrical connector while maintaining high-speed electrical transmission.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: January 16, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Yuta Onobu, Takako Hayakawa, Kimihiko Sudo, Seong-Hun Choe, Takehito Nagata, Yuji Soga, Nobumasa Nishiyama, Kazuhiro Nagaoka
  • Patent number: 9841457
    Abstract: A test coupon includes a pseudo element circuit which is constituted of a main circuit section and an adjusting section. The main circuit section includes a first pattern conductor and second pattern conductors. The first pattern conductor and the second pattern conductors overlap one another with a dielectric layer interposed therebetween. The first pattern conductor electrically conducts to the second pattern conductors. The main circuit section represents the R-component and the L-component of an equivalent circuit, and is a dominant circuit element which determines a signal waveform. The adjusting section includes linear conductors. A peak of a voltage waveform is suppressed by the R- and L-components of the adjusting section.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: December 12, 2017
    Assignees: NHK SPRING CO., LTD., WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Futa Sasaki, Hajime Arai, Tomohisa Okada, Nobumasa Nishiyama, Kazuhiro Nagaoka
  • Publication number: 20170278551
    Abstract: Embodiments disclosed herein generally relate to hermetic electrical connectors used in hard disk drives. The hermetic electrical connector includes a barrier structure having a first plurality of connecting pads disposed on a first surface of the barrier structure and a second plurality of connecting pads disposed on a second surface of the barrier structure opposite the first surface. A plurality of conductors is disposed within the barrier structure, and each conductor is coupled to a connecting pad of the first plurality of connecting pads and a corresponding connecting pad of the second plurality of connecting pads. The barrier structure further includes a dielectric material between the first and second surfaces, and one or more layers embedded in the dielectric material. The addition of the layers helps choke the helium gas flow, thus improving sealing of the electrical connector while maintaining high-speed electrical transmission.
    Type: Application
    Filed: January 13, 2017
    Publication date: September 28, 2017
    Inventors: Yuta ONOBU, Takako HAYAKAWA, Kimihiko SUDO, Seong-Hun CHOE, Takehito NAGATA, Yuji SOGA, Nobumasa NISHIYAMA, Kazuhiro NAGAOKA
  • Patent number: 9558790
    Abstract: Embodiments disclosed herein generally relate to hermetic electrical connectors used in hard disk drives. The hermetic electrical connector includes a barrier structure having a first plurality of connecting pads disposed on a first surface of the barrier structure and a second plurality of connecting pads disposed on a second surface of the barrier structure opposite the first surface. A plurality of conductors is disposed within the barrier structure, and each conductor is coupled to a connecting pad of the first plurality of connecting pads and a corresponding connecting pad of the second plurality of connecting pads. The barrier structure further includes a dielectric material between the first and second surfaces, and one or more layers embedded in the dielectric material. The addition of the layers helps choke the helium gas flow, thus improving sealing of the electrical connector while maintaining high-speed electrical transmission.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: January 31, 2017
    Assignee: HGST Netherlands B.V.
    Inventors: Yuta Onobu, Takako Hayakawa, Kimihiko Sudo, Seong-Hun Choe, Takehito Nagata, Yuji Soga, Nobumasa Nishiyama, Kazuhiro Nagaoka
  • Publication number: 20150138663
    Abstract: A multiple-segment transmission line in a hard disk drive enables a wider optimization range of the slope, duration and amplitude of the transmission line overshoot (TLO) wave shape. There is a first segment with two traces for connection to the write driver circuitry, an end segment with two traces for connection to the write head and at least two intermediate segments. The number of traces in a segment is different from the number of traces in the segments to which the segment is immediately connected. There is an even number of traces in each segment and the traces in each segment are interleaved. The number of segments and the number of traces in each segment can be selected to achieve the desired impedance levels for the different segments to achieve the desired wave shape for the TLO. All of the traces on the transmission line are preferably coplanar.
    Type: Application
    Filed: November 18, 2013
    Publication date: May 21, 2015
    Applicant: HGST Netherlands B.V.
    Inventors: John Thomas Contreras, Nobumasa Nishiyama, Eiji Soga, Kazuhiro Nagaoka, Rehan Zakai
  • Patent number: 9036305
    Abstract: A multiple-segment transmission line in a hard disk drive enables a wider optimization range of the slope, duration and amplitude of the transmission line overshoot (TLO) wave shape. There is a first segment with two traces for connection to the write driver circuitry, an end segment with two traces for connection to the write head and at least two intermediate segments. The number of traces in a segment is different from the number of traces in the segments to which the segment is immediately connected. There is an even number of traces in each segment and the traces in each segment are interleaved. The number of segments and the number of traces in each segment can be selected to achieve the desired impedance levels for the different segments to achieve the desired wave shape for the TLO. All of the traces on the transmission line are preferably coplanar.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: May 19, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: John Thomas Contreras, Nobumasa Nishiyama, Eiji Soga, Kazuhiro Nagaoka, Rehan Zakai