Patents by Inventor Kazuhiro Narahara

Kazuhiro Narahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100112213
    Abstract: In a manufacturing apparatus for manufacturing an epitaxial wafer with a wafer being mounted substantially concentrically with a susceptor, a center rod is provided to extend in an up-and-down direction on a side of a non-mounting surface of the susceptor so that its upper end is adjacent to the center of the susceptor. With this arrangement, part of radiation light irradiated toward the susceptor is diffusely reflected by the center rod before reaching the central portion of the susceptor, thereby reducing the amount of the radiation light irradiated to the central portion of the susceptor as well as lowering the temperature of the portion. Since the center rod and the susceptor are not in surface contact, the center rod does not take the heat from the susceptor, thereby suppressing the temperature from decreasing locally at the central portion of the susceptor.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 6, 2010
    Applicant: SUMCO TECHXIV CORPORATION
    Inventors: Motonori NAKAMURA, Yoshinobu MORI, Takeshi MASUDA, Hidenori KOBAYASHI, Kazuhiro NARAHARA
  • Publication number: 20090226293
    Abstract: A method and an apparatus for manufacturing a semiconductor wafer are provided for improving a quality of the semiconductor wafer, and further, for improving a quality of a semiconductor device manufactured by using the semiconductor wafer, by preventing warping from being generated at a stage of a placing step, at the time of performing heat treatment to a semiconductor wafer substrate. The placing process is performed by a placing means so that a time when a temperature difference between a wafer front surface temperature and a wafer rear surface temperature becomes maximum, and a time when warping is generated in the wafer are prior to a time when the wafer is brought into contact with lift pins or a susceptor (i.e., a time after the temperature is at an upper limit value of an infrared temperature region at 600° C.), and the lift pins are brought into contact with the wafer rear surface.
    Type: Application
    Filed: June 30, 2006
    Publication date: September 10, 2009
    Applicant: SUMCO TECHXIV KABUSHIKI KAISHA
    Inventors: Yuichi Nasu, Hirotaka Katou, Kazuhiro Narahara, Hideyuki Matsunaga
  • Patent number: 7537658
    Abstract: An oxide film 13 on the surface of the substrate 11 and an inner wall oxide film 112 in a COP 111 exposed to the surface of the substrate 11 are removed by cleaning the surface of the substrate 11 with a hydrofluoric acid solution. The substrate 11 is then cleaned with ozone water, thereby forming an oxide film 13 on the surface of the substrate 11. Thereafter the substrate 11 is subjected to a heat treatment for removing the oxide film 13 on the surface of the substrate 11. Consequently, the COP 111 on the surface of the substrate 11 is planarized to be eliminated from the substrate surface. Thereafter an epitaxial layer 12 is formed on the surface of the substrate 11.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: May 26, 2009
    Assignee: Sumco Techxiv Corporation
    Inventors: Yuichi Nasu, Kazuhiro Narahara
  • Publication number: 20080131605
    Abstract: An oxide film 13 on the surface of the substrate 11 and an inner wall oxide film 112 in a COP 111 exposed to the surface of the substrate 11 are removed by cleaning the surface of the substrate 11 with a hydrofluoric acid solution. The substrate 11 is then cleaned with ozone water, thereby forming an oxide film 13 on the surface of the substrate 11. Thereafter the substrate 11 is subjected to a heat treatment for removing the oxide film 13 on the surface of the substrate 11. Consequently, the COP 111 on the surface of the substrate 11 is planarized to be eliminated from the substrate surface. Thereafter an epitaxial layer 12 is formed on the surface of the substrate 11.
    Type: Application
    Filed: December 20, 2005
    Publication date: June 5, 2008
    Applicant: SUMCO TECHXIV CORPORATION
    Inventors: Yuichi Nasu, Kazuhiro Narahara
  • Publication number: 20070227441
    Abstract: A method of forming an epitaxial layer to increase flatness of an epitaxial silicon wafer is provided. In particular, a method of controlling the epitaxial layer thickness in a peripheral part of the wafer is provided. An apparatus for manufacturing an epitaxial wafer by growing an epitaxial layer with reaction of a semiconductor wafer and a source gas in a reaction furnace comprising: a pocket in which the semiconductor wafer is placed; a susceptor fixing the semiconductor; orientation-dependent control means dependent on a crystal orientation of the semiconductor wafer and/or orientation-independent control means independent from the crystal orientation of the semiconductor wafer, wherein the apparatus may improve flatness in a peripheral part of the epitaxial layer.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 4, 2007
    Inventors: Kazuhiro Narahara, Hirotaka Kato, Koichiro Hayashida
  • Publication number: 20070228524
    Abstract: A role of a bottom face of a silicon wafer is identified in a manufacturing process of the silicon wafer. And preferable characteristic feature is also identified. In order to obtain the above characteristic feature, a process method to be implemented into the method of manufacturing a normal silicon wafer is provided. For example, the method comprises: a pre-cleaning process for cleaning the silicon wafer having top and bottom faces processed to a mirror finish; and a rapid thermal process or an epitaxial growth process, wherein the pre-cleaning process comprises a hydrofluoric acid (HF) process and a subsequent pure water (DIW) process.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 4, 2007
    Inventors: Koichiro Hayashida, Kazuhiro Narahara, Hirotaka Kato