Patents by Inventor Kazuhiro Nishikawa

Kazuhiro Nishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090148019
    Abstract: An image processing method is provided as one for creating a fused image automatically and with high overlapping accuracy. An image processing method according to an embodiment of the present invention includes (a) a voxel normalization step of equalizing voxel sizes and numbers of voxels in respective effective fields of view of a first 3D image based on a plurality of first tomographic images obtained from an arbitrary part of a subject and a second 3D image based on a plurality of second tomographic images obtained from the same part, thereby creating a first normalized 3D image corresponding to the first 3D image and a second normalized 3D image corresponding to the second 3D image; and (b) a fused image creation step of creating a fused image, using the first normalized 3D image and the second normalized 3D image.
    Type: Application
    Filed: February 21, 2006
    Publication date: June 11, 2009
    Applicant: Nihon Medi-Physics Co., Ltd.
    Inventors: Kazuo Hamada, Kazuhiro Nishikawa
  • Publication number: 20090133900
    Abstract: Circuit board having conductor wiring and connection terminal; anisotropic conductive resin layer provided on one surface of circuit board; and plurality of electronic components respectively provided with electrode terminals in positions facing the connection terminal are included. The anisotropic conductive resin layer includes at least one kind of conductive particles selected from coiled conductive particles, fiber fluff conductive particles and conductive particles provided with a plurality of conductive protrusions, and resin binder; electrically couples electrode terminals of plurality of electronic components to connection terminals to each other with conductive particles; mechanically fixes electronic components and circuit board to each other; and protects conductor wiring.
    Type: Application
    Filed: April 14, 2006
    Publication date: May 28, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kazuhiro Nishikawa, Hidenori Miyakawa, Norihito Tsukahara, Shigeaki Sakatani
  • Publication number: 20090070994
    Abstract: A method for manufacturing a circuit board on which an electronic component is mounted, includes at least the steps of (a) supplying a liquid photo-polymerizable adhesive containing conductive particles dispersed therein to a surface of a printed board, to form an adhesive layer on the board surface; (b) irradiating the photo-polymerizable adhesive with ultraviolet light to turn into a gel, to provide adhesiveness to the adhesive layer; and (c) pressing the electronic component against the component mounting portion of the printed board from an upper surface side of the adhesive layer, to form an electrical connection between the electronic component and the component mounting portion, and in the method, the photo-polymerizable adhesive is a delayed reactive adhesive.
    Type: Application
    Filed: November 13, 2006
    Publication date: March 19, 2009
    Inventors: Hidenori Miyakawa, Atsushi Yamaguchi, Kazuhiro Nishikawa, Kunio Hibino
  • Patent number: 7499038
    Abstract: In an analog resistive-film touch panel, a lower electrode member has a transparent electrode on a top face of a transparent insulating base member, a pair of bus bars on parallel sides of the transparent electrode, and routing circuits connected to the bus bars for external connection on a portion other than the transparent electrode. Further, an upper electrode member has a transparent electrode on a bottom face of a flexible transparent insulating base, a pair of bus bars on parallel sides of the transparent electrode, and routing circuits connected to the bus bars for external connection on a portion other than the transparent electrode. The lower and upper electrode members face each other in a square pattern via an insulative spacer and are bonded at peripheral portions. The bus bars and the routing circuits are formed from metal thin wires with a diameter of 30 to 100 ?m.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: March 3, 2009
    Assignee: Nissha Printing Co., Ltd.
    Inventors: Kazuhiro Nishikawa, Kazuhiko Takahata, Hajime Takemura, Takeshi Asakura, Kazuo Terasawa, Hideki Murakami
  • Publication number: 20090033824
    Abstract: A design panel attached to a casing for an electronic equipment, which is constructed so that a display device whose display surface goes black at standby is placeable inside the casing, and which is formed with an opening that makes the display surface visible, the design panel being attached to the casing so as to cover the opening, the design panel including, a transparent support substrate having a larger area than the opening, a polarizing film provided outside or inside the transparent support substrate, a ¼ wavelength phase difference film provided on a closer side to an attachment side of the casing with respect to the polarizing film, and a black colored section provided on the closer side to the attachment side of the casing with respect to the transparent support substrate, for blacking a portion which is able to be in contact with the casing, wherein the display device is made visible from the outside at information display, whereas the display device is covered so as to be made invisible from the
    Type: Application
    Filed: November 7, 2006
    Publication date: February 5, 2009
    Inventors: Kazuhiro Nishikawa, Takeshi Asakura, Yoshihiro Kai
  • Patent number: 7473327
    Abstract: A wear-resistant aluminum alloy improved in wear resistance (or viscosity), including: 0.1 to 0.39 wt % of Mg, 3.0 to 6.0 wt % of Si, 0.01 to 0.5 wt % of Cu, 0.01 to 0.5 wt % of Fe, 0.01 to 0.5 wt % of Mn, 0.01 to 0.5 wt % of Cr, and the remainder being Al and unavoidable impurities; and an extruded product using the aluminum alloy.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: January 6, 2009
    Assignee: Aisin Keikinzoku Co., Ltd.
    Inventors: Nobuyuki Takase, Nobuyuki Higashi, Kazuhiro Nishikawa
  • Publication number: 20080135283
    Abstract: A protruding electrodes is formed on a lead electrode of an electronic component, and the protruding electrodes comprises a first conductor formed on the lead electrode of the electronic component, and a second conductor overlaid on the first conductor by using a transfer mold having a concavity. By virtue of this structure, protruding electrodes of any configuration can be formed in fine pitches.
    Type: Application
    Filed: April 14, 2006
    Publication date: June 12, 2008
    Inventors: Kunio Hibino, Yoshihiro Tomura, Yoshihiko Yagi, Kazuhiro Nishikawa
  • Publication number: 20080136788
    Abstract: There are provided a design sheet (5) attached to the surface of an upper electrode film (1) of a touch panel (4) such that the design sheet is protruded at its periphery from the touch panel (4) and a touch-panel-unit casing (6) which is integrally molded with the design sheet (5) such that the casing is covered at its surface with the design sheet (5) and surrounds the side surfaces of the touch panel (4).
    Type: Application
    Filed: March 6, 2006
    Publication date: June 12, 2008
    Inventors: Kazuhiro Nishikawa, Takeshi Asakura, Noriaki Tsuchida, Koichi Hamaoka
  • Patent number: 7381902
    Abstract: A wiring board comprises a patterned wiring formed of electrically conductive resin composed primarily of silver and embedded into a substrate in a manner that a surface thereof is exposed above the substrate, and a covering conductor formed primarily of carbon covering the surface of the patterned wiring. The wiring board of this structure is superior in resistance to moisture absorption and water, prevents silver migration attributable to the moisture, and reduces contact resistance in the connection between a terminal portion of the wiring board and an external apparatus.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: June 3, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Patent number: 7376318
    Abstract: A circuit board comprises a base film that is a base layer, a first conductive circuit manufactured by hardening conductive paste material formed in a predetermined shape on the base film, a first insulating layer manufactured by hardening insulating paste material formed on the base film and the first conductive circuit, and a second conductive circuit manufactured by hardening conductive paste material in a predetermined shape on the first insulating layer, wherein an electronic part built-in by the first insulating layer and second insulating layer is connected to the second conductive circuit, and the first conductive circuit is connected to the second conductive circuit through a via hole.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: May 20, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Patent number: 7375421
    Abstract: Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit module of a multilayer structure is provided which is formed by embedding semiconductor chips and passive components in a sheet made from a thermoplastic resin; folding a module sheet, which is formed of circuit blocks provided with wiring patterns thereon, at the boundaries of the circuit blocks so as to be stacked into layers; and thermal-bonding and integrating the module sheet by applying heat and pressure. As a result, a highly reliable circuit module can be manufactured in a simple manner.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: May 20, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Sakurai, Kazuhiro Nishikawa, Norihito Tsukahara
  • Publication number: 20080106522
    Abstract: In a method for connecting lead wires to a touch panel, the method includes the steps of: providing through holes 9a to 9d the number of which corresponds to the number of electrode ends by perforation in a lower electrode plate 3; using a metal-pin 11 having a pin-shaft 11b and a disk shaped pin-head 11a with a diameter larger than an outer diameter of the pin-shaft; inserting the pin-shaft 11b into a metal-pin fixing hole formed corresponding to the through hole 9a at a circuit 10c in a connector tail of a lead wire 10, whereby the pin-shaft 11b is erectly provided on the connector tail of the lead wire 10; and inserting the pin-shafts 11b to 14b into the through holes 9a to 9d, and in addition, electrically connecting the pin-shaft inserted into a lower electrode plate 3 through a conductive adhesive 15 to electrode ends 6c, 7c, 6d, 7d.
    Type: Application
    Filed: January 16, 2006
    Publication date: May 8, 2008
    Inventors: Kazuhiro Nishikawa, Yoshihiro Kai, Kazuto Nakamura
  • Publication number: 20080094793
    Abstract: Electronic circuit device (100) is structured so that a substrate module unit that are formed by stacking substrate modules made of a first resin sheet with electronic component (190) embedded thereinto is inserted into housing (150) including connecting terminal (120), control circuit (130), and first wiring pattern (140), where the substrate modules are connected to each other electrically and mechanically. This electronic circuit device (100) dispenses with a mother substrate. Further, with slimming down of a substrate module, a substrate module unit with a large number of substrate modules stacked can be loaded in a limited packaging space, thus mounting greater storage capacity and higher functionality.
    Type: Application
    Filed: August 31, 2005
    Publication date: April 24, 2008
    Inventors: Daisuke Sakurai, Masahiro Ono, Kazuhiro Nishikawa
  • Patent number: 7353600
    Abstract: A circuit board fabrication method including: forming first conductive interconnection 2 onto insulator substrate 1; applying resin film 41, which is to be interlevel insulator layer 42 for electrically insulating first conductive interconnection 2 and second conductive interconnection 6, onto insulator substrate 1; either making pillar-like member 3 stand on a prescribed position on first conductive interconnection 2 before applying resin film 41, or press fitting pillar-like member 3 into resin film 41 so as to reach either a surface vicinity of first conductive interconnection 2 or a portion of first conductive interconnection 2 after applying resin film 41; hardening resin film 41 to form interlevel insulator layer 42; pulling out pillar-like member 3 to form opening 5 in interlevel insulator layer 42; and forming second conductive interconnection 6 onto interlevel insulator layer 42 to include opening 5.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: April 8, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa, Daisuke Sakurai
  • Publication number: 20070277909
    Abstract: This invention provides such solder paste that prevents, when a minute-size passive component or a semiconductor integrated circuit element having a small terminal pitch is soldered by the solder paste, the solder particles from being oxidized to provide highly-reliable solder joint even when the solder paste is used in a very small amount. Specifically, solder paste obtained by mixing solder alloy powders with flux is structured so that the flux has, at a pre-heating temperature in a heating/melting step, a high temperature retention property by which the flux covers the surface of the solder alloy powders.
    Type: Application
    Filed: September 6, 2005
    Publication date: December 6, 2007
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Patent number: 7297876
    Abstract: Apply heat to thermoplastic resin film, which is eventually to become an insulating resin layer, and press the film against a mold for forming grooves on a surface of the film. Next, press-fit an electronic component into the resin film from a back-face of the film, thereby exposing electrodes of the component from a bottom of the grooves. Then cool the film for curing. Peel the film off the mold, then fill the grooves with conductive paste, and cure the paste for forming circuit patterns. The foregoing procedure allows bringing the electrodes positively into conduction with the circuit patterns of a circuit board incorporating the electronic component, and achieving a narrower pitch between routings of the circuit patterns.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: November 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Sakurai, Norihito Tsukahara, Kazuhiro Nishikawa
  • Publication number: 20070218957
    Abstract: There is provided a touch panel capable of obtaining a stable connection resistance without requiring fitting accuracy at the time of the connection to an external terminal, and a protective panel for a display window of an electronic device using the same. The analog type touch panel includes a touch side substrate 2 and a non-touch side substrate 3 each having resistive films 2a, 3a provided on opposed inner surfaces thereof. Through-holes 4a, 4b, 4c, 4d formed at the periphery of the non-touch side substrate 3. A connecting part 5 for electrically connecting electrodes of the resistive films 2a, 3a to an external terminal, in which a conductive paste is injected into the through-holes and a rivet 14 is inserted into each of the through-holes from the lower surface side so that a head of the rivet 14 forms flat connecting electrodes 15a, 15b for connection to the external terminal on the lower surface of the non-touch side substrate 3.
    Type: Application
    Filed: May 20, 2005
    Publication date: September 20, 2007
    Inventors: Kazuhiro Nishikawa, Yoshihiro Kai, Kazuto Nakamura
  • Patent number: 7268770
    Abstract: A touch-input type liquid crystal display device comprises an upper and lower polarizer, a transparent touch panel disposed between the polarizers and a liquid crystal display. The transparent touch panel comprises upper and lower optical phase difference films, a movable electrode portion and a stationary electrode portion. A space is interposed between the optical phase difference films. The transparent touch panel is disposed between the upper polarizer and the liquid crystal display. The liquid crystal display is disposed between the transparent touch panel and the lower polarizer. The optical phase difference films are capable of providing a ¼ wavelength phase delay to light, incident thereon, having a center wavelength within a visible region. The movable electrode portion is disposed on a lower surface of the upper optical phase difference film. The stationary electrode portion is disposed on an upper surface of the lower optical phase difference film.
    Type: Grant
    Filed: January 8, 1999
    Date of Patent: September 11, 2007
    Assignee: Nissha Printing Co., Ltd.
    Inventors: Kazuhiko Takahata, Takao Hashimoto, Kazuhiro Nishikawa, Shinya Yamada, Yasuji Kusuda
  • Patent number: 7237937
    Abstract: In a touch panel assembly, the thickness of a touch panel is successfully reduced by using a touch panel 10 provided with no reinforcement member. A housing frame 50 that supports the components of a front light unit 20 in an integral manner is provided with a touch panel positioning mechanism, and the touch panel 10 is fixed to the positioning mechanism, whereby the absence of a reinforcement member is duly compensated for, thus ensuring the strength of the touch panel 10. Deformation of the touch panel 10 that occurs when the touch panel 10 is pressed for operation can be attenuated by a transparent buffer member 5 disposed between the touch panel 10 and a light conductor plate 22. Therefore, the touch panel 10 deformed is prohibited from contacting and damaging the light conductor plate 22, thus preventing the light conductor plate 22 from deteriorating in its functional performance.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: July 3, 2007
    Assignees: Minebea Co., Ltd., Nissha Printing Co., Ltd., Nokia Corporation
    Inventors: Satoshi Kawashima, Yoshitaka Chousa, Takayuki Takagi, Kazuhiro Nishikawa, Takao Hashimoto
  • Patent number: 7233069
    Abstract: An interconnection substrate includes: an interconnection layer region where at least a first conductor layer and a second conductor layer are vertically stacked in that order on a substrate, with the first conductor layer and second conductor layer containing conductive particles and a binder, wherein the first conductor layer and second conductor layer stacked in the interconnection layer region have conductive particles different in average particle size from each other. As a result, only an intended region can have low resistance.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: June 19, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa, Daisuke Sakurai