Patents by Inventor Kazuhiro Takahata
Kazuhiro Takahata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8163611Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: GrantFiled: December 22, 2006Date of Patent: April 24, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
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Patent number: 8158527Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: GrantFiled: March 15, 2010Date of Patent: April 17, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
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Publication number: 20120054697Abstract: According to one embodiment, a light source shape calculation method includes calculating a first light source shape as an exposure illumination light source shape, so that the first light source shape has a light source shape region symmetrical to an X-axis direction and a Y-axis direction, and a process margin when forming an on-substrate pattern corresponding to at least two pattern layouts defined by design rules is optimized. A point light source is calculated such that the process margin of formation of the on-substrate pattern corresponding to a pattern layout to be formed on a semiconductor device is optimized, and is applied to the first light source shape.Type: ApplicationFiled: August 31, 2011Publication date: March 1, 2012Inventors: Kazuhiro TAKAHATA, Tetsuaki MATSUNAWA, Masahiro MIYAIRI, Shimon MAEDA, Shigeki NOJIMA
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Publication number: 20110224934Abstract: According to one embodiment, an evaluating apparatus includes a resist-pattern-data acquiring unit and an evaluating unit. The resist-pattern-data acquiring unit acquires resist pattern data having a plurality of feature values including at least two among a hole diameter measured concerning a pattern for hole formation in the resist pattern, an aspect ratio of the hole diameter, and a difference of hole diameters at a plurality of signal thresholds. The evaluating unit calculates an evaluation value using an evaluation function for evaluating whether a hole pattern formed on a processing target by using the pattern for hole formation is unopened and the resist pattern data and evaluates presence or absence of a risk that the hole pattern is unopened.Type: ApplicationFiled: September 15, 2010Publication date: September 15, 2011Inventors: Seiro Miyoshi, Hideaki Abe, Kazuhiro Takahata, Masafumi Asano, Shoji Mimotogi, Tomoko Ojima, Masanari Kajiwara
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Publication number: 20110086512Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: ApplicationFiled: March 15, 2010Publication date: April 14, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Koji HASHIMOTO, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
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Patent number: 7824996Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: GrantFiled: March 15, 2010Date of Patent: November 2, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
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Publication number: 20100196829Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: ApplicationFiled: March 15, 2010Publication date: August 5, 2010Applicant: Kabushiki Kaisha ToshibaInventors: Koji HASHIMOTO, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
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Publication number: 20100196809Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: ApplicationFiled: March 15, 2010Publication date: August 5, 2010Applicant: Kabushiki Kaisha ToshibaInventors: Koji HASHIMOTO, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
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Publication number: 20100167190Abstract: Design data corresponding to a target layout pattern is created, a layout value of the created design data is changed, optical proximity correction is applied to a layout pattern obtained from the changed design data, a pattern on wafer formed on a wafer to correspond to the layout pattern is calculated by using a photomask on which the layout pattern subjected to the optical proximity correction is formed, and the pattern on wafer and the target layout pattern before the change of the layout value are compared.Type: ApplicationFiled: November 4, 2009Publication date: July 1, 2010Inventors: Kazuhiro TAKAHATA, Shoji MIMOTOGI
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Publication number: 20100068652Abstract: To include transferring simultaneously by lithography a first region from a position opposed between a first constituent member and a second constituent member in a longitudinal direction of a third constituent member to the end of a side of the first constituent member and a first mask pattern for forming the first constituent member, onto a semiconductor substrate, transferring simultaneously by lithography a second region including regions other than the first region out of the third constituent member and a second mask pattern for forming the second constituent member, onto the semiconductor substrate, and forming the first constituent member, the second constituent member, and the third constituent member on the semiconductor substrate by using the first and second mask patterns.Type: ApplicationFiled: September 1, 2009Publication date: March 18, 2010Inventor: Kazuhiro TAKAHATA
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Publication number: 20090119635Abstract: Mask data is generated from a design layout by executing a mask data process including optical proximity correction. A pattern is formed on the major surface of a test semiconductor substrate by using a mask prepared from the mask data. The dimensional difference between the design layout and the pattern is measured. The design layout is corrected, at a portion with the dimensional difference of the design layout, by the magnitude of the dimensional difference in a direction in which the dimensions of the pattern equal those of the design layout, thereby generating a corrected design layout. Corrected mask data is generated from the corrected design layout by executing the mask data process including the optical proximity correction. A pattern is formed on the major surface of a semiconductor substrate by using a corrected mask prepared from the corrected mask data.Type: ApplicationFiled: December 3, 2007Publication date: May 7, 2009Inventor: Kazuhiro Takahata
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Publication number: 20070105391Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section. (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: ApplicationFiled: December 22, 2006Publication date: May 10, 2007Applicant: Kabushiki Kaisha ToshibaInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
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Patent number: 7208423Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: GrantFiled: March 28, 2002Date of Patent: April 24, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
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Publication number: 20020160590Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: ApplicationFiled: March 28, 2002Publication date: October 31, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa