Patents by Inventor Kazuhiro Yoshimoto
Kazuhiro Yoshimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050221588Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: ApplicationFiled: March 10, 2005Publication date: October 6, 2005Applicant: FUJITSU LIMITEDInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
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Publication number: 20050221589Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: ApplicationFiled: March 10, 2005Publication date: October 6, 2005Applicant: FUJITSU LIMITEDInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
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Publication number: 20050221587Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: ApplicationFiled: March 10, 2005Publication date: October 6, 2005Applicant: FUJITSU LIMITEDInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
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Patent number: 6951800Abstract: A method of making a semiconductor device includes a back-grinding step of grinding a back surface of a semiconductor substrate, a dicing step of dicing the semiconductor substrate along predetermined dicing lines so as to make pieces of semiconductor devices after the back-grinding step, and a laser exposure step of shining laser light on the back surface of the semiconductor substrate after the back-grinding step so as to remove grinding marks generated by the back-grinding step.Type: GrantFiled: March 20, 2002Date of Patent: October 4, 2005Assignee: Fujitsu LimitedInventors: Yoshiaki Shinjo, Yuzo Shimobeppu, Kazuo Teshirogi, Kazuhiro Yoshimoto, Eiji Yoshida, Noboru Hayasaka, Mitsuhisa Watanabe
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Patent number: 6902944Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: GrantFiled: February 6, 2004Date of Patent: June 7, 2005Assignee: Fujitsu LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
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Publication number: 20050085171Abstract: A flat-object holder can hold a flat object-and-frame assembly, and the holder has the flat object fixed to the frame with protection tape. The flat-object holder includes at least a flat object supporting area for fixedly holding the flat object via the protection tape by applying a suction force, and a frame fixing area for fastening the frame. The flat-object holder bearing the flat object-and-frame assembly can be fixedly held by a selected chuck table by applying a negative pressure to the flat object supporting area. The flat-object holder can transfer and put the flat object-and-frame assembly in a container. Thus, no matter how thin the flat object may be, it can be handled without the fear of breaking.Type: ApplicationFiled: November 12, 2004Publication date: April 21, 2005Inventors: Yuzo Shimobeppu, Kazuo Teshirogi, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Takashi Mori, Koichi Yajima, Yusuke Kimura
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Patent number: 6837776Abstract: A flat-object holder can hold a flat object-and-frame assembly, and the holder has the flat object fixed to the frame with protection tape. The flat-object holder includes at least a flat object supporting area for fixedly holding the flat object via the protection tape by applying a suction force, and a frame fixing area for fastening the frame. The flat-object holder bearing the flat object-and-frame assembly can be fixedly held by a selected chuck table by applying a negative pressure to the flat object supporting area. The flat-object holder can transfer and put the flat object-and-frame assembly in a container. Thus, no matter how thin the flat object may be, it can be handled without the fear of breaking.Type: GrantFiled: July 31, 2002Date of Patent: January 4, 2005Assignees: Fujitsu Limited, Disco CorporationInventors: Yuzo Shimobeppu, Kazou Teshirogi, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Takashi Mori, Koichi Yajima, Yusuke Kimura
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Patent number: 6824643Abstract: In a semiconductor device manufacturing process, a semiconductor wafer is diced into a plurality of semiconductor chips, which are then peeled, from a dicing tape, using a peeling device. The peeling device includes a plurality of annular contact members arranged one after another from the outside to the inside, and the annular contact members are operated so that the semiconductor chip is successively peeled from the tape from the outer circumferential portion thereof toward the central portion thereof.Type: GrantFiled: March 4, 2002Date of Patent: November 30, 2004Assignee: Fujitsu LimitedInventors: Kazuhiro Yoshimoto, Kazuo Teshirogi, Eiji Yoshida
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Publication number: 20040161882Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: ApplicationFiled: February 6, 2004Publication date: August 19, 2004Applicant: FUJITSU LIMITEDInventors: Kazuo TESHIROGI, Yuzo SHIMOBEPPU, Kazuhiro YOSHIMOTO, Mitsuhisa WATANABE, Yoshiaki SHINJO, Eiji YOSHIDA, Noboru HAYASAKA
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Patent number: 6750074Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: GrantFiled: March 20, 2002Date of Patent: June 15, 2004Assignee: Fujitsu LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
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Publication number: 20030077993Abstract: Disclosed is a flat-object holder for holding a flat object-and-frame assembly, which has the flat object fixed to the frame with a protection tape. The flat-object holder comprises at least a flat object supporting area for fixedly holding the flat object via the protection tape by applying a suction force, and a frame fixing area for fastening the frame. The flat-object holder bearing the flat object-and-frame assembly can be fixedly held by a selected chuck table by applying a negative pressure to the flat object supporting area. The flat-object holder can transfer and put the flat object-and-frame assembly in a container. Thus, no matter how thin the flat object may be, it can be handled without the fear of breaking.Type: ApplicationFiled: July 31, 2002Publication date: April 24, 2003Inventors: Yuzo Shimobeppu, Kazuo Teshirogi, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Takashi Mori, Koichi Yajima, Yusuke Kimura
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Publication number: 20030077880Abstract: A method of making a semiconductor device includes a back-grinding step of grinding a back surface of a semiconductor substrate, a dicing step of dicing the semiconductor substrate along predetermined dicing lines so as to make pieces of semiconductor devices after the back-grinding step, and a laser exposure step of shining laser light on the back surface of the semiconductor substrate after the back-grinding step so as to remove grinding marks generated by the back-grinding step.Type: ApplicationFiled: March 20, 2002Publication date: April 24, 2003Applicant: Fujitsu LimitedInventors: Yoshiaki Shinjo, Yuzo Shimobeppu, Kazuo Teshirogi, Kazuhiro Yoshimoto, Eiji Yoshida, Noboru Hayasaka, Mitsuhisa Watanabe
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Publication number: 20030075271Abstract: In a semiconductor device manufacturing process, a semiconductor wafer is diced into a plurality of semiconductor chips, which are then peeled, from a dicing tape, using a peeling device. The peeling device includes a plurality of annular contact members arranged one after another from the outside to the inside, and the annular contact members are operated so that the semiconductor chip is successively peeled from the tape from the outer circumferential portion thereof toward the central portion thereof.Type: ApplicationFiled: March 4, 2002Publication date: April 24, 2003Applicant: Fujitsu LimitedInventors: Kazuhiro Yoshimoto, Kazuo Teshirogi, Eiji Yoshida
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Publication number: 20030077854Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: ApplicationFiled: March 20, 2002Publication date: April 24, 2003Applicant: Fujitsu LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
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Patent number: 5145753Abstract: A noble solid electrolyte fuel cell includes a generating layer (5), an interconnector layer (9), and a support layer (10) disposed between the generating and interconnector layers. The interconnector layer comprises a fuel electrode (6), an interconnector material (7) and an oxygen electrode (8). The support layer (10) forms a fuel passage and an oxidizer passage, and supporting rods (15, 102) for gas sealing are disposed at both ends of the support layer. A sealing film (110) is cemented to the contact surfaces of the supporting rods (15, 102) between the generating layer and the interconnector layer, and this sealing film becomes soft or half melted during the operation of the fuel cell. This construction provides improved cell performances due to better sealing of gases even under large temperature differences. The use of finer particles near the surface of the solid electrolyte only is also disclosed.Type: GrantFiled: September 6, 1990Date of Patent: September 8, 1992Assignee: Mitsubishi Jukogyo Kabushiki KaishaInventors: Mitsuhiro Irino, Tetsuo Gora, Masaharu Minami, Hitoshi Miyamoto, Masao Sumi, Nobuyoshi Tomita, Kiyoshi Watanabe, Kazumi Ogura, Masanori Nishiura, Masayuki Funatsu, Kazuhiro Yoshimoto, Koichi Takenobu, Tokuji Satake