Patents by Inventor Kazuhisa Sakamoto

Kazuhisa Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6444547
    Abstract: The present invention is characterized by providing epitaxial growth of a semiconductor layer on the surface of a wafer not provided with mirror finishing and having irregularity, introducing impurities having different conductivity type in the epitaxially grown semiconductor layer to form at least a pn junction, and further providing rapid thermal anneal by rapid heating-up and rapid cooling-down in any step in the manufacturing process. By so processing, there can be obtained a semiconductor device having high speed switching characteristics in stable manner without causing problems in manufacturing process such as diffusion of heavy metal or irradiation of corpuscular ray.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: September 3, 2002
    Assignee: Rohm Co., Ltd.
    Inventors: Kazuhisa Sakamoto, Koichi Kitaguro
  • Publication number: 20020024114
    Abstract: Formed on the surface of an n-type semiconductor layer (21) taken as a collector region is a base region (22) consisting of a p-type region, and formed in the p-type region is an emitter region (23) consisting of an n+-type region. Further, provided in the base region is a base electrode connecting portion (24) consisting of an n+-type region, and a base electrode (26) is connected to the surface of the base electrode connecting portion, and an emitter electrode (27) and a collector electrode (28) are provided and connected electrically to the emitter region and the collector region (21), respectively. As a result, a semiconductor device is obtained which has the transistor in which the reduction in power consumption with a high withstand voltage can be achieved, and the fast switching speed is possible and the large current is obtained. Further a voltage-drive type bipolar transistor such as a digital transistor is obtained which is small in load capacity while establishing a desired drive voltage.
    Type: Application
    Filed: June 5, 2001
    Publication date: February 28, 2002
    Inventor: Kazuhisa Sakamoto
  • Publication number: 20020001925
    Abstract: The present invention is characterized by providing epitaxial growth of a semiconductor layer on the surface of a wafer not provided with mirror finishing and having irregularity, introducing impurities having different conductivity type in the epitaxially grown semiconductor layer to form at least a pn junction, and further providing rapid thermal anneal by rapid heating-up and rapid cooling-down in any step in the manufacturing process. By so processing, there can be obtained a semiconductor device having high speed switching characteristics in stable manner without causing problems in manufacturing process such as diffusion of heavy metal or irradiation of corpuscular ray.
    Type: Application
    Filed: December 22, 1998
    Publication date: January 3, 2002
    Inventors: KAZUHISA SAKAMOTO, KOICHI KITAGURO
  • Patent number: 5841181
    Abstract: It is an object to provide a semiconductor apparatus having improved dielectric breakdown strength characteristics both by eliminating the discontinuity caused to the interface between a semiconductor layer and the overlying insulator film on account of the FLR provided for increasing the dielectric breakdown strength and by preventing the redistribution of impurities from the FLR into the insulator film. Another object is to provide a process for fabricating such improved semiconductor apparatus. The semiconductor layers of a first conduction type (i.e., n.sup.- type semiconductor layer 1b and epitaxial layer 1c) are provided with the semiconductor region of a second conduction type (i.e., p-type base region 2) to form a semiconductor device (transistor) and FLRs 4a and 4b are provided external to the perimeter of said semiconductor region but without being exposed from the surface of the epitaxial layer 1c.
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: November 24, 1998
    Assignee: Rohm Co., Ltd.
    Inventor: Kazuhisa Sakamoto
  • Patent number: 5808352
    Abstract: It is an object to provide a semiconductor apparatus having both fast switching characteristics and high dielectric breakdown strength or small leakage current characteristics, as well as a process for fabricating such improved semiconductor apparatus. The apparatus comprises a semiconductor substrate; a semiconductor layer on said semiconductor substrate, said semiconductor layer having a pn junction formed along the surface of said semiconductor substrate, wherein crystal defects being formed by irradiation with particle rays to the only vertical direction of said pn junction; and a silicon nitride film provided on the substrate surface of said layer for restraining the exposure to particle rays being provided on the substrate surface of said element in the areas other than said pn junction.
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: September 15, 1998
    Assignee: Rohm Co., Ltd.
    Inventor: Kazuhisa Sakamoto
  • Patent number: 5750443
    Abstract: Disclosed is a method of manufacturing a semiconductor device wherein a corpuscular beam is radiated to a semiconductor substrate to create crystal defects therein. The semiconductor substrate is subjected to a heat treatment, e.g. for 1 second to 60 minutes, wherein rapid heating-up, e.g. raising temperature to 550.degree. to 850.degree. C. within 10 minutes, is done in a process prior to that of carrying out of the radiation with a corpuscular beam. By doing so, there is provided a semiconductor device which is free from degradation in electrical characteristics such as current amplification factor and has an increased switching speed, even where crystal defects are created through the radiation of corpuscular beam such as an electron beam to shorten the carrier lifetime. Thus, the inventive semiconductor device is satisfied by both requirements of switching speed and electrical characteristic.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: May 12, 1998
    Assignee: Rohm Co., Ltd.
    Inventor: Kazuhisa Sakamoto
  • Patent number: 5637910
    Abstract: A transistor includes (a) a first semiconductor layer formed by a semiconductor substrate; (b) a second semiconductor layer formed on the first semiconductor layer and having an impurity of the same conductivity type as the first layer in a concentration lower than that of the first semiconductor layer; and (c) a third semiconductor layer formed on the second semiconductor layer having an impurity of the same conductivity type as the first semiconductor layer in a concentration lower than that of the second semiconductor layer. A base region is formed in the third layer and an emitter region is formed in the base region.
    Type: Grant
    Filed: February 1, 1995
    Date of Patent: June 10, 1997
    Assignee: Rohm Co., Ltd.
    Inventor: Kazuhisa Sakamoto