Patents by Inventor Kazuhisa Yamamura
Kazuhisa Yamamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11398572Abstract: A through-slit is provided in a semiconductor wafer. A first virtual cutting line defines a chip portion including an energy ray sensitive region as viewed from a direction perpendicular to a first main surface. The shortest distance from a second virtual cutting line to the edge of a second semiconductor region is smaller than the shortest distance from the first virtual cutting line to the edge of the second semiconductor region. The through-slit penetrates through the semiconductor wafer in the thickness direction along the second virtual cutting line. A side surface to which a first semiconductor region is exposed is formed in the chip portion by providing the through-slit. A fourth semiconductor region of a first conductivity type is provided on the side surface side of the chip portion by adding impurities to the side surface to which the first semiconductor region is exposed.Type: GrantFiled: September 5, 2018Date of Patent: July 26, 2022Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazumasa Kosugi, Shintaro Kamada, Kazuhisa Yamamura
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Patent number: 11101315Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.Type: GrantFiled: October 12, 2017Date of Patent: August 24, 2021Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Yoshimaro Fujii, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
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Publication number: 20200411702Abstract: A through-slit is provided in a semiconductor wafer. A first virtual cutting line defines a chip portion including an energy ray sensitive region as viewed from a direction perpendicular to a first main surface. The shortest distance from a second virtual cutting line to the edge of a second semiconductor region is smaller than the shortest distance from the first virtual cutting line to the edge of the second semiconductor region. The through-slit penetrates through the semiconductor wafer in the thickness direction along the second virtual cutting line. A side surface to which a first semiconductor region is exposed is formed in the chip portion by providing the through-slit. A fourth semiconductor region of a first conductivity type is provided on the side surface side of the chip portion by adding impurities to the side surface to which the first semiconductor region is exposed.Type: ApplicationFiled: September 5, 2018Publication date: December 31, 2020Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Kazumasa KOSUGI, Shintaro KAMADA, Kazuhisa YAMAMURA
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Patent number: 10879303Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.Type: GrantFiled: February 19, 2014Date of Patent: December 29, 2020Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Yoshimaro Fujii, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
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Patent number: 10840294Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.Type: GrantFiled: February 19, 2014Date of Patent: November 17, 2020Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Yoshimaro Fujii, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
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Patent number: 10396107Abstract: A photodiode array 1 has a plurality of photodetector channels 10 which are formed on an n-type substrate 2 having an n-type semiconductor layer 12, with a light to be detected being incident to the plurality of photodetector channels 10. The photodiode array 1 comprises: a p?-type semiconductor layer 13 formed on the n-type semiconductor layer 12 of the substrate 2; resistors 4 each of which is provided to each of the photodetector channels 10 and is connected to a signal conductor 3 at one end thereof; and an n-type separating part 20 formed between the plurality of photodetector channels 10. The p?-type semiconductor layer 13 forms a pn junction at the interface between the substrate 2, and comprises a plurality of multiplication regions AM for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.Type: GrantFiled: July 20, 2018Date of Patent: August 27, 2019Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuhisa Yamamura, Kenichi Sato
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Patent number: 10224361Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.Type: GrantFiled: June 10, 2016Date of Patent: March 5, 2019Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
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Patent number: 10192923Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.Type: GrantFiled: June 10, 2016Date of Patent: January 29, 2019Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
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Publication number: 20180331134Abstract: A photodiode array 1 has a plurality of photodetector channels 10 which are farmed on an n-type substrate 2 having an n-type semiconductor layer 12, with a light to be detected being incident to the plurality of photodetector channels 10. The photodiode array 1 comprises: a p?-type semiconductor layer 13 formed on the n-type semiconductor layer 12 of the substrate 2; resistors 4 each of which is provided to each of the photodetector channels 10 and is connected to a signal conductor 3 at one end thereof; and an n-type separating part 20 formed between the plurality of photodetector channels 10. The p?-type semiconductor layer 13 fauns a pn junction at the interface between the substrate 2, and comprises a plurality of multiplication regions AM for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.Type: ApplicationFiled: July 20, 2018Publication date: November 15, 2018Inventors: Kazuhisa YAMAMURA, Kenichi SATO
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Patent number: 10088579Abstract: A radiation measuring apparatus (20) includes a scatterer detector (10A), an absorber detector (10B) and a processing unit (12). Pixel electrodes (2) of the scatterer detector (10A) and the absorber detector (10B) are arranged such that a distance between centers of two neighbor pixel electrodes (2) is smaller than a mean free path of a recoil electron generated in the Compton scattering of an electromagnetic radiation. The processing unit (12) specifies and incidence direction of the electromagnetic radiation based on a recoiling direction to which the recoil electron recoils. In this way, an electron tracking-type Compton camera is realized which confines the incidence direction of the electromagnetic radiation by using the recoiling direction of the recoil electron in a Compton camera using a semiconductor detector.Type: GrantFiled: July 22, 2016Date of Patent: October 2, 2018Assignees: MITSUBISHI HEAVY INDUSTRIES, LTD., JAPAN AEROSPACE EXPLORATION AGENCY, HAMAMATSU PHOTONICS K.K.Inventors: Daisuke Matsuura, Yoshikatsu Kuroda, Kei Gemba, Tadayuki Takahashi, Shin Watanabe, Shin'ichiro Takeda, Hiroo Yamamoto, Kazumasa Kosugi, Kazuhisa Yamamura
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Patent number: 10050069Abstract: A photodiode array has a plurality of photodetector channels formed on an n-type substrate having an n-type semiconductor layer, with a light to be detected being incident to the photodetector channels. The array comprises: a p?-type semiconductor layer on the n-type semiconductor layer of the substrate; resistors is provided to each of the photodetector channels and is connected to a signal conductor at one end thereof; and an n-type separating part between the plurality of photodetector channels. The p?-type semiconductor layer forms a pn junction at the interface between the substrate, and comprises a plurality of multiplication regions for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.Type: GrantFiled: October 14, 2016Date of Patent: August 14, 2018Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuhisa Yamamura, Kenichi Sato
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Publication number: 20180180747Abstract: A radiation measuring apparatus (20) includes a scatterer detector (10A), an absorber detector (10B) and a processing unit (12). Pixel electrodes (2) of the scatterer detector (10A) and the absorber detector (10B) are arranged such that a distance between centers of two neighbor pixel electrodes (2) is smaller than a mean free path of a recoil electron generated in the Compton scattering of an electromagnetic radiation. The processing unit (12) specifies and incidence direction of the electromagnetic radiation based on a recoiling direction to which the recoil electron recoils. In this way, an electron tracking-type Compton camera is realized which confines the incidence direction of the electromagnetic radiation by using the recoiling direction of the recoil electron in a Compton camera using a semiconductor detector.Type: ApplicationFiled: July 22, 2016Publication date: June 28, 2018Inventors: Daisuke MATSUURA, Yoshikatsu KURODA, Kei GEMBA, Tadayuki TAKAHASHI, Shin WATANABE, Shin'ichiro TAKEDA, Hiroo YAMAMOTO, KAZUMASA KOSUGI, Kazuhisa Yamamura
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Patent number: 9972729Abstract: A p? type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p? type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p? type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p? type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.Type: GrantFiled: February 16, 2017Date of Patent: May 15, 2018Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuhisa Yamamura, Akira Sakamoto, Terumasa Nagano, Yoshitaka Ishikawa, Satoshi Kawai
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Publication number: 20180090535Abstract: Each semiconductor chip of a detector comprises a semiconductor substrate having a plurality of photodetector units, an insulating layer formed on a front face of the semiconductor substrate, a common electrode arranged on the insulating layer, a readout line for electrically connecting a quenching resistance of each photodetector unit and the common electrode to each other, and a through electrode extending from the common electrode to a rear face of the semiconductor substrate through a through hole of the semiconductor substrate.Type: ApplicationFiled: October 12, 2017Publication date: March 29, 2018Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Yoshimaro FUJII, Terumasa NAGANO, Kazuhisa YAMAMURA, Kenichi SATO, Ryutaro TSUCHIYA
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Publication number: 20170162726Abstract: A p? type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p? type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p? type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p? type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.Type: ApplicationFiled: February 16, 2017Publication date: June 8, 2017Inventors: Kazuhisa YAMAMURA, Akira SAKAMOTO, Terumasa NAGANO, Yoshitaka ISHIKAWA, Satoshi KAWAI
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Patent number: 9614109Abstract: A p? type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p? type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p? type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p? type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.Type: GrantFiled: April 10, 2015Date of Patent: April 4, 2017Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuhisa Yamamura, Akira Sakamoto, Terumasa Nagano, Yoshitaka Ishikawa, Satoshi Kawai
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Publication number: 20170033137Abstract: A photodiode array has a plurality of photodetector channels formed on an n-type substrate having an n-type semiconductor layer, with a light to be detected being incident to the photodetector channels. The array comprises: a p?-type semiconductor layer on the n-type semiconductor layer of the substrate; resistors is provided to each of the photodetector channels and is connected to a signal conductor at one end thereof; and an n-type separating part between the plurality of photodetector channels. The p?-type semiconductor layer forms a pn junction at the interface between the substrate, and comprises a plurality of multiplication regions for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.Type: ApplicationFiled: October 14, 2016Publication date: February 2, 2017Inventors: Kazuhisa YAMAMURA, Kenichi SATO
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Patent number: 9508763Abstract: A radiation detector has a semiconductor substrate of a first conductivity type, a plurality of semiconductor regions of a second conductivity type making junctions with the semiconductor substrate, and a plurality of electrodes joined to the corresponding semiconductor regions. The electrodes cover the corresponding semiconductor regions, when viewed from a direction perpendicular to a first principal face. The semiconductor regions include a plurality of first and second semiconductor regions in a two-dimensionally array. The first semiconductor regions arrayed in a first direction in the two dimensional array out of the plurality of first semiconductor regions are electrically connected to each other, and the second semiconductor regions arrayed in a second direction intersecting with the first direction out of the plurality of second semiconductor regions are electrically connected to each other.Type: GrantFiled: August 6, 2012Date of Patent: November 29, 2016Assignee: HAMAMATSU PHOTONICS K.K.Inventor: Kazuhisa Yamamura
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Patent number: 9484366Abstract: A photodiode array has a plurality of photodetector channels formed on an n-type substrate having an n-type semiconductor layer, with a light to be detected being incident to the photodetector channels. The array comprises: a p?-type semiconductor layer on the n-type semiconductor layer of the substrate; resistors is provided to each of the photodetector channels and is connected to a signal conductor at one end thereof; and an n-type separating part between the plurality of photodetector channels. The p?-type semiconductor layer forms a pn junction at the interface between the substrate, and comprises a plurality of multiplication regions for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.Type: GrantFiled: February 22, 2013Date of Patent: November 1, 2016Assignee: HAMAMATSU PHONOTICS K.K.Inventors: Kazuhisa Yamamura, Kenichi Sato
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Publication number: 20160284744Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.Type: ApplicationFiled: June 10, 2016Publication date: September 29, 2016Inventors: Koei YAMAMOTO, Terumasa NAGANO, Kazuhisa YAMAMURA, Kenichi SATO, Ryutaro TSUCHIYA