Patents by Inventor Kazuki Watanabe

Kazuki Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090168404
    Abstract: Light which tries to enter a diffuser plate 3 at an angle which exceeds an angle at which a percentage of reflected light increases rapidly (that is, the incidence angle ?=70 degrees) is all reflected by a reflecting surface 21 and then enters the diffuser plate 3. Therefore, a pseudo light source is formed by light which was collected near a connection point between adjacent reflecting surfaces 21 out of the emitted light of the discharge lamps 1. So, the brightness between the adjacent discharge lamps 1 is increased, and it is possible to reduce unevenness in brightness. Furthermore, since the discharge lamp 1 is housed inside the reflecting surface 21 whose cross-sectional shape is a parabola, it is possible to reduce the distance between a reflecting plate 2 and the diffuser plate 3, as compared with the prior art, and to reduce the thickness dimension in the anteroposterior direction.
    Type: Application
    Filed: July 5, 2006
    Publication date: July 2, 2009
    Inventors: Kazuyuki Matsukawa, Masao Kamada, Wataru Tanaka, Kazuki Watanabe, Isao Nara, Yasuo Uemoto
  • Publication number: 20090160652
    Abstract: The present invention provides a semiconductor integrated circuit device and a non-contact type IC card and a portable information terminal which uses the semiconductor integrated circuit device. The semiconductor integrated circuit device includes antenna terminals LA, LB which are connected to an antenna L1, a power source circuit B5 which has a rectifier/smoothing circuit B1 which obtains a DC voltage by rectifying and smoothing an AC signal which is supplied to the antenna terminal from the antenna and a shunt regulator B6 and a series regulator B7 which stabilize the DC voltage, and an internal circuit B8 which is operated upon the supply of the DC voltage from the power source circuit. The series regulator operates and the shunt regulator stops in a stage that a signal is transmitted to a reader/writer. The shunt regulator operates and the series regulator stops in a stage other than the stage that the signal is transmitted to the reader/writer.
    Type: Application
    Filed: March 3, 2009
    Publication date: June 25, 2009
    Inventors: Kazuki WATANABE, Kazuhiro Matsushita, Masaru Kubota
  • Publication number: 20090109001
    Abstract: A wireless IC tag system according to the present invention is provided with a wireless IC tag, a reader/writer device and a high-frequency signal output device. The reader/writer device outputs a first high-frequency signal. The high-frequency signal output device outputs a second high-frequency signal only during a period when the reader/writer device outputs the first high-frequency signal. The wireless IC tag is provided with an antenna, a power supply circuit and a communication circuit. The antenna receives the first and second high-frequency signals. The power supply circuit generates a power supply voltage from the first and second high-frequency signals. The communication circuit transmits and receives an information signal to and from the reader/writer device by utilizing the first high-frequency signal.
    Type: Application
    Filed: August 13, 2008
    Publication date: April 30, 2009
    Inventors: Kazuki Watanabe, Masaaki Yamamoto, Takanori Yamazoe
  • Patent number: 7505794
    Abstract: The present invention provides a semiconductor integrated circuit device and a non-contact type IC card and a portable information terminal which uses the semiconductor integrated circuit device. The semiconductor integrated circuit device includes antenna terminals LA, LB which are connected to an antenna L1, a power source circuit B5 which has a rectifier/smoothing circuit B1 which obtains a DC voltage by rectifying and smoothing an AC signal which is supplied to the antenna terminal from the antenna and a shunt regulator B6 and a series regulator B7 which stabilize the DC voltage, and an internal circuit B8 which is operated upon the supply of the DC voltage from the power source circuit. The series regulator operates and the shunt regulator stops in a stage that a signal is transmitted to a reader/writer. The shunt regulator operates and the series regulator stops in a stage other than the stage that the signal is transmitted to the reader/writer.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: March 17, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Kazuki Watanabe, Kazuhiro Matsushita, Masaru Kubota
  • Patent number: 7441711
    Abstract: In an IC card in which an internal circuit is operated by an internal power supply formed from alternate current from outside received by an antenna, the voltage of the internal power supply sometimes changes due to the operation of the internal circuit. Therefore, the voltage controlling circuit of the present invention includes a voltage controlling current source, and when the internal circuit is not operated and the current higher than a predetermined current is detected in the voltage controlling current source, an operating current detector circuit outputs an enable signal. When the internal circuit is operated in response to the enable signal, the current consumed in the internal circuit is subtracted from the current passing through the voltage controlling current source. Consequently, the current change in the entire internal power supply can be prevented, and the output voltage of the internal power supply can be kept constant.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: October 28, 2008
    Assignees: Renesas Technology Corp., Hitachi Ulsi Systems Co., Ltd.
    Inventors: Kazuki Watanabe, Hisataka Tsunoda, Norihisa Yamamoto, Kazuhiro Matsushita
  • Publication number: 20080237354
    Abstract: There are provided an operational amplifier (A1), a capacitor (C1) capable of transmitting an input signal to an inverting input terminal of the operational amplifier, and a feedback path (B11) disposed between an output terminal and the inverting input terminal in the operational amplifier, and a reference voltage is supplied to a non-inverting input terminal. There is provided an input/output stabilizing circuit (B13) for changing a threshold voltage of the operational amplifier, and adding a micro signal input to the inverting input terminal of the operational amplifier, thereby carrying out an input/output stabilizing control in response to a signal output from the operational amplifier. In response to the signal output from the operational amplifier, the threshold voltage of the operational amplifier is changed and the micro signal is added to the signal input to the inverting input terminal of the operational amplifiers so that the input/output stabilizing control is carried out.
    Type: Application
    Filed: December 18, 2007
    Publication date: October 2, 2008
    Inventors: Kazuki Watanabe, Ryouji Kanekawa
  • Publication number: 20080143488
    Abstract: An Radio Frequency Identification Device (RFID) for receiving commands transmitted from a reader/writer of a RFID system to which the RFID belongs, having a demodulation circuit comprising a variable LPF, a binarization circuit connected to the variable LPF, a transmission rate detection circuit for detecting the transmission rate of a received command from an output signal of the binarization circuit, and a control circuit for setting the bandwidth corresponding to the maximum transmission rate of the received command as the reception bandwidth of the variable LPF in the initial state, and changing the reception bandwidth of the variable LPF according to the detected transmission rate of the received command.
    Type: Application
    Filed: August 26, 2007
    Publication date: June 19, 2008
    Inventors: Masaaki Yamamoto, Takanori Yamazoe, Toshiyuki Kuwana, Kazuki Watanabe
  • Publication number: 20080093466
    Abstract: In an IC card of dual-way type which is used in common as a non-contact/contact operation card, an isolation transistor is provided between a power supply voltage terminal and a contact power supply circuit. Non-contact/contact judging and switching unit 6 turns OFF, when it is detected that the IC card is operated in a non-contact operation mode, an isolation transistor to isolate between the power supply voltage terminal and contact power supply circuit. Accordingly, when the power supply voltage terminal is terminated with a ground terminal during the non-contact operation mode, erroneous operation of the IC card can surely be prevented. Since the power supply voltage terminal becomes equal to a reference potential in this case, monitoring of voltage of the power supply voltage terminal can be prevented and security of the IC card can also be improved remarkably.
    Type: Application
    Filed: December 10, 2007
    Publication date: April 24, 2008
    Inventors: Hisataka Tsunoda, Keisuke Takata, Kazuki Watanabe, Norihisa Yamamoto, Kazuhiro Matsushita
  • Patent number: 7357330
    Abstract: A semiconductor integrated circuit device (IC) and a contactless IC card including a receiver circuit that is able to stably demodulate information signals superimposed on AC signals from an interrogator. The receiver circuit included in the IC is equipped with antenna terminals, a power supply circuit, and a filter circuit. The information signal from which a high frequency component was eliminated through the filter circuit is input via a capacitor to an inverting input terminal of an operational amplifier and a reference voltage is input to a non-inverting input terminal thereof. After the information signal is fed back through a feedback path to the non-inverting input terminal of the operational amplifier, that signal is amplified and the amplified information signal is binarised by a binarising circuit, thereby data transmitted from the interrogator is demodulated. The contactless IC card comprises an antenna coil and the IC including this receiver circuit.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: April 15, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kazuki Watanabe, Yutaka Nakadai, Shinichi Ozawa
  • Publication number: 20080071892
    Abstract: A sensor node may be used for another purpose for a moment and may also be replaced. By configuring, for a sensor node, a logic node which is provided with the physical node use information indicating whether or not the sensor node is in use and the logical node use information indicating whether or not the sensor node is provided as a logic node, a sensor node to be replaced may be specified based on the replacement request of the sensor node, a sensor node is selected which is configured as logic node providing the physical node use information indicating that the sensor node is not used and the logic node use information indicating that the sensor node is provided as the logic node, thus selected sensor node is identified as the replacing sensor node to achieve the replacement from the replaced sensor node to the replacing sensor node.
    Type: Application
    Filed: July 13, 2007
    Publication date: March 20, 2008
    Inventors: Keiro Muro, Toshiyuki Odaka, Minoru Ogushi, Kei Suzuki, Shoji Suzuki, Kazuki Watanabe
  • Publication number: 20080068156
    Abstract: In order to realize the joining with the legitimate devices for joining with a limited number of operations for terminal devices for which small dimension and low power consumption are required, in the radio communication system according to the present invention, a ReJoin Command for instructing the sensor node to join with other PANs is provided, and by the use of this command, it is possible to change the joining of the sensor node joined with an unintended PAN to another intended PAN. In addition, for joining with the PAN to which it is joined is disjoined, repeated attempts are to be made to join with the PAN.
    Type: Application
    Filed: July 12, 2007
    Publication date: March 20, 2008
    Inventors: Isao Shimokawa, Keiro Muro, Minoru Ogushi, Kazuki Watanabe, Miki Hayakawa
  • Publication number: 20080061323
    Abstract: A wireless sensor chip suitable for the compact, high-sensitive, and low-cost examination apparatus for easily examining a biological material such as gene at low cost is provided. A sensor chip is formed on an SOI substrate, and an n type semiconductor layer on which a PMOS transistor is formed and a p type semiconductor layer on which an nMOS transistor is formed are isolated by a pn junction. Therefore, the p type semiconductor layer at the outermost portion (chip edge portion to be in contact with solution) is set to floating, and the maximum potential and the minimum potential of the chip are supplied to an n type semiconductor layer and a p type semiconductor layer inside the outermost portion, respectively. Also, the chip is covered with an ion impermeable insulating film for reducing the penetration of positive ions through the oxide layer.
    Type: Application
    Filed: October 29, 2007
    Publication date: March 13, 2008
    Inventors: Yoshiaki Yazawa, Kazuki Watanabe, Masao Kamahori, Yukinori Kunimoto
  • Publication number: 20070249398
    Abstract: Depending on the power supplied to the non-contact electronic device, the voltage suppression characteristic of the regulator function mounted in a power supply circuit is changed. When the power supplied to the non-contact electronic device is small, the voltage change amount of the voltage between antenna terminals for the current flowing in the antenna is increased, and when the power supplied to the non-contact electronic device is large, the voltage change amount of the voltage between the antenna terminals for the current flowing in the antenna is decreased. By this means, the current change of the entire consumption current for the current change of the load modulator (transmitting circuit) at the time of the long distance communication is increased.
    Type: Application
    Filed: April 19, 2007
    Publication date: October 25, 2007
    Inventors: Kazuki Watanabe, Hisataka Tsunoda, Tetsuo Funane
  • Patent number: 7276891
    Abstract: To augment the temperature dependence of the voltage used to detect temperature in a semiconductor integrated circuit device having a temperature detection function, the operating power supply voltage of the semiconductor integrated circuit device needed to be enhanced. It becomes possible for such a semiconductor integrated circuit device to generate a voltage of great temperature dependence, even under a low operating power supply voltage, by including: a temperature-to-current converter which outputs a first electric current proportional to temperature; a current generator which outputs a second electric current having extremely small temperature dependence; a current subtracter which outputs a third electric current proportional to a differential current obtained by subtracting the second electric current from the first electric current; and a current-to-voltage converter which converts the third electric current into a voltage.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: October 2, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kazuki Watanabe, Ryo Nemoto, Yoshiaki Yazawa
  • Publication number: 20070216668
    Abstract: Disclosed herewith is an information terminal provided with a function for displaying image data. An electromagnetic wave output from a main device provided outside the information terminal is received by an antenna and converted to a binary signal by a wave detection circuit. Using the signal obtained by this wave detection circuit, a power supply circuit generates a power for driving a processor, a memory, a display part, a data line driving signal, a data line driving signal, and a timing controller. The processor decodes the signal received by the wave detection circuit and stores the received information in the memory. The timing controller generates control signals of the data line driving circuit and the scanning line driving circuit, as well as image data so as to display images on the display part.
    Type: Application
    Filed: February 9, 2007
    Publication date: September 20, 2007
    Inventors: Mitsuhide Miyamoto, Mutsuko Hatano, Hajime Akimoto, Kazuki Watanabe, Kouichi Uesaka
  • Publication number: 20070176772
    Abstract: In an RFID system including RFID tags each incorporating a sensor, accuracy of measurement by the sensor can be improved. For example, when measurements are performed several times by using RFID tags each incorporating a sensor unit, generation of a carrier directed from an RFID reader/writer to the RFID tags is stopped for a predetermined period every time when a measurement ends. By this means, the chip temperature of the RFID tag increased due to power consumption in each measurement can be reduced to, for example, ambient temperature every time when a measurement ends. Therefore, an error in measurement by the sensor unit can be reduced, thereby achieving accurate measurement.
    Type: Application
    Filed: July 25, 2006
    Publication date: August 2, 2007
    Inventors: Ryo Nemoto, Hiroshi Yoshigi, Yoshiaki Yazawa, Kazuki Watanabe
  • Patent number: 7250863
    Abstract: A measuring system enabled to simultaneously start measurement by a plurality of transponders by communication between a reader/writer and a plurality of transponders each with a built-in sensor is to be provided. In addition to an identifier SID intrinsic to a sensor and a chip identifier TID intrinsic to a transponder chip, a unique identifier UID combining the sensor SID and the chip TID is provided in each transponder. A reader/writer, in designating a transponder and transmitting a measurement command to it, invalidates the chip TID out of the UID of each transponder, validates only information regarding a sensor function, and transmits measurement commands including action commands unique to each type of sensor.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: July 31, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Ryo Nemoto, Tadashi Oonishi, Kazuki Watanabe, Yoshiaki Yazawa, Yasushi Goto, Hiroshi Yoshigi
  • Patent number: 7245513
    Abstract: In a semiconductor integrated circuit device in which a rectifier device constituting a rectifier comprises a MOS transistor whose gate is connected to one antenna terminal and whose source is connected to the other antenna terminal, the parasitic capacitance applied between the antenna terminals increased. The present invention provides a technology for connecting a first MOS transistor whose gate is connected to a second input terminal between a first input terminal and a first output terminal, allowing an output terminal of a first bulk terminal control circuit, which is connected between the first and second input terminals, to control a bulk terminal of the first MOS transistor, and allowing an output terminal of a second bulk terminal control circuit, which is connected between the first and second input terminals, to control a bulk terminal of a second MOS transistor, which is connected between the second input terminal and the first output terminal.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: July 17, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kazuki Watanabe, Yoshiki Kawajiri, Hisataka Tsunoda
  • Publication number: 20070155442
    Abstract: The present invention provides a semiconductor integrated circuit device and a non-contact type IC card and a portable information terminal which uses the semiconductor integrated circuit device. The semiconductor integrated circuit device includes antenna terminals LA, LB which are connected to an antenna L1, a power source circuit B5 which has a rectifier/smoothing circuit B1 which obtains a DC voltage by rectifying and smoothing an AC signal which is supplied to the antenna terminal from the antenna and a shunt regulator B6 and a series regulator B7 which stabilize the DC voltage, and an internal circuit B8 which is operated upon the supply of the DC voltage from the power source circuit. The series regulator operates and the shunt regulator stops in a stage that a signal is transmitted to a reader/writer. The shunt regulator operates and the series regulator stops in a stage other than the stage that the signal is transmitted to the reader/writer.
    Type: Application
    Filed: January 30, 2004
    Publication date: July 5, 2007
    Inventors: Kazuki Watanabe, Masaru Kubota
  • Publication number: 20070127185
    Abstract: There is a need for turning off a transistor in a power supply switch circuit irrespective of relative potential relationship between a contact power supply terminal and an internal power supply line and making it possible to decrease an on-resistance of an MOS transistor without increasing the size of the MOS transistor constituting the power supply switch circuit. The power supply switch circuit is comprised of two PMOS transistors whose gate terminals connect with two pull-up circuits. A charge pump circuit generates a negative voltage and is connected to a pull-down circuit. The pull-down circuit is connected to the gate terminals in common. During a contactless operation, the pull-up circuit short-circuits one gate terminal to a contact power supply terminal VDD and the other gate terminal to an internal power supply line VDDA. During a contact operation, the pull-up circuit supplies both gate terminals with a negative voltage from the charge pump circuit.
    Type: Application
    Filed: November 30, 2006
    Publication date: June 7, 2007
    Inventor: Kazuki Watanabe