Patents by Inventor Kazunari Kimino

Kazunari Kimino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11800802
    Abstract: A radiation device or the like has a structure for selectively converting thermal energy into an electromagnetic wave. The radiation device has a conductor layer, a semiconductor layer, and a plurality of conductor disks. The plurality of conductor disks are arranged on the semiconductor layer so that the same arrangement pattern is constituted in each of a plurality of unit constituent regions each having a rectangular shape with a side of 4.5 to 5.5 ?m. The arrangement pattern of individual unit components includes nine conductor disks so as to correspond to a 3×3 matrix, and the nine conductor disks include four or more kinds of conductor disks having diameters different from each other. As a result, a two-dimensional periodic structure of the arrangement pattern is formed on the semiconductor layer.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: October 24, 2023
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., OSAKA UNIVERSITY
    Inventors: Takeshi Inoue, Hiroo Kanamori, Takafumi Ohtsuka, Junichi Takahara, Kazunari Kimino
  • Publication number: 20210151654
    Abstract: A radiation device or the like has a structure for selectively converting thermal energy into an electromagnetic wave. The radiation device has a conductor layer, a semiconductor layer, and a plurality of conductor disks. The plurality of conductor disks are arranged on the semiconductor layer so that the same arrangement pattern is constituted in each of a plurality of unit constituent regions each having a rectangular shape with a side of 4.5 to 5.5 ?m. The arrangement pattern of individual unit components includes nine conductor disks so as to correspond to a 3×3 matrix, and the nine conductor disks include four or more kinds of conductor disks having diameters different from each other. As a result, a two-dimensional periodic structure of the arrangement pattern is formed on the semiconductor layer.
    Type: Application
    Filed: July 31, 2018
    Publication date: May 20, 2021
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., OSAKA UNIVERSITY
    Inventors: Takeshi INOUE, Hiroo KANAMORI, Takafumi OHTSUKA, Junichi TAKAHARA, Kazunari KIMINO
  • Patent number: 9337234
    Abstract: A photoelectric converter includes a first pn junction comprised of at least two semiconductor regions of different conductivity types, and a first field-effect transistor including a first source connected with one of the semiconductor regions, a first drain, a first insulated gate and a same conductivity type channel as that of the one of the semiconductor regions. The first drain is supplied with a second potential at which the first pn junction becomes zero-biased or reverse-biased relative to a potential of the other of the semiconductor regions. When the first source turns to a first potential and the one of the semiconductor regions becomes zero-biased or reverse-biased relative to the other semiconductor regions, the first pn junction is controlled not to be biased by a deep forward voltage by supplying a first gate potential to the first insulated gate, even when either of the semiconductor regions is exposed to light.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: May 10, 2016
    Assignees: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, RICOH COMPANY, LTD.
    Inventors: Yutaka Hayashi, Toshitaka Ota, Yasushi Nagamune, Hirofumi Watanabe, Takaaki Negoro, Kazunari Kimino
  • Patent number: 9197220
    Abstract: A reset method of an photoelectric conversion device at least including a phototransistor having a first collector, a first base, and a first emitter, and a first field-effect transistor having a first source, a first drain, and a first gate, includes: connecting the first base, and one of the first source and the first drain of the first field-effect transistor by having a common region, or a continuous region, without a base electrode; supplying a base reset potential to the other of the first source and the first drain; and overlapping a time in which a first emitter potential is supplied to the first emitter and a time in which a first ON-potential that turns on the first field-effect transistor is supplied to the first gate.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: November 24, 2015
    Assignees: National Institute of Advanced Industrial Science and Technology, RICOH COMPANY, LTD.
    Inventors: Yutaka Hayashi, Toshitaka Ota, Yasushi Nagamune, Hirofumi Watanabe, Takaaki Negoro, Kazunari Kimino
  • Publication number: 20140239158
    Abstract: A photoelectric converter includes a first pn junction comprised of at least two semiconductor regions of different conductivity types, and a first field-effect transistor including a first source connected with one of the semiconductor regions, a first drain, a first insulated gate and a same conductivity type channel as that of the one of the semiconductor regions. The first drain is supplied with a second potential at which the first pn junction becomes zero-biased or reverse-biased relative to a potential of the other of the semiconductor regions. When the first source turns to a first potential and the one of the semiconductor regions becomes zero-biased or reverse-biased relative to the other semiconductor regions, the first pn junction is controlled not to be biased by a deep forward voltage by supplying a first gate potential to the first insulated gate, even when either of the semiconductor regions is exposed to light.
    Type: Application
    Filed: October 5, 2012
    Publication date: August 28, 2014
    Applicants: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE, RICOH COMPANY, LTD.
    Inventors: Yutaka Hayashi, Toshitaka Ota, Yasushi Nagamune, Hirofumi Watanabe, Takaaki Negoro, Kazunari Kimino
  • Patent number: 7838951
    Abstract: A semiconductor sensor and a manufacturing method of the same capable of making the specific gravity of a weight part to be greater than that of a weight part made of semiconductor material only is disclosed. The semiconductor sensor includes the weight part, a supporting part, a flexible part, and plural piezoresistive elements. The weight part includes a weight part photosensitive resin layer made of photosensitive resin in which metal particles are included. The supporting part surrounds and is separated from the weight part. The flexible part is provided between the weight part and the supporting part to support the weight part. The flexible part includes a flexible part semiconductor layer where the plural piezoresistive elements are formed. This configuration allows the specific gravity of the weight part photosensitive resin layer greater than that of the weight part semiconductor layer due to the metal particles.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: November 23, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Kazunari Kimino
  • Patent number: 7745235
    Abstract: A semiconductor sensor is disclosed that includes a substrate including at least a semiconductor layer. The substrate includes a weight arranging part in the vicinity of the center of the substrate, a flexible part around the weight arranging part, and supporting parts provided around the flexible part. The semiconductor sensor further includes a weight arranged on the weight arranging part. The weight is made of a material different from that of the weight arranging part and the flexible parts.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: June 29, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Kazunari Kimino
  • Patent number: 7731076
    Abstract: A semiconductor device manufacturing apparatus includes a substrate holding section that holds a semiconductor wafer substrate, a discharge mechanism that discharges liquid drops of metal paste from a discharge nozzle toward a surface of the semiconductor wafer substrate, and a driving mechanism that moves at least one of the substrate holding section and the discharge nozzle. A control section is provided to control the discharge and driving mechanisms so as to adhere the metal paste to the surface. The semiconductor wafer substrate includes a terminal unit formed from two or more electrically separated terminals connected to a device circuit and an insulation layer having an opening in a formation position of the terminal unit. Further, the control section controls the discharge and driving mechanisms to selectively coat the opening of the semiconductor wafer substrate with the metal paste overlying the terminal unit to be electrically connected.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: June 8, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Kazunari Kimino
  • Patent number: 7651724
    Abstract: An apparatus and a method for manufacturing semiconductor devices implemented with improved steps of forming a sealant resin layer on the surface of a wafer substrate provided thereon with protruded electrodes. Through process steps of sending driving signals to a stage unit and discharging head based on the comparison with stage position information from stage position detector, and controlling the position of a substrate holding unit with the suction held semiconductor wafer substrate and the scanning movements of discharging mechanism such that minute liquid droplets of raw sealant resin are suitably discharged from discharging head, a raw sealant resin layer is formed on the surface the wafer substrate except the area for forming bump electrodes. The raw sealant resin layer is subsequently hardened to form a sealant resin layer. The reduction of manufacturing costs, and more precise control of location and thickness of the sealant resin become feasible by the method disclosed herein.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: January 26, 2010
    Assignee: Ricoh Comapny, Ltd.
    Inventor: Kazunari Kimino
  • Publication number: 20090108399
    Abstract: An apparatus and a method for manufacturing semiconductor devices is disclosed for selectively disconnecting a fuse element out of plural fuse elements formed on a semiconductor wafer substrate which is provided with the plural fuse elements and a dielectric layer having at least one opening corresponding to the location for the plural fuse elements.
    Type: Application
    Filed: December 3, 2008
    Publication date: April 30, 2009
    Inventor: Kazunari Kimino
  • Publication number: 20090061628
    Abstract: A semiconductor device manufacturing apparatus includes a substrate holding section that holds a semiconductor wafer substrate, a discharge mechanism that discharges liquid drops of metal paste from a discharge nozzle toward a surface of the semiconductor wafer substrate, and a driving mechanism that moves at least one of the substrate holding section and the discharge nozzle. A control section is provided to control the discharge and driving mechanisms so as to adhere the metal paste to the surface. The semiconductor wafer substrate includes a terminal unit formed from two or more electrically separated terminals connected to a device circuit and an insulation layer having an opening in a formation position of the terminal unit. Further, the control section controls the discharge and driving mechanisms to selectively coat the opening of the semiconductor wafer substrate with the metal paste overlying the terminal unit to be electrically connected.
    Type: Application
    Filed: June 18, 2008
    Publication date: March 5, 2009
    Inventor: Kazunari Kimino
  • Patent number: 7473319
    Abstract: An apparatus and a method for manufacturing semiconductor devices is disclosed for selectively disconnecting a fuse element out of plural fuse elements formed on a semiconductor wafer substrate which is provided with the plural fuse elements and a dielectric layer having at least one opening corresponding to the location for the plural fuse elements.
    Type: Grant
    Filed: August 9, 2005
    Date of Patent: January 6, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Kazunari Kimino
  • Publication number: 20080265346
    Abstract: A semiconductor sensor and a manufacturing method of the same capable of making the specific gravity of a weight part to be greater than that of a weight part made of semiconductor material only is disclosed. The semiconductor sensor includes the weight part, a supporting part, a flexible part, and plural piezoresistive elements. The weight part includes a weight part photosensitive resin layer made of photosensitive resin in which metal particles are included. The supporting part surrounds and is separated from the weight part. The flexible part is provided between the weight part and the supporting part to support the weight part. The flexible part includes a flexible part semiconductor layer where the plural piezoresistive elements are formed. This configuration allows the specific gravity of the weight part photosensitive resin layer greater than that of the weight part semiconductor layer due to the metal particles.
    Type: Application
    Filed: April 24, 2008
    Publication date: October 30, 2008
    Inventor: KAZUNARI KIMINO
  • Publication number: 20080241984
    Abstract: A semiconductor sensor is disclosed that includes a substrate including at least a semiconductor layer. The substrate includes a weight arranging part in the vicinity of the center of the substrate, a flexible part around the weight arranging part, and supporting parts provided around the flexible part. The semiconductor sensor further includes a weight arranged on the weight arranging part. The weight is made of a material different from that of the weight arranging part and the flexible parts.
    Type: Application
    Filed: June 5, 2008
    Publication date: October 2, 2008
    Applicant: Ricoh Company, Ltd.
    Inventor: Kazunari Kimino
  • Patent number: 7404511
    Abstract: A semiconductor device manufacturing apparatus includes a substrate holding section that holds a semiconductor wafer substrate, a discharge mechanism that discharges liquid drops of metal paste from a discharge nozzle toward a surface of the semiconductor wafer substrate, and a driving mechanism that moves at least one of the substrate holding section and the discharge nozzle. A control section is provided to control the discharge and driving mechanisms so as to adhere the metal paste to the surface. The semiconductor wafer substrate includes a terminal unit formed from two or more electrically separated terminals connected to a device circuit and an insulation layer having an opening in a formation position of the terminal unit. Further, the control section controls the discharge and driving mechanisms to selectively coat the opening of the semiconductor wafer substrate with the metal paste overlying the terminal unit to be electrically connected.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: July 29, 2008
    Assignee: Ricoh Company, Ltd.
    Inventor: Kazunari Kimino
  • Patent number: 7398684
    Abstract: A semiconductor sensor is disclosed that includes a substrate including at least a semiconductor layer. The substrate includes a weight arranging part in the vicinity of the center of the substrate, a flexible part around the weight arranging part, and supporting parts provided around the flexible part. The semiconductor sensor further includes a weight arranged on the weight arranging part. The weight is made of a material different from that of the weight arranging part and the flexible parts.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: July 15, 2008
    Assignee: Ricoh Company, Ltd.
    Inventor: Kazunari Kimino
  • Publication number: 20070240510
    Abstract: A semiconductor sensor is disclosed that includes a substrate including at least a semiconductor layer. The substrate includes a weight arranging part in the vicinity of the center of the substrate, a flexible part around the weight arranging part, and supporting parts provided around the flexible part. The semiconductor sensor further includes a weight arranged on the weight arranging part. The weight is made of a material different from that of the weight arranging part and the flexible parts.
    Type: Application
    Filed: March 6, 2006
    Publication date: October 18, 2007
    Inventor: Kazunari Kimino
  • Publication number: 20070116863
    Abstract: An apparatus and a method for manufacturing semiconductor devices implemented with improved steps of forming a sealant resin layer on the surface of a wafer substrate provided thereon with protruded electrodes. Through process steps of sending driving signals to a stage unit and discharging head based on the comparison with stage position information from stage position detector, and controlling the position of a substrate holding unit with the suction held semiconductor wafer substrate and the scanning movements of discharging mechanism such that minute liquid droplets of raw sealant resin are suitably discharged from discharging head, a raw sealant resin layer is formed on the surface the wafer substrate except the area for forming bump electrodes. The raw sealant resin layer is subsequently hardened to form a sealant resin layer. The reduction of manufacturing costs, and more precise control of location and thickness of the sealant resin become feasible by the method disclosed herein.
    Type: Application
    Filed: April 7, 2006
    Publication date: May 24, 2007
    Inventor: Kazunari Kimino
  • Publication number: 20060030153
    Abstract: An apparatus and a method for manufacturing semiconductor devices is disclosed for selectively disconnecting a fuse element out of plural fuse elements formed on a semiconductor wafer substrate which is provided with the plural fuse elements and a dielectric layer having at least one opening corresponding to the location for the plural fuse elements.
    Type: Application
    Filed: August 9, 2005
    Publication date: February 9, 2006
    Inventor: Kazunari Kimino
  • Patent number: 6946331
    Abstract: An apparatus and a method for manufacturing semiconductor devices is disclosed for selectively disconnecting a fuse element out of plural fuse elements formed on a semiconductor wafer substrate which is provided with the plural fuse elements and a dielectric layer having at least one opening corresponding to the location for the plural fuse elements.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: September 20, 2005
    Assignee: Ricoh Company
    Inventor: Kazunari Kimino