Patents by Inventor Kazunari Kimino

Kazunari Kimino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040219770
    Abstract: A semiconductor device manufacturing apparatus includes a substrate holding section that holds a semiconductor wafer substrate, a discharge mechanism that discharges liquid drops of metal paste from a discharge nozzle toward a surface of the semiconductor wafer substrate, and a driving mechanism that moves at least one of the substrate holding section and the discharge nozzle. A control section is provided to control the discharge and driving mechanisms so as to adhere the metal paste to the surface. The semiconductor wafer substrate includes a terminal unit formed from two or more electrically separated terminals connected to a device circuit and an insulation layer having an opening in a formation position of the terminal unit. Further, the control section controls the discharge and driving mechanisms to selectively coat the opening of the semiconductor wafer substrate with the metal paste overlying the terminal unit to be electrically connected.
    Type: Application
    Filed: March 8, 2004
    Publication date: November 4, 2004
    Inventor: Kazunari Kimino
  • Publication number: 20040096591
    Abstract: An apparatus and a method for manufacturing semiconductor devices is disclosed for selectively disconnecting a fuse element out of plural fuse elements formed on a semiconductor wafer substrate which is provided with the plural fuse elements and a dielectric layer having at least one opening corresponding to the location for the plural fuse elements.
    Type: Application
    Filed: September 22, 2003
    Publication date: May 20, 2004
    Inventor: Kazunari Kimino
  • Publication number: 20040023439
    Abstract: An apparatus and a method for manufacturing semiconductor devices implemented with improved steps of forming a sealant resin layer on the surface of a wafer substrate provided thereon with protruded electrodes. Through process steps of sending driving signals to a stage unit and discharging head based on the comparison with stage position information from stage position detector, and controlling the position of a substrate holding unit with the suction held semiconductor wafer substrate and the scanning movements of discharging mechanism such that minute liquid droplets of raw sealant resin are suitably discharged from discharging head, a raw sealant resin layer is formed on the surface the wafer substrate except the area for forming bump electrodes. The raw sealant resin layer is subsequently hardened to form a sealant resin layer. The reduction of manufacturing costs, and more precise control of location and thickness of the sealant resin become feasible by the method disclosed herein.
    Type: Application
    Filed: July 1, 2003
    Publication date: February 5, 2004
    Inventor: Kazunari Kimino