Patents by Inventor Kazunori Inoue

Kazunori Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140319515
    Abstract: A TFT substrate includes a TFT including a source electrode having a lower source electrode and an upper source electrode, which are electrically connected to each other, and a drain electrode having a lower drain electrode and an upper drain electrode, which are electrically connected to each other. The lower source electrode and the lower drain electrode are in contact with a lower surface of the semiconductor film, and the upper source electrode and the upper drain electrode are in contact with an upper surface of the semiconductor film.
    Type: Application
    Filed: April 17, 2014
    Publication date: October 30, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kensuke NAGAYAMA, Kazunori INOUE, Yasuyoshi ITO, Nobuaki ISHIGA, Naoki TSUMURA, Shinichi YANO
  • Publication number: 20140299881
    Abstract: A TFT array substrate has an organic insulating film formed of a photosensitive organic resin material. A common electrode and a lead-out wiring are formed on the organic insulating film, and a pixel electrode is formed above the common electrode with an interlayer insulating film provided between them. The pixel electrode is connected to the lead-out wiring through a contact hole formed in the interlayer insulating film. The lead-out wiring and the common electrode are connected to a drain electrode and a common wiring, respectively, through contact holes formed in the organic insulating film. A metal cap film is provided on each of the lead-out wiring and the common electrode in the contact holes formed in the organic insulating film.
    Type: Application
    Filed: March 21, 2014
    Publication date: October 9, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Koji ODA, Kazunori INOUE, Nobuaki ISHIGA, Osamu MIYAKAWA
  • Patent number: 8841541
    Abstract: In a solar battery including: a photoelectric conversion layer that converts light into electricity; and a reflecting electrode layer that is provided on an opposite side of a light incident side in the photoelectric conversion layer and reflects light passed through the photoelectric conversion layer to the photoelectric conversion layer side, to realize a reflecting electrode layer having excellent adhesion and thermal corrosion resistance, stable electrical characteristics and satisfactory light reflection characteristics and to obtain a solar battery having high reliability, excellent electrical characteristics and optical characteristics, the reflecting electrode layer includes, on the photoelectric conversion layer side, a metal layer containing silver as a main component and containing nitrogen.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: September 23, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takumi Nakahata, Kazunori Inoue, Yusuke Yamagata
  • Patent number: 8839502
    Abstract: A production method of an electronic component includes: forming a sheet having a resin layer and a metal layer formed under the resin layer; bonding the sheet to a substrate so that the metal layer is arranged on a functional portion of an acoustic wave element formed on the substrate, a frame portion surrounding the functional portion is formed between the metal layer and the substrate, a cavity is formed on the functional portion by the metal layer and the frame portion, and the resin layer covers the metal layer and the frame portion.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: September 23, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Tsuyoshi Yokoyama, Kazunori Inoue, Kazuhiro Matsumoto
  • Patent number: 8748755
    Abstract: An electronic component includes: a substrate; a functional portion provided on the substrate; an interconnection line provided on the substrate and electrically connected to the functional portion; a metal wall provided on the substrate so as to surround the functional portion and the interconnection line; and a seal portion that contacts the metal wall and covers the functional portion and the interconnection line so as to define a cavity above the functional portion, the seal portion being made of liquid crystal polymer.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: June 10, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Kazunori Inoue, Tsutomu Miyashita, Kazuhiro Matsumoto
  • Patent number: 8732923
    Abstract: A method for manufacturing an acoustic wave device includes: adhering wafer-shaped first and second piezoelectric substrates to a front face of a first and second adhesive sheet respectively and dividing the first and the second piezoelectric substrates into rectangles; adhering a third and fourth adhesive sheet to the first and second piezoelectric substrates respectively and moving at least one divided portions of the first and second piezoelectric substrates selectively to the third and fourth adhesive sheet respectively; moving the first piezoelectric substrate on the first adhesive sheet to the fourth adhesive sheet; and moving the second piezoelectric substrate on the second adhesive sheet to the third adhesive sheet.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: May 27, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Kazunori Inoue, Tsutomu Miyashita, Kazuhiro Matsumoto
  • Patent number: 8736149
    Abstract: An electronic component includes: an element that is located on a substrate; a signal wiring that is located on the substrate and electrically connected to the element; a metal plate that is located so as to form a cavity on a functional part of the element and covers an upper surface of the cavity; a support post that is located on the substrate so as not to be located on the signal wiring, and supports the metal plate; and an insulating portion that covers the metal plate and the support post, and contacts a side surface of the cavity.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: May 27, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Kazunori Inoue, Masafumi Iwaki, Tsutomu Miyashita, Kazuhiro Matsumoto
  • Patent number: 8729776
    Abstract: An electronic component includes: a substrate; a functional element located on the substrate; a wiring located on the substrate and electrically connected to the functional element; a metal ceiling located above the functional element so that a space is formed between the metal ceiling and the functional element; and a sealing portion located on the metal ceiling, wherein the metal ceiling is electrically connected to a signal wiring that is included in the wiring and transmits a high-frequency signal.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: May 20, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Takashi Matsuda, Kazunori Inoue
  • Publication number: 20140042430
    Abstract: A thin film transistor substrate includes a thin film transistor, a source wire, an upper-layer source wire, and a pixel electrode. The thin film transistor includes: a source electrode and a drain electrode located to be spaced from each other on the same plane; a semiconductor film located to straddle those electrodes; an insulating film located to cover at least the source electrode, the drain electrode, and the semiconductor film; an upper-layer source electrode and an upper-layer drain electrode located on the insulating film and respectively connected to the semiconductor film through contact holes; and a gate electrode located below or above the semiconductor film. The source wire extends from the source electrode. The upper-layer source wire extends from the upper-layer source electrode. The pixel electrode is electrically connected to the drain electrode.
    Type: Application
    Filed: July 25, 2013
    Publication date: February 13, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazunori INOUE, Nobuaki ISHIGA, Kensuke NAGAYAMA, Naoki TSUMURA
  • Patent number: 8624244
    Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, and a source electrode and a drain electrode placed on the semiconductor layer and electrically connected with the semiconductor layer. The semiconductor layer includes a light-transmitting semiconductor film and an ohmic conductive film placed on the light-transmitting semiconductor film and having a lower light transmittance than the light-transmitting semiconductor film. The ohmic conductive film is formed not to protrude from the light-transmitting semiconductor film. The ohmic conductive film is formed in separate parts with a channel part between the source electrode and the drain electrode interposed therebetween. The source electrode and the drain electrode are connected to the light-transmitting semiconductor film through the ohmic conductive film.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: January 7, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Reiko Noguchi, Kazunori Inoue, Masaru Aoki, Toshihiko Iwasaka
  • Patent number: 8558248
    Abstract: In accordance with one aspect of the present invention, an Al alloy film contains a first additive element composed of Ni, and at least one type of second additive element selected from the group consisting of Group 2A alkaline earth metals and Groups 3B and 4B metalloids in Period 2 or 3 of the periodic table of the elements. Furthermore, the composition ratio of the first additive element is 0.5-5 at %, and the composition ratio of the second additive element is 0.1-3 at %.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: October 15, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura, Takumi Nakahata
  • Patent number: 8558226
    Abstract: Provided is a thin film transistor having a semiconductor film disposed in a plurality of portions on a substrate, a source electrode and a drain electrode which are disposed, on a semiconductor film, in contact with the semiconductor film while being spaced from each other, and a gate electrode which is disposed across the source electrode and the drain electrode via a gate insulating film; an auxiliary capacitance electrode which is disposed on the semiconductor film while in contact with the semiconductor film; a source line which has the semiconductor film in a lower layer, extends from the source electrode; a gate line which extends from the gate electrode; a pixel electrode which is electrically connected to the drain electrode; and an auxiliary capacitance electrode connecting line which electrically connects the auxiliary capacitance electrodes to each other in the adjacent pixels.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: October 15, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Toshihiko Iwasaka, Kazunori Inoue, Masaru Aoki, Reiko Noguchi
  • Patent number: 8546804
    Abstract: It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: October 1, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takeshi Ono, Naoki Nakagawa, Yusuke Yamagata, Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura, Toru Takeguchi
  • Patent number: 8421941
    Abstract: There is provided a TFT substrate including a gate electrode having a thick film part and a thin film part with a smaller film thickness than the thick film part, a semiconductor active film formed above the thick film part and the thin film part of the gate electrode, an ohmic contact film formed on an inside of the semiconductor active film and on the semiconductor active film corresponding to the thin film part on an outside of the thick film part, and an electrode film constituting a source electrode and a drain electrode, having a planar shape identical to or on an inside of the ohmic contact film, and formed on the ohmic contact film.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: April 16, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kumi Tsuda, Kazunori Inoue, Masaru Aoki
  • Patent number: 8405091
    Abstract: A display device includes a metal conductive layer formed on a substrate, a transparent electrode film formed on the substrate and joined to the metal conductive layer and an interlayer insulating film isolating the metal conductive layer and the transparent conductive film. The metal conductive layer has a lower aluminum layer made of aluminum or aluminum alloy, an intermediate impurity containing layer made of aluminum or aluminum alloy containing impurities and formed on a substantially entire upper surface of the lower aluminum layer and an upper aluminum layer made of aluminum or aluminum alloy and formed on the intermediate impurity containing layer. In the interlayer insulating film and the upper aluminum layer, a contact hole penetrates therethrough and locally exposes the intermediate impurity containing layer, and the transparent electrode film is joined to the metal conductive layer in the intermediate impurity containing layer exposed from the contact hole.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: March 26, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takumi Nakahata, Kazunori Inoue, Koji Oda, Naoki Nakagawa, Nobuaki Ishiga
  • Publication number: 20130062995
    Abstract: An electronic component includes: a substrate; a functional element located on the substrate; a wiring located on the substrate and electrically connected to the functional element; a metal ceiling located above the functional element so that a space is formed between the metal ceiling and the functional element; and a sealing portion located on the metal ceiling, wherein the metal ceiling is electrically connected to a signal wiring that is included in the wiring and transmits a high-frequency signal.
    Type: Application
    Filed: July 24, 2012
    Publication date: March 14, 2013
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Takashi MATSUDA, Kazunori INOUE
  • Publication number: 20130056737
    Abstract: An Al wiring film having a tapered shape is obtained easily and in a stable manner. An Al wiring film has a double-layer structure including a first Al alloy layer made of Al or an Al alloy, and a second Al alloy layer laid on the first Al alloy layer and having a composition different from a composition of the first Al alloy layer by containing at least one element of Ni, Pd, and Pt. The second Al alloy layer is etched by an alkaline chemical solution used in a developing process of a photoresist, and an end portion of the second Al alloy layer recedes from an end portion of the photoresist. Thereafter, by performing wet etching using the photoresist as a mask, a cross section of the Al wiring film becomes a tapered shape.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 7, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuyuki FUJIWARA, Kazunori INOUE, Takahito YAMABE
  • Publication number: 20120305911
    Abstract: Provided is a thin film transistor having a semiconductor film disposed in a plurality of portions on a substrate, a source electrode and a drain electrode which are disposed, on a semiconductor film, in contact with the semiconductor film while being spaced from each other, and a gate electrode which is disposed across the source electrode and the drain electrode via a gate insulating film; an auxiliary capacitance electrode which is disposed on the semiconductor film while in contact with the semiconductor film; a source line which has the semiconductor film in a lower layer, extends from the source electrode; a gate line which extends from the gate electrode; a pixel electrode which is electrically connected to the drain electrode; and an auxiliary capacitance electrode connecting line which electrically connects the auxiliary capacitance electrodes to each other in the adjacent pixels.
    Type: Application
    Filed: May 25, 2012
    Publication date: December 6, 2012
    Applicant: Mitsubishi Electric Corporation
    Inventors: Toshihiko IWASAKA, Kazunori INOUE, Masaru AOKI, Reiko NOGUCHI
  • Publication number: 20120297595
    Abstract: A method for manufacturing an acoustic wave device includes: adhering wafer-shaped first and second piezoelectric substrates to a front face of a first and second adhesive sheet respectively and dividing the first and the second piezoelectric substrates into rectangles; adhering a third and fourth adhesive sheet to the first and second piezoelectric substrates respectively and moving at least one divided portions of the first and second piezoelectric substrates selectively to the third and fourth adhesive sheet respectively; moving the first piezoelectric substrate on the first adhesive sheet to the fourth adhesive sheet; and moving the second piezoelectric substrate on the second adhesive sheet to the third adhesive sheet.
    Type: Application
    Filed: May 24, 2012
    Publication date: November 29, 2012
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Kazunori INOUE, Tsutomu MIYASHITA, Kazuhiro MATSUMOTO
  • Publication number: 20120299665
    Abstract: A production method of an electronic component includes: forming a sheet having a resin layer and a metal layer formed under the resin layer; bonding the sheet to a substrate so that the metal layer is arranged on a functional portion of an acoustic wave element formed on the substrate, a frame portion surrounding the functional portion is formed between the metal layer and the substrate, a cavity is formed on the functional portion by the metal layer and the frame portion, and the resin layer covers the metal layer and the frame portion.
    Type: Application
    Filed: August 2, 2012
    Publication date: November 29, 2012
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Tsuyoshi YOKOYAMA, Kazunori INOUE, Kazuhiro MATSUMOTO