Abstract: It is an object of the present invention to provide a technique capable of reducing a contact resistance between source and drain electrodes and a channel region. A thin film transistor includes: a first semiconductor layer provided on a first insulation film lying on a gate electrode and adjacent to a partial region that is part of the first insulation film lying on the gate electrode as seen in plan view; a source electrode and a drain electrode sandwiching the partial region therebetween as seen in plan view; a second insulation film having an opening portion provided over the partial region; and a second semiconductor layer provided on the second insulation film. The second semiconductor layer is in contact with the source electrode and the drain electrode, and is in contact with the partial region and the first semiconductor layer through the opening portion of the second insulation film.

Abstract: A vehicle control system includes a data processing apparatus and a self-driving vehicle. The data processing apparatus acquires travel history information items from a plurality of vehicles, respectively, and generates, from travel history information items, reference information in which a vector information item representing a path on which the plurality of vehicles have traveled is associated with an attribute information item relating to the path represented by the vector information item, and distributes the generated reference information to the self-driving vehicle. The self-driving vehicle executes self-driving along a path represented by the reference information acquired from data processing apparatus.

Abstract: An array substrate according to the present invention is a TFT substrate including a pixel TFT and a drive TFT on a substrate, where the pixel TFT includes a first source electrode, a first drain electrode, and an amorphous silicon layer, and the drive TFT includes a third oxide semiconductor layer provided on a gate insulating film while overlapping a second gate electrode in plan view, and a second source electrode and a second drain electrode overlapping the third oxide semiconductor layer in plan view, with a third separation portion separating the second source electrode and the second drain electrode from each other.

Abstract: An opening insulation film covers a substrate and is in contact with a side surface of a gate electrode. The opening insulation film is provided with a first opening portion having a side surface on the gate electrode. A gate insulation film made of an oxide insulator is on the gate electrode and the opening insulation film. A semiconductor channel film made of an oxide semiconductor is on the gate insulation film and is encompassed by the first opening portion. Source and drain electrodes are on the semiconductor channel film. A source upper-layer electrode and a drain upper-layer electrode both made of an oxide are provided at least on upper surfaces of the source electrode and the drain electrode, respectively. An interlayer insulation film made of an oxide has a portion provided on the source upper-layer electrode and the drain upper-layer electrode and is in contact the semiconductor channel film.

Abstract: A plurality of pixel electrodes disposed in a matrix are electrically connected with a plurality of first thin film transistors, respectively. Coloring layers in a plurality of colors overlap, in a plan view, with two or more pixel electrodes adjacent to each other in one direction among the plurality of pixel electrodes. Channel layers of the first thin film transistors are covered from above by a coloring laminated body including end parts of the respective coloring layers in at least two colors among the coloring layers in a plurality of colors, the end parts overlapping with each other in the plan view.

Abstract: A first gate insulating layer and a protective insulating layer are made of silicon nitride. A second gate insulating layer is provided on gate electrodes via a first gate insulating layer. A first intersecting layer is provided on gate lines via a first gate insulating layer. A channel layer has the same shape as the second gate insulating layer. A second intersecting layer is provided on and has the same shape as the first intersecting layer. Source lines intersect with the gate lines on the second intersecting layer. The first gate insulating layer and the protective insulating layer have gate contact holes. The protective insulating layer has source contact holes. The second gate insulating layer, the channel layer, and the first and second intersecting layers are made of oxide and have a common species of elements and a common crystal structure.

Abstract: A substrate for a display device, includes: an insulation substrate; an insulation film, which is formed on the insulation substrate and is primarily made of one of silicon oxide and oxidized metal; an inorganic film, which is formed to be in direct contact with the insulation film and has an insulator part that is formed by changing oxide semiconductor into insulator; and a wiring film, which is formed to be in direct contact with the insulator part.

Abstract: A TFT in which a channel region is formed of an oxide semiconductor is provided. Threshold voltage shift due to holes photoexcited in the vicinity of a source electrode and a drain electrode is prevented so that reliability is enhanced. A lower semiconductor layer is partially provided between an oxide semiconductor layer and a gate insulating film. The lower semiconductor layer is present in at least one of a source overlapping region where the oxide semiconductor layer overlaps a source electrode and a drain overlapping region where the oxide semiconductor layer overlaps a drain electrode. In contrast, a region where the lower semiconductor layer is absent is provided between the source overlapping region and the drain overlapping region.

Abstract: A TFT substrate includes: a first semiconductor layer made of a-Si, disposed on a gate insulation layer, facing to a first gate electrode; a first and a second contact layers made of oxide having semiconductor characteristics and each partially disposed in contact with the first semiconductor layer; a first and a second electrodes connected with the first and the second contact layers, respectively; a second semiconductor layer having the same composition as the first contact layer, disposed on the gate insulation layer, facing to a second gate electrode; a third and a fourth electrodes having the same composition as the first electrode and each partially disposed in contact with the second semiconductor layer; and a pixel electrode made of oxide having conductive characteristics and the same composition as the first contact layer, disposed on an insulation layer in a first region, connected with the second electrode.

Abstract: The present disclosure relates to a method for manufacturing an active matrix substrate. A first laminated film in which a semiconductor film, a first transparent conductive film, and a first metal film are laminated is formed on a substrate. A photoresist pattern having a first part covering a formation area of a channel part of a thin film transistor, a second part covering a formation area of a pixel electrode, and a third part covering formation areas of a source electrode, a drain electrode, and a source line, is formed on the first laminated film. The first metal film, the first transparent conductive film, and the semiconductor film are patterned using the photoresist pattern; the first part is removed and the first metal film and the first transparent conductive film are patterned; and the second part is removed and the first metal film is patterned.

Abstract: It is an object to provide a technique capable of suppressing a damage on a semiconductor channel layer due to a process of forming a source electrode and a drain electrode and also suppressing a short channel effect. A thin film transistor includes a gate electrode, a first insulating film, a source electrode, a drain electrode, a second insulating film, and a semiconductor channel layer that includes an oxide semiconductor. The second insulating film is disposed on the first insulating film, the source electrode, and the drain electrode. The semiconductor channel layer is electrically connected to the source electrode and the drain electrode via a first contact hole and a second contact hole provided in the second insulating film.

Abstract: A first semiconductor layer is opposed to a first gate electrode with intermediation of a gate insulation film, and is formed of amorphous silicon. First and second contact layers each have a portion arranged on the first semiconductor layer, and are formed of an oxide semiconductor. A first electrode is connected to the first contact layer. A second electrode is connected to the second contact layer.

Abstract: An array substrate according to the present invention is a TFT substrate including a pixel TFT and a drive TFT on a substrate, where the pixel TFT includes a first source electrode, a first drain electrode, and an amorphous silicon layer, and the drive TFT includes a third oxide semiconductor layer provided on a gate insulating film while overlapping a second gate electrode in plan view, and a second source electrode and a second drain electrode overlapping the third oxide semiconductor layer in plan view, with a third separation portion separating the second source electrode and the second drain electrode from each other.

Abstract: Device (100) has: a low-speed interval extraction unit (120) for extracting, from GPS information, a low-speed interval extending from the location at a first time point at which the measured speed of a vehicle has fallen below a prescribed value, to the location at a second time point at which the speed has exceeded the prescribed value; a vehicle speed transition model generating unit (130) for generating a model having, as constraint condition, the length and the amount of time of the low-speed interval, for indicating temporal transition of the speed in such a way that the speed continuously increases to the second time point after having decreased from the first time point; and a stop determination unit (140) for determining that the vehicle has stopped within the low-speed interval, on the condition that an interval in which the speed is zero or less is present within the model.

Abstract: A thin film transistor substrate includes: a gate insulating film that covers a gate electrode and a common electrode; a transparent oxide film selectively disposed on the gate insulating film; a source electrode and a drain electrode that are spaced from each other on the transparent oxide film; and a light transmissive pixel electrode electrically connected to the drain electrode. The transparent oxide film includes a conductive region and a semiconductor region. The conductive region is disposed in a lower portion of the source electrode and the drain electrode and disposed in a portion that continues from the lower portion of the drain electrode, extends to part of an upper portion of the common electrode, and forms the pixel electrode. The semiconductor region is disposed in a portion corresponding to a lower layer in a region between the source electrode and the drain electrode.

Abstract: The insulating properties of terminal lines on an array substrate can be maintained without adding any steps for avoiding formation of a counter electrode on the peripheral portion of a color filter substrate. A display includes an insulation film formed to cover an electrode formed on a surface of an array substrate, an oxide semiconductor film formed on a surface of a color filter substrate, and a seal member that is located between the insulation film and the oxide semiconductor film, which face each other, and that bonds the insulation film and the oxide semiconductor film together. An area surrounded by the seal member in plan view is taken as a display area. A portion of the oxide semiconductor film that corresponds to the display area is a conductor, and a portion of the oxide semiconductor film that corresponds to the outside of the display area is an insulator.

Abstract: The present invention relates to a TFT substrate, and a pixel includes a gate electrode selectively provided on a substrate, a gate insulating film covering the gate electrode, a semiconductor channel layer selectively provided on the gate insulating film, a protective insulating film provided on the semiconductor channel layer, a first interlayer insulating film provided on the substrate, a source electrode and a drain electrode that are separated from each other and directly in contact with the semiconductor channel layer via respective contact holes penetrating the first interlayer insulating film and the protective insulating film, and a pixel electrode extending from the drain electrode. A first light shielding film is provided on the protective insulating film to overlap with at least a channel region in plan view, and a second light shielding film is provided on the source electrode and the drain electrode to overlap with the semiconductor channel layer and the first light shielding film in plan view.

Abstract: A drive circuit includes an output circuit provided in a display panel to output a gate-on voltage and a gate-off voltage to a plurality of gate lines. The plurality of gate lines include first to sixth gate lines sequentially disposed in a scanning direction. A first transistor is put into an on state to electrically connect the first gate line and the third gate line, a second transistor is put into the on state to electrically connect the second gate line and the fourth gate line, the third transistor is put into the on state to electrically connect the third gate line and the fifth gate line, and the fourth transistor is put into the on state to electrically connect the fourth gate line and the sixth gate line, after the output circuit outputs the gate-on voltage to the first to fourth gate line.

Abstract: A plurality of pixel electrodes disposed in a matrix are electrically connected with a plurality of first thin film transistors, respectively. Coloring layers in a plurality of colors overlap, in a plan view, with two or more pixel electrodes adjacent to each other in one direction among the plurality of pixel electrodes. Channel layers of the first thin film transistors are covered from above by a coloring laminated body including end parts of the respective coloring layers in at least two colors among the coloring layers in a plurality of colors, the end parts overlapping with each other in the plan view.

Abstract: It is an object to provide a technique capable of suppressing a damage on a semiconductor channel layer due to a process of forming a source electrode and a drain electrode and also suppressing a short channel effect. A thin film transistor includes a gate electrode, a first insulating film, a source electrode, a drain electrode, a second insulating film, and a semiconductor channel layer that includes an oxide semiconductor. The second insulating film is disposed on the first insulating film, the source electrode, and the drain electrode. The semiconductor channel layer is electrically connected to the source electrode and the drain electrode via a first contact hole and a second contact hole provided in the second insulating film.