Abstract: A drive circuit includes an output circuit provided in a display panel to output a gate-on voltage and a gate-off voltage to a plurality of gate lines. The plurality of gate lines include first to sixth gate lines sequentially disposed in a scanning direction. A first transistor is put into an on state to electrically connect the first gate line and the third gate line, a second transistor is put into the on state to electrically connect the second gate line and the fourth gate line, the third transistor is put into the on state to electrically connect the third gate line and the fifth gate line, and the fourth transistor is put into the on state to electrically connect the fourth gate line and the sixth gate line, after the output circuit outputs the gate-on voltage to the first to fourth gate line.

Abstract: A first oxide semiconductor layer of a pixel TFT has a first structure in which a first source electrode and a first drain electrode have, at both end portions thereof, two types of reduction action regions formed by the first oxide semiconductor layer protruding outward in a channel width direction of a first channel portion from both the first source electrode and the first drain electrode. A second oxide semiconductor layer of a drive circuit TFT has a second structure formed without protruding outward in a channel width direction of a second channel portion from a second source electrode and a second drain electrode. A protective insulation film is provided to cover the first oxide semiconductor layer, the first source electrode, and the first drain electrode.

Abstract: An opening insulation film covers a substrate and is in contact with a side surface of a gate electrode. The opening insulation film is provided with a first opening portion having a side surface on the gate electrode. A gate insulation film made of an oxide insulator is on the gate electrode and the opening insulation film. A semiconductor channel film made of an oxide semiconductor is on the gate insulation film and is encompassed by the first opening portion. Source and drain electrodes are on the semiconductor channel film. A source upper-layer electrode and a drain upper-layer electrode both made of an oxide are provided at least on upper surfaces of the source electrode and the drain electrode, respectively. An interlayer insulation film made of an oxide has a portion provided on the source upper-layer electrode and the drain upper-layer electrode and is in contact the semiconductor channel film.

Abstract: An acoustic wave device includes a substrate, a functional element provided on the substrate, a cover layer provided on or above the substrate to cover the functional element, and a protection layer that covers the cover layer. The cover layer includes a curved portion that is curved to protrude outward. A hollow space is defined between the curved portion and the substrate, and the functional element is provided in the hollow space. The acoustic wave device also includes a conductive portion that is provided between the curved portion and the protection layer and extends along a surface of the curved portion.

Abstract: A through-hole that extends from an upper surface of a cover opposite a support to a lower surface of the support facing a substrate is provided in the support and the cover. The through-hole overlaps a portion of a wiring line in a plan view. An acoustic wave device further includes an electrode film that is electrically connected to the wiring line in the through-hole, and a protective layer that includes an insulating material and that covers a portion of the electrode film. The protective layer is connected to the cover and the support in the through-hole. Differences in thermal expansion coefficients between the protective layer and the cover and between the protective layer and the support are smaller than a difference in thermal expansion coefficients between the protective layer and the electrode film.

Abstract: The disclosure relates to a (thin-film transistor) TFT substrate that includes a light shielding film provided continuously adjacent to a common electrode in a region overlapping with a drain electrode in plan view below a drain electrode. Furthermore, the TFT substrate includes a light shielding film provided below the source electrode in a region where the source electrode and the common electrode overlap in plan view. In addition, in a gate terminal portion, the TFT substrate includes a light shielding film having conductivity above a gate electrode. The light shielding film is electrically connected to the gate electrode, and overlaps with the gate electrode in plan view.

Abstract: A TFT in which a channel region is formed of an oxide semiconductor is provided. Threshold voltage shift due to holes photoexcited in the vicinity of a source electrode and a drain electrode is prevented so that reliability is enhanced. A lower semiconductor layer is partially provided between an oxide semiconductor layer and a gate insulating film. The lower semiconductor layer is present in at least one of a source overlapping region where the oxide semiconductor layer overlaps a source electrode and a drain overlapping region where the oxide semiconductor layer overlaps a drain electrode. In contrast, a region where the lower semiconductor layer is absent is provided between the source overlapping region and the drain overlapping region.

Abstract: It is an object of the present invention to provide a technique capable of reducing a contact resistance between source and drain electrodes and a channel region. A thin film transistor includes: a first semiconductor layer provided on a first insulation film lying on a gate electrode and adjacent to a partial region that is part of the first insulation film lying on the gate electrode as seen in plan view; a source electrode and a drain electrode sandwiching the partial region therebetween as seen in plan view; a second insulation film having an opening portion provided over the partial region; and a second semiconductor layer provided on the second insulation film. The second semiconductor layer is in contact with the source electrode and the drain electrode, and is in contact with the partial region and the first semiconductor layer through the opening portion of the second insulation film.

Abstract: A TFT included in a pixel unit and a protection circuit unit includes a gate insulating layer covering a gate electrode and gate wiring, and a channel layer overlapped with the gate electrode on a gate insulating layer in plan view. The TFT included in the pixel unit includes a channel protective layer covering the channel layer, and a source electrode and a drain electrode is partially overlapped with the channel protective layer and being in contact with the channel layer. The TFT included in the protection circuit unit includes: a source electrode and a drain electrode being in contact with the channel layer and mutually separately disposed; and a protective insulating layer being in contact with the channel layer and covering the source electrode, the drain electrode, and the channel protective layer. A pixel electrode electrically connected to the drain electrode is included in the pixel unit.

Abstract: A drive circuit includes an output circuit provided in a display panel to output a gate-on voltage and a gate-off voltage to a plurality of gate lines. The plurality of gate lines include first to sixth gate lines sequentially disposed in a scanning direction. A first transistor is put into an on state to electrically connect the first gate line and the third gate line, a second transistor is put into the on state to electrically connect the second gate line and the fourth gate line, the third transistor is put into the on state to electrically connect the third gate line and the fifth gate line, and the fourth transistor is put into the on state to electrically connect the fourth gate line and the sixth gate line, after the output circuit outputs the gate-on voltage to the first to fourth gate line.

Abstract: A TFT substrate includes: a first semiconductor layer made of a-Si, disposed on a gate insulation layer, facing to a first gate electrode; a first and a second contact layers made of oxide having semiconductor characteristics and each partially disposed in contact with the first semiconductor layer; a first and a second electrodes connected with the first and the second contact layers, respectively; a second semiconductor layer having the same composition as the first contact layer, disposed on the gate insulation layer, facing to a second gate electrode; a third and a fourth electrodes having the same composition as the first electrode and each partially disposed in contact with the second semiconductor layer; and a pixel electrode made of oxide having conductive characteristics and the same composition as the first contact layer, disposed on an insulation layer in a first region, connected with the second electrode.

Abstract: A TFT substrate is provided with a pixel TFT and a drive-circuit TFT disposed on a substrate. The pixel TFT includes a source electrode and a drain electrode that are disposed on the surface of the semiconductor layer and separated from each other. The drive-circuit TFT includes an etch stopper layer disposed on the semiconductor layer, and a source electrode and a drain electrode that are disposed on the surfaces of the etch stopper layer and the semiconductor layer and separated from each other.

Abstract: A drive circuit includes an output circuit provided in a display panel to output a gate-on voltage and a gate-off voltage to a plurality of gate lines. The plurality of gate lines include first to sixth gate lines sequentially disposed in a scanning direction. A first transistor is put into an on state to electrically connect the first gate line and the third gate line, a second transistor is put into the on state to electrically connect the second gate line and the fourth gate line, the third transistor is put into the on state to electrically connect the third gate line and the fifth gate line, and the fourth transistor is put into the on state to electrically connect the fourth gate line and the sixth gate line, after the output circuit outputs the gate-on voltage to the first to fourth gate line.

Abstract: A first oxide semiconductor layer of a pixel TFT has a first structure in which a first source electrode and a first drain electrode have, at both end portions thereof, two types of reduction action regions formed by the first oxide semiconductor layer protruding outward in a channel width direction of a first channel portion from both the first source electrode and the first drain electrode. A second oxide semiconductor layer of a drive circuit TFT has a second structure formed without protruding outward in a channel width direction of a second channel portion from a second source electrode and a second drain electrode. A protective insulation film is provided to cover the first oxide semiconductor layer, the first source electrode, and the first drain electrode.

Abstract: The purpose of the present invention is to provide a technique with which it is possible to suppress light having a harmful wavelength from reaching an active layer. A thin film transistor substrate includes: an active layer which is disposed on a gate insulating film, overlaps with a gate electrode in plan view, and contains an oxide semiconductor; a source electrode and a drain electrode, each connected to the active layer; a protective insulating film disposed on the active layer, the source electrode, and the drain electrode; and a pixel electrode disposed on an insulating film that includes the gate insulating film or the gate insulating film and the protective insulating film, and above the absorption layer, the pixel electrode being connected to the drain electrode.

Abstract: It is an object of the present invention to provide a technique capable of reducing a contact resistance between source and drain electrodes and a channel region. A thin film transistor includes: a first semiconductor layer provided on a first insulation film lying on a gate electrode and adjacent to a partial region that is part of the first insulation film lying on the gate electrode as seen in plan view; a source electrode and a drain electrode sandwiching the partial region therebetween as seen in plan view; a second insulation film having an opening portion provided over the partial region; and a second semiconductor layer provided on the second insulation film. The second semiconductor layer is in contact with the source electrode and the drain electrode, and is in contact with the partial region and the first semiconductor layer through the opening portion of the second insulation film.

Abstract: A vehicle control system includes a data processing apparatus and a self-driving vehicle. The data processing apparatus acquires travel history information items from a plurality of vehicles, respectively, and generates, from travel history information items, reference information in which a vector information item representing a path on which the plurality of vehicles have traveled is associated with an attribute information item relating to the path represented by the vector information item, and distributes the generated reference information to the self-driving vehicle. The self-driving vehicle executes self-driving along a path represented by the reference information acquired from data processing apparatus.

Abstract: An array substrate according to the present invention is a TFT substrate including a pixel TFT and a drive TFT on a substrate, where the pixel TFT includes a first source electrode, a first drain electrode, and an amorphous silicon layer, and the drive TFT includes a third oxide semiconductor layer provided on a gate insulating film while overlapping a second gate electrode in plan view, and a second source electrode and a second drain electrode overlapping the third oxide semiconductor layer in plan view, with a third separation portion separating the second source electrode and the second drain electrode from each other.

Abstract: An opening insulation film covers a substrate and is in contact with a side surface of a gate electrode. The opening insulation film is provided with a first opening portion having a side surface on the gate electrode. A gate insulation film made of an oxide insulator is on the gate electrode and the opening insulation film. A semiconductor channel film made of an oxide semiconductor is on the gate insulation film and is encompassed by the first opening portion. Source and drain electrodes are on the semiconductor channel film. A source upper-layer electrode and a drain upper-layer electrode both made of an oxide are provided at least on upper surfaces of the source electrode and the drain electrode, respectively. An interlayer insulation film made of an oxide has a portion provided on the source upper-layer electrode and the drain upper-layer electrode and is in contact the semiconductor channel film.

Abstract: An elastic wave device includes resonators having a piezoelectric substrate, a resonation unit formed on the piezoelectric substrate, and reflectors formed on respective sides of the resonation unit on the piezoelectric substrate, and bumps formed on the piezoelectric substrate. The resonators are configured such that two or more split resonators are connected in parallel, and a bump is formed in a region sandwiched between reflectors of the split resonators.