Patents by Inventor Kazuo Kobayashi

Kazuo Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120081475
    Abstract: There is provided a liquid discharging head discharging a liquid, including: a channel unit having a liquid channel including a pressure chamber which has an opening at one surface of the channel unit; a piezoelectric element formed of a piezoelectric material; an intermediate member preventing the liquid in the pressure chamber and the piezoelectric element from making contact with each other; a first adhesive layer composed of a first adhesive and adhering the channel unit and the intermediate member, the first adhesive being a thermo-setting adhesive starting to be cured at a first temperature; and a second adhesive layer composed of a second adhesive and adhering the intermediate member and the piezoelectric element, the second adhesive starting to be cured at a second temperature lower than the first temperature.
    Type: Application
    Filed: September 13, 2011
    Publication date: April 5, 2012
    Inventors: Koichiro HARA, Kazuo Kobayashi
  • Patent number: 8084278
    Abstract: A wafer WF is mounted in a substrate holder, and the substrate holder is placed in a film forming furnace. The film forming furnace is evacuated by a vacuum pump through a gas discharge part to remove remaining oxygen as completely as possible. Then, a temperature in the film forming furnace is heated to a range of 800° C. to 950° C. under reduced pressure while an inert gas such as Ar or helium (He) is being introduced through a gas introduction part. When the temperature reaches this temperature range, an inflow of the inert gas is stopped. Vaporized ethanol is introduced as a source gas into the film forming furnace through the gas introduction part, thus forming a graphite film on an entire surface of the wafer WF.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: December 27, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yukio Uda, Koichi Sekiya, Kazuo Kobayashi, Yoichiro Tarui
  • Publication number: 20110306277
    Abstract: A compound chamfering device that manufactures prism-shaped ingot blocks of excellent surface smoothness is disclosed. The four-corner round surfaces and the four sides of a prism-shaped ingot obtained by using a pair of rotary blades of a slicer to perform four-side peeloff of a cylindrical ingot block are chamfered by rough grinding with a pair of cup wheel type rough grinding grindstones. A pair of cup wheel type finishing grinding grindstones are used to chamfering by finishing grinding the four-corner round surfaces and the four sides of the block.
    Type: Application
    Filed: December 10, 2010
    Publication date: December 15, 2011
    Applicant: OKAMOTO MACHINE TOOL WORKS, LTD.
    Inventors: Yutaka YOSHIDA, Kazuo Kobayashi, Tsuyoshi Toshida, Yukio Uehara, Yasuhiro Terakubo, Hirotsugu Saitou
  • Patent number: 8071709
    Abstract: The present invention provides a novel fluorine-containing rubber composite material having both of excellent fuel impermeability and excellent cold resistance, a fuel impermeable sealing material comprising the composite material and a process for preparing the composite material. The fluorine-containing rubber composite material comprises crosslinked particles of fluorine-containing silicone rubber dispersed in a fluorine-containing rubber. It is preferable that the fluorine-containing rubber comprises a vinylidene fluoride/tetrafluoroethylene/perfluoro vinyl ether copolymer, and the composite material has cold resistance of not more than ?35° C. and fuel permeability of not more than 500 g·mm/m2·day. The fuel impermeable sealing material comprises the composite material. The process for preparing the composite material comprises a step for co-coagulation of a fluorine-containing rubber emulsion and an emulsion of crosslinked fluorine-containing silicone rubber.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: December 6, 2011
    Assignees: Daikin Industries, Ltd., Dow Corning Corporation
    Inventors: Mitsuru Kishine, Hirofumi Nishibayashi, Toshiki Ichisaka, Kazuo Kobayashi, Ryuji Tachibana, Tadashi Okawa, Katsumi Kihara
  • Patent number: 8047897
    Abstract: To provide a high-rigidity flat grinding device, a substrate flat grinding device has three fastening plate lifting-and-lowering mechanisms that have kinematic couplings and a cylinder rod that move the fastening plate upward or downward. Being a high-rigidity grinding device in which the load of the fastening plate 6 also is a load on the grindstone 14 that does the grinding, there is little deflection in the thickness distribution of the substrates that are obtained, even if they are semiconductor substrates having a large substrate diameter of 450 mm.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: November 1, 2011
    Assignee: Okamoto Machine Tool Works, Ltd.
    Inventors: Moriyuki Kashiwa, Etsuo Fujita, Kazuo Kobayashi, Tomio Kubo
  • Patent number: 8044498
    Abstract: A semiconductor device can be manufactured with a high non-defect ratio, making it possible to easily guarantee the KGD (Known-Good-Die) of semiconductor chips, when configuring one packaged semiconductor device on which a plurality of semiconductor chips is mounted. Utilizing each semiconductor chip is made possible without limits on terminal position, pitch, signal arrangement, and so on. Protrusions provided to a semiconductor chip mounted sealing sub-board are attached to a package substrate. A plurality of semiconductor bare chips is disposed in a space formed between the semiconductor chip mounted sealing sub-board and the package substrate, making wiring possible.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 25, 2011
    Assignee: Genusion Inc.
    Inventors: Moriyoshi Nakashima, Kazuo Kobayashi, Natsuo Ajika
  • Publication number: 20110223694
    Abstract: A wafer WF is mounted in a substrate holder, and the substrate holder is placed in a film forming furnace. The film forming furnace is evacuated by a vacuum pump through a gas discharge part to remove remaining oxygen as completely as possible. Then, a temperature in the film forming furnace is heated to a range of 800° C. to 950° C. under reduced pressure while an inert gas such as Ar or helium (He) is being introduced through a gas introduction part. When the temperature reaches this temperature range, an inflow of the inert gas is stopped. Vaporized ethanol is introduced as a source gas into the film forming furnace through the gas introduction part, thus forming a graphite film on an entire surface of the wafer WF.
    Type: Application
    Filed: December 7, 2010
    Publication date: September 15, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yukio UDA, Koichi SEKIYA, Kazuo KOBAYASHI, Yoichiro TARUI
  • Publication number: 20110207336
    Abstract: A method of manufacturing a semiconductor device according to the present invention includes the steps of: (a) introducing hydrogen and oxygen on a SiC substrate; and (b) subjecting the hydrogen and the oxygen to a combustion reaction on the SiC substrate to form a gate oxide film being a silicon oxide film on a surface of the SiC substrate by the combustion reaction.
    Type: Application
    Filed: September 15, 2010
    Publication date: August 25, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Kazuo KOBAYASHI
  • Publication number: 20110165823
    Abstract: A planarization apparatus and method that thins and planarizes a substrate by grinding and polishing the rear surface of the substrate with high throughput, and that fabricates a semiconductor substrate with reduced adhered contaminants. A planarization apparatus that houses various mechanism elements in semiconductor substrate loading/unloading stage chamber, a rear-surface polishing stage chamber, and a rear-surface grinding stage chamber. The throughput time of the rear-surface polishing stage that simultaneously polishes two substrates is typically about double the throughput time of the rear-surface grinding stage that grinds one substrate.
    Type: Application
    Filed: March 26, 2010
    Publication date: July 7, 2011
    Applicant: OKAMOTO MACHINE TOOL WORKS, LTD.
    Inventors: Satoru IDE, Moriyuki Kashiwa, Kazuo Kobayashi, Noriyuki Motimaru, Eiichi Yamamoto, Tomio Kubo, Hiroaki Kida
  • Patent number: 7972809
    Abstract: This invention is to provide a process for producing a glycoprotein comprising a mammalian type sugar chain, characterized in that the process comprises introducing an ?-1,2-mannosidase gene into a methylotrophic yeast having a mutation of a sugar chain biosynthesizing enzyme gene, so that the ?-1,2-mannosidase gene is expressed under the control of a potent promoter in the yeast; culturing in a medium the methylotrophic yeast cells with a heterologous gene transferred thereinto; and obtaining the glycoprotein comprising a mammalian type sugar chain from the culture. Using the newly created methylotrophic yeast having a sugar chain mutation, a neutral sugar chain identical with a high mannose type sugar chain produced by mammalian cells such as human cells, or a glycoprotein comprising such a neutral sugar chain, can be produced in a large amount at a high purity.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: July 5, 2011
    Assignees: National Institute of Advanced Industrial Science & Technology, Kirin Beer Kabushiki Kaisha
    Inventors: Kazuo Kobayashi, Yoshinori Kitagawa, Toshihiro Komeda, Nagako Kawashima, Yoshifumi Jigami, Yasunori Chiba
  • Publication number: 20110074045
    Abstract: A semiconductor device can be manufactured with a high non-defect ratio, making it possible to easily guarantee the KGD (Known-Good-Die) of semiconductor chips, when configuring one packaged semiconductor device on which a plurality of semiconductor chips is mounted. Utilizing each semiconductor chip is made possible without limits on terminal position, pitch, signal arrangement, and so on. Protrusions provided to a semiconductor chip mounted sealing sub-board are attached to a package substrate. A plurality of semiconductor bare chips is disposed in a space formed between the semiconductor chip mounted sealing sub-board and the package substrate, making wiring possible.
    Type: Application
    Filed: June 30, 2008
    Publication date: March 31, 2011
    Applicant: GENUSION Inc.
    Inventors: Moriyoshi Nakashima, Kazuo Kobayashi, Natsuo Ajika
  • Patent number: 7889488
    Abstract: A lock unit used for an electronic apparatus that includes a foldable and unfoldable housing that has a first surface that is foldable, and a second surface orthogonal to the first surface includes a lock member that locks the housing in a folded state, an operation member that moves the lock member and releases a lock of the housing by the lock member, and a transmission mechanism that transmits a driving force applied to the operation member to the lock member by changing an operating direction of the operation member to another direction, and moves the lock member in the other direction, wherein the operation member is provided on the second surface, and an operating direction of the operation member is a first direction perpendicular to the second surface, the lock member projecting in a second direction orthogonal to the first surface, and a moving direction of the lock member being a third direction orthogonal to the first and second directions.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: February 15, 2011
    Assignee: Fujitsu Limited
    Inventors: Minoru Kumagai, Ikki Tatsukami, Kazuo Kobayashi, Wataru Tanaka, Kaigo Tanaka
  • Patent number: 7882635
    Abstract: A method for producing an ink-jet head includes forming a buffer layer on an upper surface of a vibration plate, and forming a piezoelectric precursor layer on an entire upper surface of a surface layer, the piezoelectric precursor layer being converted into a piezoelectric sheet. The buffer layer is formed of a material with which mutual diffusion between the piezoelectric precursor layer and the buffer layer is hardly caused as compared with mutual diffusion between the piezoelectric precursor layer and the vibration plate with which no buffer layer is provided. A stack, in which the buffer layer and the piezoelectric precursor layer are formed, is heated at a predetermined temperature, and the piezoelectric precursor layer is calcinated to form the piezoelectric sheet. It is possible to suppress the deterioration of the performance of the piezoelectric member.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: February 8, 2011
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Hiroaki Wakayama, Kazuo Kobayashi
  • Publication number: 20110014651
    Abstract: This invention provides a means for high-level secretory production of a protein, and, in particular, a protein having a complicated structure such as an antibody, in a host cell such as a yeast cell. This invention provides a method for high-level secretory production of a foreign protein with the use of a transformed host cell having one or more types of chaperone protein genes and via suppression of O sugar chain inherent to a host cell such as a yeast cell.
    Type: Application
    Filed: October 29, 2008
    Publication date: January 20, 2011
    Applicants: KYOWA HAKKO KIRIN CO., LTD., DAIICHI SANKYO COMPANY, LIMITED
    Inventors: Yasunori Chiba, Yoshifumi Jigami, Yoshie Takahashi, Kosuke Kuroda, Kazuo Kobayashi, Kimihisa Ichikawa, Koichi Nonaka, Takeshi Suzuki, Minako Ono
  • Patent number: 7867638
    Abstract: A magnetic-recording medium which is provided on a nonmagnetic substrate with at least an orientation-controlling layer for controlling the orientation of a layer formed directly thereon, a perpendicularly magnetic layer having an easily magnetizing axis oriented mainly perpendicularly relative to the nonmagnetic substrate, and a protective layer. The perpendicularly magnetic layer includes two or more magnetic layers, at least one of the magnetic layers is a layer having Co as a main component and containing Pt as well and containing an oxide, and at least another of the magnetic layers is a layer having Co as a main component and containing Cr as well and containing no oxide.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: January 11, 2011
    Assignees: Showa Denko K.K., Kabushiki Kaisha Toshiba
    Inventors: Akira Sakawaki, Kenji Shimizu, Kazuo Kobayashi, Hiroshi Sakai, Soichi Oikawa, Takeshi Iwasaki, Tomoyuki Maeda, Futoshi Nakamura
  • Patent number: 7794063
    Abstract: An ink-jet head includes a channel unit which includes a plurality of pressure chambers, a vibration plate stacked on the channel unit, and a piezoelectric material layer arranged on the vibration plate. The piezoelectric material layer includes a first portion functioning as a piezoelectric actuator, and a second portion functioning as a piezoelectric transformer which amplifies a driving signal to be supplied to the piezoelectric actuator. Accordingly, it is possible to realize a small-size ink-jet head with a built-in piezoelectric amplifier.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: September 14, 2010
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Kazuo Kobayashi, Hiroyuki Ishikawa
  • Patent number: 7790806
    Abstract: The present invention relates to a fluorine-containing resin composition for molding comprising a fluorine-containing resin (A) and a hydrofluoric acid scavenger (B), in which the hydrofluoric acid scavenger (B) is organopolysiloxane. According to the present invention, a fluorine-containing resin composition which can reduce an amount of hydrofluoric acid released from a fluorine-containing resin and inhibits corrosiveness can be provided.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: September 7, 2010
    Assignees: Dow Corning Corporation, Dow Corning Toray Co., Ltd., Daikin Industries, Ltd., Daikin America, Inc.
    Inventors: Katsuhide Ohtani, Tsuyoshi Ono, Haruhisa Masuda, Ron Klein, Masakazu Irie, Kazuo Kobayashi, Igor Chorvath, Tatyana Collins, Lauren Tonge
  • Publication number: 20100216952
    Abstract: A silicone rubber powder obtained by curing a condensation-curable silicone rubber composition in a dispersed state in water, having an epoxy equivalent measured by a titration method equal to or lower than 3,000 and an average particle size in the range of 0.1 to 100 ?m; and a method of manufacturing a silicone rubber powder comprising the steps of dispersing in water a silicone rubber composition comprising at least components (A) through (C) listed below; adding component (D); and curing the mixture: (A) a diorganopolysiloxane capped at both molecular terminals with silanol groups and having in one molecule 30 or less silicon atoms; (B) an organopolysiloxane having in one molecule at least two silicon-bonded hydrogen atoms; (C) an epoxy-containing alkoxysilane; and (D) a condensation-reaction catalyst. The silicone rubber powder has low epoxy equivalent and possesses excellent dispersibility in organic resins, and the method is efficient in manufacturing of the aforementioned powder.
    Type: Application
    Filed: August 19, 2008
    Publication date: August 26, 2010
    Inventors: Yoshitsugu Morita, Kazuo Kobayashi, Ken Tanaka
  • Publication number: 20100209707
    Abstract: Cross-linked silicone particles, which have secondary amino groups represented by general formula: R1NH—R2— (where R1 designates an aryl group or an aralkyl group, and R2 designates a bivalent organic group) bonded to silicon atoms that form the cross-linked silicone particles, demonstrate excellent dispersibility in organic resin and, when added to a curable organic resin composition, improve flowability of the aforementioned composition during molding and produce curable bodies with low modules of elasticity.
    Type: Application
    Filed: April 25, 2008
    Publication date: August 19, 2010
    Inventors: Yoshitsugu Morita, Kazuo Kobayashi, Hiroshi Ueki
  • Patent number: 7755741
    Abstract: An illumination apparatus and an exposure apparatus that achieves higher quality exposure to light and higher operating speed even where the ratio Hx/Hy between the transverse dimension Hx and the longitudinal dimension Hy of the plane of optical modulation of a two-dimensional optical space modulator is 1.5 or above, for instance, are to be provided. The focal distance fx in an x-direction and the focal distance fy in a y-direction of a second optical system that guides light emitted from an integrator to a two-dimensional optical space modulator are made different, in a ratio of fx/fy=1.6, for instance. In this way, the number of rod lenses in the integrator can be made equal between transverse and longitudinal directions and the value of Hx/Hy can be made 2.5 by bringing the aspect ratio dx:dy of rod lenses to 1.6:1, close to 1.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: July 13, 2010
    Assignee: Hitachi Via Mechanics, Ltd.
    Inventors: Yoshitada Oshida, Kazuo Kobayashi