Patents by Inventor Kazuo Maeda

Kazuo Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7261497
    Abstract: A throw-away insert includes: an upper and bottom surface; two side surfaces; two end surfaces; a main cutting section formed from a ridge line positioned at the intersection between the side surfaces and the upper surface; a secondary cutting section formed from a ridge line positioned at the intersection between the end surfaces and the upper surface; an axial support surface supported by an insert pocket of a cutter body; and noses formed at the corners of the upper surface. The corner angles of the noses when seen from above are essentially right angles. The axial support surface is formed as a section of the end surface. The secondary cutting section is parallel to the ridge line at the upper end of the axial support surface and the bottom surface. The upper end of the axial support surface is positioned so that it is projected more in the direction of the longitudinal axis of the main cutting section than the ridge line of the upper end.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: August 28, 2007
    Assignee: Sumitomo Electric Hardmetal Corp.
    Inventor: Kazuo Maeda
  • Patent number: 7238629
    Abstract: The present invention relates to a deposition method of a low dielectric constant insulating film, which comprises the steps of generating a first deposition gas containing at least one silicon source selecting from the group consisting of silicon containing organic compound having siloxane bond and silicon containing organic compound having CH3 group, and an oxidizing agent consisting of oxygen containing organic compound having alkoxyl group (OR: O is oxygen and R is CH3 or C2H5), and applying electric power to the first deposition gas to generate plasma and then causing reaction to form a low dielectric constant insulating film on a substrate.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: July 3, 2007
    Assignee: Semiconductor Process Laboratory Co., Ltd.
    Inventors: Yoshimi Shioya, Kazuo Maeda
  • Patent number: 7210750
    Abstract: Vibration or the like is prevented for long-term use by normalizing, with operation continuing, a tread of a crawler belt link through grinding in an early stage where uneven wear such as corrugated wear occurs. With a crawler belt of a crawler vehicle wound, an abrasive plate for grinding the tread of the crawler belt link is disposed to contact the tread. While the crawler vehicle does normal traveling work, the abrasive plate corrects the tread of the crawler belt link for the uneven wear. The vibration of a vehicle body can thus be prevented during travel with no uneven wear produced.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: May 1, 2007
    Assignee: Komatsu Ltd.
    Inventors: Teiji Yamamoto, Kazuo Maeda
  • Publication number: 20070031200
    Abstract: A throw-away insert includes: an upper and bottom surface; two side surfaces; two end surfaces; a main cutting section formed from a ridge line positioned at the intersection between the side surfaces and the upper surface; a secondary cutting section formed from a ridge line positioned at the intersection between the end surfaces and the upper surface; an axial support surface supported by an insert pocket of a cutter body; and noses formed at the comers of the upper surface. The corner angles of the noses when seen from above are essentially right angles. The axial support surface is formed as a section of the end surface. The secondary cutting section is parallel to the ridge line at the upper end of the axial support surface and the bottom surface. The upper end of the axial support surface is positioned so that it is projected more in the direction of the longitudinal axis of the main cutting section than the ridge line of the upper end.
    Type: Application
    Filed: August 4, 2006
    Publication date: February 8, 2007
    Applicant: Sumitomo Electric Hardmetal, Corp.
    Inventor: Kazuo Maeda
  • Publication number: 20070031201
    Abstract: A throw-away insert includes: an upper surface; a bottom surface; two side surfaces formed with upper side surfaces and lower side surfaces; two end surfaces; four nose sections formed at the corners of the upper surface; a main cutting section formed from a ridge line positioned at the intersection between the upper side surface and the upper surface; a secondary cutting section formed from a linear ridge line positioned at the intersection between the end surface and the upper surface; and an axial support surface formed from a section of the end surface. The upper side surface is projected outward more than the lower side surface.
    Type: Application
    Filed: August 7, 2006
    Publication date: February 8, 2007
    Applicant: Sumitomo Electric Hardmetal, Corp.
    Inventor: Kazuo Maeda
  • Publication number: 20060099725
    Abstract: A semiconductor device is manufactured by the steps of generating a film forming gas by setting a flow rate ratio of H2O to any one of a silicon-contained organic compound having a siloxane bond and a silicon-contained organic compound having a CH3 group to 4 or more and adjusting a gas pressure to 1.5 Torr or more, applying a power to the film forming gas to generate a plasma thereof so as to react it, and thus forming a low-dielectric insulating film (62) on a substrate (61), plasmanizing a process gas containing at least any one of He, Ar, H2 or deuterium, and bringing the low-dielectric insulating film (62) into contact with the plasma of the process gas.
    Type: Application
    Filed: October 20, 2003
    Publication date: May 11, 2006
    Inventors: Yoshimi Shioya, Yuhko Nishimoto, Kazuo Maeda
  • Publication number: 20050221622
    Abstract: The present invention relates to a deposition method in which an insulating film that coats wirings mainly made of copper film and has low dielectric constant. Its constitution in the deposition method, where deposition gas is transformed into plasma and reaction is caused to form the insulating film having low dielectric constant, is that the deposition gas has a first silicon containing compound having cyclic siloxane bond and at least one of methyl group and methoxy group, and a second silicon containing organic compound having straight-chain siloxane bond and at least one of methyl group and methoxy group, as primary constituent gas.
    Type: Application
    Filed: March 28, 2005
    Publication date: October 6, 2005
    Inventors: Yoshimi Shioya, Haruo Shimoda, Kazuo Maeda
  • Patent number: 6911405
    Abstract: A process gas consisting of one of N2, N2O or a mixture thereof is converted to a plasma and then a surface of a copper wiring layer is exposed to the plasma of the process gas, whereby a surface portion of the copper wiring layer is reformed and made into a copper diffusion preventing barrier. According to this method, a noble semiconductor device can be provided having increased operational speed and less copper diffusion.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: June 28, 2005
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Yoshimi Shioya, Kouichi Ohira, Kazuo Maeda, Tomomi Suzuki, Youichi Yamamoto, Yuichiro Kotake, Hiroshi Ikakura, Shoji Ohgawara
  • Patent number: 6900144
    Abstract: A film-forming surface reforming method includes the steps of bringing a gas or an aqueous solution containing ammonia, hydrazine, an amine, an amino compound or a derivative thereof into contact with the film-forming surface before an insulating film is formed on the film-forming surface, and bringing a gas or an aqueous solution containing Hydrogen peroxide, ozone, Oxygen, nitric acid, sulfuric acid or a derivative thereof into contact with the film-forming surface.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: May 31, 2005
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Kazuo Maeda, Setsu Suzuki, Takayoshi Azumi, Kiyotaka Sasaki
  • Publication number: 20050040706
    Abstract: Vibration or the like is prevented for long-term use by normalizing, with operation continuing, a tread of a crawler belt link through grinding in an early stage where uneven wear such as corrugated wear occurs. With a crawler belt of a crawler vehicle wound, an abrasive plate for grinding the tread of the crawler belt link is disposed to contact the tread. While the crawler vehicle does normal traveling work, the abrasive plate corrects the tread of the crawler belt link for the uneven wear. The vibration of a vehicle body can thus be prevented during travel with no uneven wear produced.
    Type: Application
    Filed: March 9, 2004
    Publication date: February 24, 2005
    Applicant: KOMATSU LTD.
    Inventors: Teiji Yamamoto, Kazuo Maeda
  • Publication number: 20050040708
    Abstract: In a track with a rotatable bushing which is brought into engagement with a sprocket of a track-type vehicle, it is intended that strength is enhanced rationally by link functionality sharing and by combination of such assigned functional tasks for achieving further improvements in rotatable bushing function. To this end, a track link comprises a combination of an external link and an internal link; a coupler pin hole is provided through the external link; a bushing hole is provided through the internal link, and the thickness dimension of a bushing hole formation part of the internal link is made greater than that of a coupler pin formation part of the external link.
    Type: Application
    Filed: December 5, 2003
    Publication date: February 24, 2005
    Inventors: Teiji Yamamoto, Kazuo Maeda
  • Patent number: 6852651
    Abstract: The present invention relates to a semiconductor device in which an interlayer insulating film having a low dielectric constant is formed by covering wiring primarily made of a copper film, and to a method of manufacturing the same. In manufacturing the semiconductor device an insulating film having a low dielectric constant is formed on a substrate by converting a film-forming gas into a plasma for reaction. The method includes forming a low-pressure insulating film on the substrate by coverting the film-forming gas at a first gas pressure into a plasma and forming a high-pressure insulating film on the low-pressure insulating film by converting the film-forming gas at second gas pressure, higher than the first gas pressure, into a plasma and reaction.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: February 8, 2005
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Yoshimi Shioya, Yuichiro Kotake, Tomomi Suzuki, Hiroshi Ikakura, Kazuo Maeda
  • Publication number: 20050014391
    Abstract: The present invention relates to a deposition method of a low dielectric constant insulating film, which comprises the steps of generating a first deposition gas containing at least one silicon source selecting from the group consisting of silicon containing organic compound having siloxane bond and silicon containing organic compound having CH3 group, and an oxidizing agent consisting of oxygen containing organic compound having alkoxyl group (OR: O is oxygen and R is CH3 or C2H5), and applying electric power to the first deposition gas to generate plasma and then causing reaction to form a low dielectric constant insulating film on a substrate.
    Type: Application
    Filed: June 15, 2004
    Publication date: January 20, 2005
    Inventors: Yoshimi Shioya, Kazuo Maeda
  • Patent number: 6835669
    Abstract: The present invention relates to a film forming method of forming an interlayer insulating film having a low dielectric constant for covering wiring. The insulating film covering wiring is formed on a substrate by converting into a plasma and reacting a film forming gas including a component selected from the group consisting of alkoxy compounds having Si—H bonds and siloxanes having Si—H bonds and an oxygen-containing gas selected from a group consisting of O2, N2O, NO2, CO, CO2, and H2O.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: December 28, 2004
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Taizo Oku, Junichi Aoki, Youichi Yamamoto, Takashi Koromokawa, Kazuo Maeda
  • Patent number: 6815824
    Abstract: The present invention relates to a semiconductor device in which a barrier insulating film is formed to cover a copper film or a wiring consisting mainly of the copper film. The barrier insulating film is a structure of two or more layers including at least a first barrier insulating film containing silicon, oxygen, nitrogen and hydrogen or silicon, oxygen, nitrogen, hydrogen and carbon, and a second barrier insulating film containing silicon, oxygen and hydrogen or silicon, oxygen, hydrogen and carbon.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: November 9, 2004
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co. Ld.
    Inventors: Yoshimi Shioya, Yuhko Nishimoto, Kazuo Maeda, Tomomi Suzuki, Hiroshi Ikakura
  • Patent number: 6780790
    Abstract: A semiconductor device having a barrier insulating film covering a copper wiring is formed by a plasma enhanced CVD method. The method includes supplying high frequency power of a frequency of 1 MHz or more to a first electrode, and holding a substrate on which copper wiring is formed on a second electrode facing the first electrode; supplying a film forming gas containing an alkyl compound and an oxygen-containing gas between the first and second electrodes while regulating gas pressure of the film forming gas to 1 Torr or less; and supplying high frequency power to either of the first and second electrodes to convert the film forming gas into a plasma, and allowing the alkyl compound and the oxygen-containing gas of the film forming gas to react to form a barrier insulating film covering the surface of the substrate.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: August 24, 2004
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Yoshimi Shioya, Yuhko Nishimoto, Tomomi Suzuki, Kazuo Maeda
  • Patent number: 6750137
    Abstract: A method for forming an interlayer insulating film includes the steps of forming an underlying insulating film on a substrate; forming a film containing B (boron), C (carbon) and H2O) on the underlying insulating film by plasma enhanced chemical vapor deposition using a source gas containing an Si—C—O—H compound, an oxidative gas and a compound containing B (boron); releasing C (carbon) and H2O in the film from the film by annealing the film, and thereby forming a porous SiO2 film containing B (boron); and subjecting to the porous SiO2 film containing B (boron) to H (hydrogen) plasma treatment, and then forming a cover insulating film.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: June 15, 2004
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventor: Kazuo Maeda
  • Patent number: 6713383
    Abstract: A surface of a copper (Cu) wiring layer formed over a semiconductor substrate is exposed to a plasma gas selected from the group consisting of an ammonia gas, a mixed gas of nitrogen and hydrogen, a CF4 gas, a C2F6 gas and a NF3 gas. The surface of the copper (Cu) wiring layer is then exposed to an atmosphere or a plasma of a gas selected from the group consisting of an ammonia gas, an ethylenediamine gas, a fÀ-diketone gas, a mixed gas consisting of the ammonia gas and a hydrocarbon gas (CxHy), and a mixed gas consisting of a nitrogen gas and the hydrocarbon gas (CxHy), and a Cu diffusion preventing insulating film is formed on the copper (Cu) wiring layer.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: March 30, 2004
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Yoshimi Shioya, Yuhko Nishimoto, Tomomi Suzuki, Shoji Ohgawara, Kazuo Maeda
  • Publication number: 20040057684
    Abstract: The present invention relates to an optical waveguide constituting an optical integrated circuit and a method of manufacturing the same. In a method of manufacturing an optical waveguide having a core layer 22a, 22b, 23b and a cladding layer 23a, 24 for covering the core layer 22a, 22b, 23b, a silicon nitride film serving as the core layer 22a, 22b, 23b is formed by plasmanizing a gas mixture containing methylsilane and at least any one of nitrogen (N2) or ammonia (NH3) to react.
    Type: Application
    Filed: August 28, 2003
    Publication date: March 25, 2004
    Applicant: Yasuo KOKUBUN and SEMICONDUCTOR PROCESS LABORATORY CO., LTD.
    Inventors: Yasuo Kokubun, Yoshimi Shioya, Kazuo Maeda
  • Patent number: 6685525
    Abstract: A method for manufacturing an inexpensive lamp, which suppresses distortion of a bulb and prevents decrease in commercial value and breakage of the bulb. In a glass bulb having one end thereof communicating with an exhaust tube, an assembly of a filament, metal foils and lead wires is disposed. In this state, the whole glass bulb is heated by a burner. The end opposite to the exhaust tube of the glass bulb is pinch-sealed to form a pinch-sealed portion. Subsequently, an expanded portion is formed by charging a protective gas from the exhaust tube into the glass bulb.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: February 3, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kazuo Maeda