Patents by Inventor Kazuo Otsuga

Kazuo Otsuga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060039195
    Abstract: Suppressing a leakage current is required in a flash memory because the channel length is made shorter with a reduction in the memory cell size. In an AND type memory array having an assist electrode, although the memory cell area has been reduced by the field isolation using a MOS transistor, leakage current in the channel direction becomes greater with a reduction in the memory cell size, resulting in problems arising like deterioration of programming characteristics, an increase in the current consumption, and reading failure. To achieve the objective, in the present invention, electrical isolation is performed by controlling at least one assist electrode of the assist electrodes wired in parallel to be a negative voltage during program and read operations and by making the semiconductor substrate surface in the vicinity of the aforementioned assist electrode non-conductive.
    Type: Application
    Filed: August 5, 2005
    Publication date: February 23, 2006
    Inventors: Hideaki Kurata, Kazuo Otsuga, Yoshitaka Sasago, Takashi Kobayashi, Tsuyoshi Arigane
  • Publication number: 20050127429
    Abstract: A low cost semiconductor nonvolatile memory device capable of high speed programming, using an inversion layer as the wiring, and a manufacturing method for that device. The semiconductor memory device includes an auxiliary electrode at a position between and in parallel with the source and drain regions and with no position overlap versus the source region and the drain region formed mutually in parallel; wherein the auxiliary electrode for hot electron source injection is utilized as the auxiliary electrode for programming (writing); and an inversion layer formed below the auxiliary electrode is utilized as the source region or as the drain region during the read operation.
    Type: Application
    Filed: November 30, 2004
    Publication date: June 16, 2005
    Inventors: Kazuo Otsuga, Hideaki Kurata, Yoshitaka Sasago