Patents by Inventor Kazuo Tamaki
Kazuo Tamaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20140159076Abstract: Improves light extraction efficiency. A light emitting device 1 using a white resin molding package 5 integrally molded with lead frames 3, 4 constituting an electrode corresponding to one or a plurality of light emitting element 2 and white resin, wherein an area in a plane view of a white resin surface on a reflective surface that is level with amounting surface of the light emitting element 2 is configured to be larger than total area in a plane view occupied by surfaces of the lead frames 3, 4 and the light emitting element. Further, a step section is formed on the surfaces of lead frames 3, 4, white resin is filled in the step section, and the area of white resin surface on a reflective surface where the light emitting element 2 is mounted is increased.Type: ApplicationFiled: May 31, 2012Publication date: June 12, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Yoshiki Sota, Masayuki Ohta, Kazuo Tamaki, Shinji Yamaguchi, Shin Itoh, Tomoshi Kimura, Masaki Tatsumi
-
Patent number: 8749263Abstract: A semiconductor apparatus according to the present invention with a semiconductor element implemented on an insulated substrate comprises: a substrate front surface electrode formed on a front surface side of the insulated substrate and connected with an element electrode of the semiconductor element; a substrate back surface electrode formed on a back surface side of the insulated substrate and electrically connected with the substrate front surface electrode; and a plurality of connection electrodes, extending in a thickness direction of the insulated substrate from one side to the other side of a front surface and a back surface thereof, for electrically connecting the substrate front surface electrode with the substrate back surface electrode, where the substrate front surface electrode or the substrate back surface electrode is formed to have a plane pattern separated for each of the plurality of connection electrodes.Type: GrantFiled: August 30, 2011Date of Patent: June 10, 2014Assignee: Sharp Kabushiki KaishaInventors: Masayuki Ohta, Masaki Tatsumi, Yoshiki Sota, Kazuo Tamaki, Shinji Yamaguchi, Masamichi Harada, Shin Ito, Tomoshi Kimura, Yoshifumi Inada
-
Patent number: 8736160Abstract: A light-emitting apparatus including: a substrate; an LED chip mounted on a first surface of the substrate; a fluorescent material-containing layer containing a first fluorescent material, which fluorescent material-containing layer is provided above the first surface of the substrate so as to cover the LED chip; and a color-adjusting fluorescent layer that contains a second fluorescent material, which color-adjusting fluorescent material layer is formed in a layer provided on an outer side of the fluorescent material-containing layer in an emission direction, the color-adjusting fluorescent layer being formed in dots. Thus, the present invention provides a light-emitting apparatus and a method for manufacturing the same, each making it possible to carry out fine color adjustment so as to prevent a subtle color shift that occurs due to a factor such as a difference in concentration of a fluorescent material or the like.Type: GrantFiled: February 16, 2010Date of Patent: May 27, 2014Assignee: Sharp Kabushiki KaishaInventors: Kazuo Tamaki, Tohru Ohnishi, Toshio Hata
-
Publication number: 20120049882Abstract: A semiconductor apparatus according to the present invention with a semiconductor element implemented on an insulated substrate comprises: a substrate front surface electrode formed on a front surface side of the insulated substrate and connected with an element electrode of the semiconductor element; a substrate back surface electrode formed on a back surface side of the insulated substrate and electrically connected with the substrate front surface electrode; and a plurality of connection electrodes, extending in a thickness direction of the insulated substrate from one side to the other side of a front surface and a back surface thereof, for electrically connecting the substrate front surface electrode with the substrate back surface electrode, where the substrate front surface electrode or the substrate back surface electrode is formed to have a plane pattern separated for each of the plurality of connection electrodes.Type: ApplicationFiled: August 30, 2011Publication date: March 1, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Masayuki OHTA, Masaki Tatsumi, Yoshiki Sota, Kazuo Tamaki, Shinji Yamaguchi, Masamichi Harada, Shin Ito, Tomoshi Kimura, Yoshifumi Inada
-
Patent number: 8018048Abstract: The semiconductor device includes a plurality of semiconductor chips, and a circuit substrate having a substantially rectangular outer shape. The semiconductor device is an MCM having an MCM packaging structure in which the plurality of semiconductor chips are juxtaposed on the semiconductor chip mounting surface of the circuit substrate, and the semiconductor chip mounting surface is covered by a sealing resin along an outer edge of the circuit substrate so that the plurality of semiconductor chips are sealed.Type: GrantFiled: March 18, 2008Date of Patent: September 13, 2011Assignee: Sharp Kabushiki KaishaInventor: Kazuo Tamaki
-
Publication number: 20100207521Abstract: A light-emitting apparatus including: a substrate; an LED chip mounted on a first surface of the substrate; a fluorescent material-containing layer containing a first fluorescent material, which fluorescent material-containing layer is provided above the first surface of the substrate so as to cover the LED chip; and a color-adjusting fluorescent layer that contains a second fluorescent material, which color-adjusting fluorescent material layer is formed in a layer provided on an outer side of the fluorescent material-containing layer in an emission direction, the color-adjusting fluorescent layer being formed in dots. Thus, the present invention provides a light-emitting apparatus and a method for manufacturing the same, each making it possible to carry out fine color adjustment so as to prevent a subtle color shift that occurs due to a factor such as a difference in concentration of a fluorescent material or the like.Type: ApplicationFiled: February 16, 2010Publication date: August 19, 2010Inventors: Kazuo TAMAKI, Tohru Ohnishi, Toshio Hata
-
Patent number: 7741725Abstract: With a semiconductor apparatus package of example embodiments of the technology disclosed herein and a method of producing the semiconductor apparatus package, the semiconductor apparatus package includes a circuit board and a semiconductor device sealed with sealing resin. The circuit board has a groove in a section of a surface of the circuit board. The section is outside of the resin sealing section, and the surface includes the resin sealing section. The groove is at least partially filled with sealing resin having seeped from a resin sealing section. Thus, in the semiconductor apparatus package including the circuit board, which is exposed from the resin sealing section, and the semiconductor device sealed on the circuit board with the sealing resin, the spread of a thin resin film onto that exposed circuit board resulting from seepage of resin sealing the semiconductor device is prevented.Type: GrantFiled: September 12, 2007Date of Patent: June 22, 2010Assignee: Sharp Kabushiki KaishaInventor: Kazuo Tamaki
-
Patent number: 7683484Abstract: A bump structure includes a squashed ball provided on an electrode pad, and a wire provided on the squashed ball. The wire is a wire loop that is loop-shaped and is formed so as to protrude from an end part of the squashed ball. This provides high bonding reliability between a bonding pad and the bump structure.Type: GrantFiled: April 24, 2007Date of Patent: March 23, 2010Assignee: Sharp Kabushiki KaishaInventors: Yuji Yano, Kazuo Tamaki
-
Publication number: 20080237838Abstract: The semiconductor device includes a plurality of semiconductor chips, and a circuit substrate having a substantially rectangular outer shape. The semiconductor device is an MCM having an MCM packaging structure in which the plurality of semiconductor chips are juxtaposed on the semiconductor chip mounting surface of the circuit substrate, and the semiconductor chip mounting surface is covered by a sealing resin along an outer edge of the circuit substrate so that the plurality of semiconductor chips are sealed.Type: ApplicationFiled: March 18, 2008Publication date: October 2, 2008Applicant: SHARP KABUSHIKI KAISHAInventor: Kazuo Tamaki
-
Publication number: 20080067699Abstract: With a semiconductor apparatus package of the present invention and a method of producing the semiconductor apparatus package, the semiconductor apparatus package includes a circuit board and a semiconductor device sealed with sealing resin. The circuit board has a groove in a section of a surface of the circuit board. The section is outside of the resin sealing section, and the surface includes the resin sealing section. The groove is at least partially filled with sealing resin having seeped from a resin sealing section. Thus, in the semiconductor apparatus package including the circuit board, which is exposed from the resin sealing section, and the semiconductor device sealed on the circuit board with the sealing resin, the spread of a thin resin film onto that exposed circuit board resulting from seepage of resin sealing the semiconductor device is prevented.Type: ApplicationFiled: September 12, 2007Publication date: March 20, 2008Inventor: Kazuo Tamaki
-
Patent number: 7327041Abstract: A semiconductor package includes: a semiconductor chip having circuits formed on a surface, and having a thickness of 0.5 ?m or more and 100 ?m or less; and an adhesive resin layer provided so as to cover the surface of the semiconductor chip on which the circuits are provided.Type: GrantFiled: May 28, 2002Date of Patent: February 5, 2008Assignee: Sharp Kabushiki KaishaInventors: Yoshihisa Dotta, Kazuo Tamaki
-
Publication number: 20070252272Abstract: A bump structure includes a squashed ball provided on an electrode pad, and a wire provided on the squashed ball. The wire is a wire loop that is loop-shaped and is formed so as to protrude from an end part of the squashed ball. This provides high bonding reliability between a bonding pad and the bump structure.Type: ApplicationFiled: April 24, 2007Publication date: November 1, 2007Applicant: SHARP KABUSHIKI KAISHAInventors: Yuji Yano, Kazuo Tamaki
-
Patent number: 7239164Abstract: A stack type semiconductor apparatus package includes: (i) a first circuit substrate, (ii) a semiconductor apparatus package mounted on the first circuit substrate, (iii) a semiconductor apparatus, and (iv) a sealing resin for covering them. The first circuit substrate has a surface on which first connecting pads and second connecting pads are provided. The first connecting pads are connected to first external input/output terminals of the semiconductor apparatus package, and the second connecting pads are connected to electrodes of the first semiconductor apparatus, respectively. On a rear surface of the first circuit substrate, there are provided second external input/output terminals connected to the first connecting pads and the second connecting pads. The semiconductor apparatus package includes: a second circuit substrate, and a second semiconductor apparatus mounted on the second circuit substrate.Type: GrantFiled: August 1, 2005Date of Patent: July 3, 2007Assignee: Sharp Kabushiki KaishaInventor: Kazuo Tamaki
-
Publication number: 20070035036Abstract: The semiconductor device according to the present invention includes a semiconductor chip and a wiring substrate on which a wiring pattern is formed. The wiring pattern includes wire bond terminals being electrically connected, via wires, with pads provided on the semiconductor chip. The wire bond terminals are disposed in a plurality of columns so as to face the pads. When the columns are regarded as the first column to the third column so that the first column is the closest to the pads, the ratio of a pitch between the wire bond terminals belonging to the first column, a pitch between the wire bond terminals belonging to the second column, and a pitch between the wire bond terminals belonging to the third column is 1:2:2. This allows for efficient wiring between the wire bond terminals in a case where wiring with electrolytic plating is impossible. As a result, it is possible to provide a wiring substrate with stable qualities at lower cost.Type: ApplicationFiled: August 9, 2006Publication date: February 15, 2007Applicant: SHARP KABUSHIKI KAISHAInventors: Yoshiki Sota, Kazuo Tamaki
-
Publication number: 20060027841Abstract: A stack type semiconductor apparatus package includes: (i) a first circuit substrate, (ii) a semiconductor apparatus package mounted on the first circuit substrate, (iii) a semiconductor apparatus, and (iv) a sealing resin for covering them. The first circuit substrate has a surface on which first connecting pads and second connecting pads are provided. The first connecting pads are connected to first external input/output terminals of the semiconductor apparatus package, and the second connecting pads are connected to electrodes of the first semiconductor apparatus, respectively. On a rear surface of the first circuit substrate, there are provided second external input/output terminals connected to the first connecting pads and the second connecting pads. The semiconductor apparatus package includes: a second circuit substrate, and a second semiconductor apparatus mounted on the second circuit substrate.Type: ApplicationFiled: August 1, 2005Publication date: February 9, 2006Applicant: Sharp Kabushiki KaishaInventor: Kazuo Tamaki
-
Patent number: 6847121Abstract: A semiconductor device includes, a circuit constituting section having a function circuit and an externally-drawing electrode, connected to the function circuit, on a surface of the circuit constituting section. An insulating layer is provided on a side of a rear surface of the circuit constituting section. The insulating layer has a face opposite to the circuit constituting section, which has an area that is larger than an area of the rear surface of the circuit constituting section.Type: GrantFiled: August 20, 2002Date of Patent: January 25, 2005Assignee: Sharp Kabushiki KaishaInventors: Yoshihisa Dotta, Kazuo Tamaki
-
Publication number: 20030124769Abstract: A semiconductor device includes: a circuit constituting section having (a) a function circuit and (b) an externally-drawing electrode, connected to the function circuit, on a surface of the circuit constituting section; and an insulating layer provided on a side of a rear surface of the circuit constituting section, wherein the insulating layer has a face opposite to the circuit constituting section, and an area of the face is set so as to be larger than an area of the rear surface of the circuit constituting section. Thus, it is possible to clear such problems that an adhesive that has overflowed from a space between the semiconductor device and the circuit substrate adheres to a bonding collet when flip chip bonding is performed.Type: ApplicationFiled: August 20, 2002Publication date: July 3, 2003Inventors: Yoshihisa Dotta, Kazuo Tamaki
-
Patent number: 6518090Abstract: A semiconductor device includes a circuit board on which a semiconductor chip is mounted via an adhesive resin layer and through which a moisture drain hole is formed. A pit part having a width wider than a diameter of the moisture drain hole is formed in a part of the adhesive resin layer exposed in the moisture drain hole. On this account, the semiconductor device can properly drain moisture to the outside when the semiconductor device is mounted on another packaging substrate by reflowing.Type: GrantFiled: December 4, 2001Date of Patent: February 11, 2003Assignee: Sharp Kabushiki KaishaInventors: Yoshihisa Dotta, Kazuo Tamaki, Yasuyuki Saza
-
Publication number: 20020197771Abstract: A semiconductor package includes: a semiconductor chip having circuits formed on a surface, and having a thickness of 0.5 &mgr;m or more and 100 &mgr;m or less; and an adhesive resin layer provided so as to cover the surface of the semiconductor chip on which the circuits are provided.Type: ApplicationFiled: May 28, 2002Publication date: December 26, 2002Inventors: Yoshihisa Dotta, Kazuo Tamaki
-
Publication number: 20020076858Abstract: A semiconductor device includes a circuit board on which a semiconductor chip is mounted via an adhesive resin layer and through which a moisture drain hole is formed. A pit part having a width wider than a diameter of the moisture drain hole is formed in a part of the adhesive resin layer exposed in the moisture drain hole. On this account, the semiconductor device can properly drain moisture to the outside when the semiconductor device is mounted on another packaging substrate by reflowing.Type: ApplicationFiled: December 4, 2001Publication date: June 20, 2002Inventors: Yoshihisa Dotta, Kazuo Tamaki, Yasuyuki Saza