Patents by Inventor Kazuo Yamakido

Kazuo Yamakido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4591827
    Abstract: Disclosed is a PCM coder-decoder having a construction such that a digital filter contained originally in the PCM coder-decoder is utilized on the time division basis in order to fold back a digital reception signal to a digital signal transmission side and thus to accomplish interruption, communication exchange between three parties, gain control, fold-over test of the PCM signal, and so forth, in addition to the coding and decoding functions inherent to the PCM coder-decoder.
    Type: Grant
    Filed: February 15, 1985
    Date of Patent: May 27, 1986
    Assignees: Hitachi, Ltd., Hitachi Micro Computer Engineering Ltd.
    Inventors: Shigeo Nishita, Kazuo Yamakido, Kenichi Ohwada
  • Patent number: 4507792
    Abstract: In a PCM encoder, in order to reduce noise in an idle channel or in the absence of any voice signal, a detector circuit is provided which detects the idle channel, and a circuit is connected to the detector circuit which fixes the polarity bit of the PCM signal produced by the PCM encoder when the detector circuit has detected the idle channel.
    Type: Grant
    Filed: March 18, 1983
    Date of Patent: March 26, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Yamakido, Shiro Hagiwara, Fumiaki Fujii
  • Patent number: 4369433
    Abstract: A PCM encoder for converting a voice signal into a eight-bit code by approximating the .mu.-low characteristic where .mu.=255 with 15 segments comprises a capacitor array circuit including eight capacitors for determining lowermost voltages of the segments, a resistor string circuit for producing step voltage in each of the segments, a comparator circuit for comparing the output voltage of the capacitor array circuit with a reference voltage, and a successive approximation register circuit for controlling switch groups provided in the capacitor array circuit and the resistor string circuit. The resistor string circuit is provided with taps for deriving voltages corresponding to (2n-1)/33 (where n=1-16) of a voltage applied across the resistor string. A PCM encoder which conforms to the .mu.-low with high fidelity and is capable of quantizing mid-tread at the first segment is disclosed.
    Type: Grant
    Filed: September 10, 1980
    Date of Patent: January 18, 1983
    Assignee: Hitachi, Ltd.
    Inventor: Kazuo Yamakido
  • Patent number: 4366439
    Abstract: A PCM decoder for converting to an analog voice signal an 8-bit PCM signal the first bit of which is a polarity specifying bit, the PCM decoder comprising a capacitor array having binary-weighted capacitors and a resistor string circuit having plural resistors for dividing a reference voltage to obtain different tap voltages, wherein the tap voltages corresponding to the four lower bits of the PCM signal are derived from the resistor string circuit and the combination of the reference voltage and each of the tap voltages, made according to the contents of the second, third and fourth bits of the PCM signal is applied to the corresponding one of the capacitors in the capacitor array circuit whereby the capacitor array circuit delivers an analog voltage signal corresponding to the received signal, the resistor string circuit having two groups of intermediate taps so that the conversion characteristic for obtaining voltages in the signalling frame may be different from that in the non-signalling frame.
    Type: Grant
    Filed: September 10, 1980
    Date of Patent: December 28, 1982
    Assignee: Hitachi, Ltd.
    Inventor: Kazuo Yamakido
  • Patent number: 4338656
    Abstract: In a reference voltage generation circuit consisting of a capacitor, a reference voltage source for generating a predetermined voltage for charging the capacitor and a voltage polarity switching circuit for selectively inverting or not inverting the charged voltage of the capacitor to produce an output voltage at an output terminal, and capable of being fabricated in a semiconductor integrated circuit, the improvement wherein the voltage polarity switching circuit includes a second capacitor for compensating for an error between positive and negative reference voltages due to the stray capacitors.
    Type: Grant
    Filed: July 2, 1980
    Date of Patent: July 6, 1982
    Assignee: Hitachi, Ltd.
    Inventor: Kazuo Yamakido
  • Patent number: 4250492
    Abstract: A non-uniform weighting circuitry which is effective for enhancing speed and accuracy in the operations of encoders and decoders comprises in a cascade connection a constant current switch, a variable attenuator, a polarity changing circuit and a uniform weighting circuit. An impedance converting means is provided to make at least one of input and output terminals of the variable attenuator to be of low impedance, whereby spike-like noises generated by a switching element constituting a part of the variable attenuator is reduced.
    Type: Grant
    Filed: October 7, 1977
    Date of Patent: February 10, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Yamakido, Nobuo Tsukamoto