Abstract: A variable length code decoding device for decoding variable length code data, including: a table memory that stores a plurality of decoding process tables having a reference relationship therein; and a decoding control unit that is given a start address and an initial reference bit length of the table memory; and sequentially selects the decoding process tables according to the decoded data to control a process of decoding the variable length code data, wherein when referring to the decoding process table to perform an initial decoding of the variable length code data, the initial decoding process is conducted by a longer bit length to be clipped from the variable length code data for referring to the decoding process table than the bit length used when referring to the other portions of the decoding process table.

Abstract: The variable length decoder has a memory device including a plurality of lookup tables, and sequentially decodes codewords of variable-length codes using the memory device. The decoded values corresponding to the codewords and control information pieces are stored in the lookup tables. In decoding one codeword, one lookup table is selected from among the plurality of lookup tables. In the decode, one decoded value corresponding to the one codeword, and a control information piece for selecting a next lookup table depending on the decoded value and used for a next decode are produced from the selected lookup table in response to the one codeword in parallel.

Abstract: A variable length code decoding device for decoding variable length code data, including: a table memory that stores a plurality of decoding process tables having a reference relationship therein; and a decoding control unit that is given a start address and an initial reference bit length of the table memory; and sequentially selects the decoding process tables according to the decoded data to control a process of decoding the variable length code data, wherein when referring to the decoding process table to perform an initial decoding of the variable length code data, the initial decoding process is conducted by a longer bit length to be clipped from the variable length code data for referring to the decoding process table than the bit length used when referring to the other portions of the decoding process table.

Abstract: The present invention provides a stream processing apparatus capable of improving the processing performance in the case of continuously processing a plurality of data streams. A control stream, different from a data stream, is prepared, and a program and a parameter are updated in advance in accordance with the control stream. Double buffer areas are prepared in a memory of the stream processing apparatus into which the program and the parameter are stored. The location of the data stream to be input is written in the control stream, and buffers for reading the data stream are multiplexed so as to read in advance the top portion of the data stream to be processed next.

Abstract: A flag indicating whether a decoding process is completed or continued is disposed in each of entries of a decoding process table. A decoded value and a significant bit length are recorded in the entry of a decoding process completion. Information for identifying the decoding process table which is used in a subsequent process, and a bit length that is clipped from a code word which is used when referring to a subsequent table are recorded in the entry of the decoding process continuation. When the decoding process starts, the information for identifying the table to be used and the bit length that is referred to from the code word when referring to the table are designated together with the code word. The decoding process table reference is repeated as the occasion demands. With the above configuration, there is provided a variable length code decoding device.

Abstract: When an error is detected in an error detecting unit in a processor system, the error detecting unit outputs an error signal to an interrupt control unit, and the interrupt control unit outputs a value of an error address register and a control signal to a program counter control unit and rewrites a value of a program counter to a value of an error address register. By this means, the branching process by an error interrupt is realized. In this case, when the error is detected, the process of saving the value of the program counter at the time of error occurrence is not performed, and a specific save register and a control circuit for the recovery to the address at the time of the error occurrence after the end of the error processing are not provided.

Abstract: An image decoding device according to the present invention is an image decoding device responding to decoding of an image encoding method selecting an encoding table and an encoding format to use according to the kind of a parameter included in encoded data and comprises a bit stream processing unit converting a bit stream of the encoded data into an intermediate format and an image processing unit decoding data converted into the intermediate format and converting the same into image data. The bit stream processing unit and the image processing unit start independently. An image encoding device according to the present invention, in the same manner, comprises an image processing unit converting image data to be encoded into an intermediate format and a bit stream processing unit encoding the data converted into the intermediate format and converting the same into a bit stream. Thereby, image encoding and decoding processings with a low operation frequency and low power consumption is realized.

Abstract: A flag indicating whether a decoding process is completed or continued is disposed in each of entries of a decoding process table. A decoded value and a significant bit length are recorded in the entry of a decoding process completion. Information for identifying the decoding process table which is used in a subsequent process, and a bit length that is clipped from a code word which is used when referring to a subsequent table are recorded in the entry of the decoding process continuation. When the decoding process starts, the information for identifying the table to be used and the bit length that is referred to from the code word when referring to the table are designated together with the code word. The decoding process table reference is repeated as the occasion demands. With the above configuration, there is provided a variable length code decoding device.