Patents by Inventor Kazushige Sato

Kazushige Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200058599
    Abstract: A circuit module (101) includes a circuit board (1) having a main surface (1u), an electronic component (3) mounted on the main surface (1u), and a sealing resin (4) covering at least part of the electronic component (3) on the main surface (1u). A recess (7) is formed on at least part of a side surface (11) of the sealing resin (4). At least the recess (7) is covered with an electrically conductive film (6).
    Type: Application
    Filed: October 24, 2019
    Publication date: February 20, 2020
    Inventors: Takahiro OKADA, Kazushige SATO, Takafumi KANNO, Nobumitsu AMACHI
  • Publication number: 20200031142
    Abstract: A compact ink drying apparatus is capable of drying ink ejected to a resin substrate. The ink drying apparatus has a hot air dryer, a hot air supplying part, and an exhausting part. The hot air dryer has a drying furnace, a substrate conveying path formed as a spirally shaped path in the drying furnace, and substrate drying ducts blowing hot air to a surface of a resin substrate on which ink is ejected conveyed along the substrate conveying path to heat ink and exhausting water vapor generated by heating of ink. The hot air supplying part is outside the drying furnace and supplies hot air into the substrate drying ducts, and the exhausting part is outside the drying furnace and exhausts air in the drying furnace through the substrate drying ducts.
    Type: Application
    Filed: May 29, 2019
    Publication date: January 30, 2020
    Applicant: MIYAKOSHI PRINTING MACHINERY CO., LTD.
    Inventors: Hideo IZAWA, Koichi OYAMA, Kazushige SATO, Hidetoshi KON, Yuuichi YAMAZAKI, Ayumu SASAKI
  • Publication number: 20200031139
    Abstract: To provide a drying device which can dry a printed object, and is also capable of sufficiently suppressing curling of the printed object itself or wrinkles and cockling from occurring in the printed object, and an ink-jet printing device equipped with such a drying device.
    Type: Application
    Filed: October 29, 2018
    Publication date: January 30, 2020
    Inventors: Hideo IZAWA, Kouichi OOYAMA, Kazushige SATO, Hidetoshi KON
  • Publication number: 20200031140
    Abstract: To provide a heating drum which even when heated at a high temperature, is capable of suppressing the limb part from being deviated relative to the main body part, and an ink-jet printing device equipped with such a heating drum.
    Type: Application
    Filed: November 30, 2018
    Publication date: January 30, 2020
    Inventors: Hideo IZAWA, Kouichi OOYAMA, Kazushige SATO, Hidetoshi KON
  • Patent number: 10518558
    Abstract: A drying device H is provided with: a heating roller part 10 that guides a printed object X and is capable of heating the rear surface of the printed object X; a hot air blowing part 11 for blowing hot air to the printed surface of the printed object X; a chamber 15 in which the heating roller part 10 and the hot air blowing part 11 are housed; a first plate frame 1 and a second plate frame 2 that are installed on two sides of the chamber 15; a supply-use air blower D1 for supplying air to the hot air blowing part 11; an exhaust-use air blower D2 for exhausting air inside the chamber 15; and a stage 5 on which the supply-use air blower D1 and the exhaust-use air blower D2 are mounted.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: December 31, 2019
    Assignee: MIYAKOSHI PRINTING MACHINERY CO., LTD.
    Inventors: Hideo Izawa, Kouichi Ooyama, Kazushige Sato, Hidetoshi Kon
  • Publication number: 20190364660
    Abstract: A circuit module (100) includes a substrate (1), on one principal surface of which a first wiring pattern (2) is provided, first electronic components (3-6) constituting a first electronic circuit together with the first wiring pattern (2), a plurality of connection conductors (8), a plurality of external connection terminals, a first resin layer (9), and a second resin layer (12). At least one of the plurality of connection conductors (8) includes a first columnar conductor (8a) extending in a normal line direction of the one principal surface of the substrate (1), and a plate-like conductor (8b) extending in a direction parallel to the one principal surface of the substrate (1). At least one of the plurality of external connection terminals is a second columnar conductor (11) extending in the normal line direction of the one principal surface of the substrate (1).
    Type: Application
    Filed: August 12, 2019
    Publication date: November 28, 2019
    Inventors: Kazushige SATO, Jun KASHIRAJIMA, Yuya ESHITA, Nobumitsu AMACHI
  • Publication number: 20190318973
    Abstract: A circuit module (101) includes a substrate (1) having a principal surface (1a), a first component (6) mounted on the principal surface (1a), and a sealing resin portion (3) that covers at least a side surface of the first component (6) while covering the principal surface (1a). The first component (6) includes an empty portion (6c) and a connection portion (6b) exposed to the empty portion (6c). The sealing resin portion (3) is arranged to avoid at least a part of a region that is included in an upper surface of the first component (6) and corresponds to the empty portion (6c).
    Type: Application
    Filed: June 27, 2019
    Publication date: October 17, 2019
    Inventors: Ken OKADA, Kazushige SATO, Shingo FUNAKAWA, Katsuhiko FUJIKAWA, Nobumitsu AMACHI
  • Publication number: 20190318974
    Abstract: A circuit module (301) includes a first substrate (201), a first module (101), a sealing resin portion (3), and a conductive material film (7). The first substrate (201) has a first principal surface (201a). The first module (101) is mounted on the first principal surface (201a). The sealing resin portion (3) is formed on the first principal surface (201a) and covers the first module (101). The conductive material film (7) covers a side of the sealing resin portion (3). The first module (101) includes a conductive material portion and a device which may produce heat and which is mounted on the conductive material portion. The conductive material portion connects with the conductive material film (7) on the side of the sealing resin portion (3).
    Type: Application
    Filed: June 25, 2019
    Publication date: October 17, 2019
    Inventors: Katsuhiko FUJIKAWA, Shingo FUNAKAWA, Kazushige SATO, Nobumitsu AMACHI
  • Publication number: 20190229027
    Abstract: A circuit module includes: a substrate including a wiring pattern; a first region in which a first electronic component is mounted on one major surface of the substrate; a second region in which a second electronic component, which is taller than the first electronic component, is mainly mounted on the one major surface of the substrate; a first conductor provided in the first region and electrically connected with the wiring pattern; and sealing resin that seals the first electronic component, the second electronic component, and the first conductor. Sealing resin sealing the first region is formed to be shorter than sealing resin sealing the second region, part of the first conductor is exposed on a surface of the sealing resin, wiring is formed on the surface of the sealing resin, and the first conductor the part of which is exposed is electrically connected with the wiring.
    Type: Application
    Filed: April 3, 2019
    Publication date: July 25, 2019
    Inventors: Kaneo NOMIYAMA, Kazushige SATO, Yuya ESHITA, Nobumitsu AMACHI
  • Publication number: 20190215993
    Abstract: A high-frequency component includes a wiring substrate, a component mounted on an upper surface of the wiring substrate, a columnar member formed of a conductive resin and standing on the upper surface of the wiring substrate in a state of a lower end portion of the columnar member being fixed to the upper surface of the wiring substrate, and a shield case covering the component and the columnar member. The shield case has a lid plate disposed so as to face the upper surface of the wiring substrate and a side plate extending from an edge of the lid plate toward the upper surface of the wiring substrate, and an upper end portion of the columnar member is fixed to each of four corner portions of the lid plate, when viewed in a direction perpendicular to the upper surface of the wiring substrate.
    Type: Application
    Filed: March 12, 2019
    Publication date: July 11, 2019
    Inventors: Yoshikazu YAGI, Kazushige SATO, Akihiro HARA, Noboru MORIOKA, Nobumitsu AMACHI
  • Publication number: 20180293347
    Abstract: An intake designing method includes: setting a value of a design parameter related to a design target that is directed to a front fuselage, a bump, and an intake duct of an aircraft; setting a shape of the design target on the basis of the set value of the design parameter; analyzing an aerodynamic characteristic and a radar cross-section characteristic of the design target on the basis of the set shape of the design target; determining whether an analysis result obtained by the analyzing satisfies a preset design condition; updating the value of the design parameter when the analysis result obtained by the analyzing is determined as not satisfying the design condition; and repeating the setting the shape of the design target, the analyzing, the determining, and the updating the value of the design parameter, until the analysis result obtained by the analyzing is determined as satisfying the design condition.
    Type: Application
    Filed: April 4, 2018
    Publication date: October 11, 2018
    Inventors: Takeshi OSUKA, Kazushige SATO, Chikage MURAKAMI, Tomoyuki OKITA
  • Patent number: 9975643
    Abstract: In an intake structure of an aircraft that takes in air from a front side of an airframe, a bump is provided on a surface of the airframe of the aircraft at a portion immediately before an intake. The bump is formed so as to smoothly protrude from the front side of the airframe while having a width that is wider than a width of the intake.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: May 22, 2018
    Assignee: SUBARU CORPORATION
    Inventors: Kazushige Sato, Hideo Iso, Takeshi Osuka
  • Patent number: 9694610
    Abstract: An inkjet printer 100 that carries out printing with respect to long continuous paper X provided with a perforation M at every page break and provided with marginal punch holes P in both sides, the inkjet printer having: a paper feeding unit 1 that disposes the Z-folded continuous paper X; a first pull roller 2a and a second pull roller 2b for conveying the continuous paper X; a pin tractor 3 for positioning the continuous paper X; a speed-variable motor 4 for applying tension to the continuous paper X; a printing unit 5 that carries out printing on the continuous paper X by a print head; and a discharging unit 6 that Z-folds and discharges the continuous paper X by a folding machine 61.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: July 4, 2017
    Assignee: MIYAKOSHI PRINTING MACHINERY CO., LTD.
    Inventors: Hideo Izawa, Kouichi Ooyama, Takehiro Fujiwara, Seiji Komatsuda, Kazushige Sato
  • Publication number: 20170021650
    Abstract: An inkjet printer 100 that carries out printing with respect to long continuous paper X provided with a perforation M at every page break and provided with marginal punch holes P in both sides, the inkjet printer having: a paper feeding unit 1 that disposes the Z-folded continuous paper X; a first pull roller 2a and a second pull roller 2b for conveying the continuous paper X; a pin tractor 3 for positioning the continuous paper X; a speed-variable motor 4 for applying tension to the continuous paper X; a printing unit 5 that carries out printing on the continuous paper X by a print head; and a discharging unit 6 that Z-folds and discharges the continuous paper X by a folding machine 61.
    Type: Application
    Filed: March 2, 2016
    Publication date: January 26, 2017
    Inventors: Hideo IZAWA, Kouichi OOYAMA, Takehiro FUJIWARA, Seiji KOMATSUDA, Kazushige SATO
  • Publication number: 20160280388
    Abstract: In an intake structure of an aircraft that takes in air from a front side of an airframe, a bump is provided on a surface of the airframe of the aircraft at a portion immediately before an intake. The bump is formed so as to smoothly protrude from the front side of the airframe while having a width that is wider than a width of the intake.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 29, 2016
    Inventors: Kazushige SATO, Hideo ISO, Takeshi OSUKA
  • Publication number: 20160092629
    Abstract: An aircraft designing apparatus receives set values of design parameters related to the shape of an intake duct, creates analysis models for an aerodynamic characteristic analysis and a radar-cross-section analysis by using the values of the design parameters, calculates aerodynamic characteristics and radar-cross-section characteristics of the intake duct, and determines whether or not this analytical result satisfies a preset design condition. If it is determined that the analytical result does not satisfy the design condition, the values of the design parameters are updated. The updating of the design parameters, the analyses of the aerodynamic characteristics and the radar-cross-section characteristics, and the determining process are repeated until it is determined that the analytical result satisfies the design condition.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 31, 2016
    Inventors: Kazushige SATO, Chikage MURAKAMI, Hideo ISO
  • Patent number: 8133780
    Abstract: A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: March 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shuji Ikeda, Toshiaki Yamanaka, Kenichi Kikushima, Shinichiro Mitani, Kazushige Sato, Akira Fukami, Masaya Iida, Akihiro Shimizu
  • Patent number: 8093681
    Abstract: A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: January 10, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shuji Ikeda, Toshiaki Yamanaka, Kenichi Kikushima, Shinichiro Mitani, Kazushige Sato, Akira Fukami, Masaya Iida, Akihiro Shimizu
  • Publication number: 20110159653
    Abstract: A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.
    Type: Application
    Filed: March 10, 2011
    Publication date: June 30, 2011
    Inventors: Shuji Ikeda, Toshiaki Yamanaka, Kenichi Kikushima, Shinichiro Mitani, Kazushige Sato, Akira Fukami, Masaya Iida, Akihiro Shimizu
  • Publication number: 20110156155
    Abstract: A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.
    Type: Application
    Filed: March 9, 2011
    Publication date: June 30, 2011
    Inventors: Shuji IKEDA, Toshiaki YAMANAKA, Kenichi KIKUSHIMA, Shinichiro MITANI, Kazushige SATO, Akira FUKAMI, Masaya IIDA, Akihiro SHIMIZU