Patents by Inventor Kazushige Takaishi

Kazushige Takaishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7601644
    Abstract: This silicon wafer production process comprises in the order indicated a planarization step, in which the front surface and the rear surface of a wafer are ground or lapped, a single-wafer acid etching step, in which an acid etching liquid is supplied to the surface of the wafer while spinning and the entire wafer surface is etched to control the surface roughness Ra to 0.20 ?m or less, and a double-sided simultaneous polishing step, in which the front surface and the rear surface of the acid etched wafer are polished simultaneously. The process may comprise a single-sided polishing step, in which the top and bottom of the acid etched wafer are polished in turn, instead of the double-sided simultaneously polishing step.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: October 13, 2009
    Assignee: Sumco Corporation
    Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
  • Publication number: 20090211167
    Abstract: A wire saw slurry containing, in a dispersing medium, 0.01-1 wt % of a metal film forming substance or a chelating agent that forms a film over copper in the dispersing medium. Entry of copper into a wafer bulk is prevented by the metal film forming substance or the chelating agent capturing the copper leaching out from brass plating of wires.
    Type: Application
    Filed: February 19, 2009
    Publication date: August 27, 2009
    Applicant: SUMCO CORPORATION
    Inventors: Satoshi MATAGAWA, Akira NAKASHIMA, Takahisa NAKASHIMA, Kazushige TAKAISHI
  • Publication number: 20090181546
    Abstract: A single-wafer etching apparatus according to the present invention supplies an etchant to an upper surface of a wafer while rotating the wafer, thereby etching the upper surface of the wafer. Further, wafer elevating means moves up and down the wafer, and a lower surface blow mechanism which blows off the etchant flowing down on an edge surface of the wafer toward a radially outer side of the wafer by injection of a gas is fixed and provided without rotating together with the wafer. Furthermore, gap adjusting means controls the wafer elevating means based on detection outputs from gap detecting means for detecting a gap between the wafer and the lower surface blow mechanism, thereby adjusting the gap. The apparatus according to the present invention uniformly etches the edge portion without collapsing a chamfered shape of the edge portion of the wafer, and prevents a glitter from being produced on the edge surface of the wafer.
    Type: Application
    Filed: March 31, 2008
    Publication date: July 16, 2009
    Inventors: Takeo KATOH, Tomohiro Hashii, Katsuhiko Murayama, Sakae Koyata, Kazushige Takaishi
  • Publication number: 20090117749
    Abstract: Local shape collapse of a wafer end portion is suppressed to the minimum level, and a wafer front surface as well as a wafer end portion is uniformly etched while preventing an etchant from flowing to a wafer rear surface. There is provided an etching method of a single wafer which supplies an etchant onto a wafer front surface in a state where a single wafer having flattened front and rear surfaces is held, and etches the wafer front surface and a front surface side end portion by using a centrifugal force generated by horizontally rotating the wafer. According to this method, the etchant is intermittently supplied onto the front surface of the wafer in twice or more, supply of the etchant is stopped after the etchant for one process is supplied, and the etchant for the next process is supplied after the supplied etchant flows off from the end portion of the wafer.
    Type: Application
    Filed: October 28, 2008
    Publication date: May 7, 2009
    Inventors: Sakae KOYATA, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
  • Publication number: 20090053894
    Abstract: A method for manufacturing an epitaxial wafer that can reduce occurrence of a surface defect or a slip formed on an epitaxial layer is provided. The manufacturing method is characterized by comprising: a smoothing step of controlling application of an etchant to a wafer surface in accordance with a surface shape of a silicon wafer to smooth the wafer surface; and an epitaxial layer forming step of forming an epitaxial layer formed of a silicon single crystal on the surface of the wafer based on epitaxial growth.
    Type: Application
    Filed: January 24, 2007
    Publication date: February 26, 2009
    Inventors: Sakae Koyata, Kazushige Takaishi, Tomohiro Hashii, Katsuhiko Murayama, Takeo Katoh
  • Publication number: 20090042390
    Abstract: It is possible to reduce workloads of a both-side simultaneous polishing process or a single-side polishing process, and to achieve both of the maintenance of the wafer flatness and the reduction in wafer front side roughness upon completing a flattening process. A method for manufacturing silicon wafers according to the present invention includes a flattening process 13 of grinding or lapping front and back sides of a thin disc-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process of immersing the silicon wafer in an etchant for controlling a silicon wafer surface shape in which a fluorochemical surfactant is uniformly mixed in an alkaline aqueous solution to etch the front and back sides of the silicon wafer, and a both-side simultaneous polishing process 16 of simultaneously polishing the front and back sides of the etched silicon wafer or a single-side polishing process of polishing the front and back sides of the etched wafer for every side, in this order.
    Type: Application
    Filed: August 9, 2007
    Publication date: February 12, 2009
    Inventors: Sakae Koyata, Takeo Katoh, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi
  • Patent number: 7488400
    Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: February 10, 2009
    Assignee: Sumco Corporation
    Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
  • Publication number: 20090004876
    Abstract: An object of the present invention is to provide a method for etching a single wafer, which effectively realizes a high flatness of wafer and an increase in productivity thereof. In a method for etching a single wafer, a single thin disk-like wafer sliced from a silicon single crystal ingot is spun, and a front surface of the wafer is etched with an etching solution supplied thereto. In the method, a plurality of supply nozzles are disposed above and opposite to the front surface of the wafer at different portions in the radial direction of the wafer, respectively; and then one or more conditions selected from the group consisting of temperatures, kinds, and supply flow rates of etching solutions from the plurality of supply nozzles are changed.
    Type: Application
    Filed: January 24, 2007
    Publication date: January 1, 2009
    Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
  • Patent number: 7456106
    Abstract: Provided is a method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the chamfered wafer, a mild lapping step for abrading away part of processing distortions on the rear surface of the wafer left after chamfering and lapping, a rear-surface mild polishing step for abrading away part of roughness on the rear surface of the wafer, an etching step for alkali-etching the remains of processing distortions on the front and rear surfaces of the wafer, a front-surface mirror-polishing step for mirror-polishing the front surface of the etched wafer, and a cleaning step for cleaning the mirror-polished wafer.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: November 25, 2008
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Sakae Koyata, Kazushige Takaishi, Tohru Taniguchi, Kazuo Fujimaki
  • Publication number: 20080214094
    Abstract: A method for manufacturing a silicon wafer comprises a slicing step of a silicon single crystal ingot to obtain sliced wafers, a single-side grinding step to grind only one side of a wafer, and a smoothing step to smooth the other side of the wafer by controlling application of etchant depending on surface profile of the other side of the wafer. According to a method of the present invention a silicon wafer that has high flatness, is removed machine working damage, and is reduced of profile change of chamfer to be minimal can be manufactured.
    Type: Application
    Filed: February 15, 2008
    Publication date: September 4, 2008
    Inventors: Takeo KATOH, Yasuyuki Hashimoto, Kazushige Takaishi, Tomohiro Hashii, Katsuhiko Murayama, Sakae Koyata
  • Patent number: 7338904
    Abstract: A surface of a semiconductor wafer which has been lapped is ground. This removes a damage caused on the wafer surface during lapping, thereby increasing the flatness of the wafer surface. Next, the wafer is subjected to composite etching and the both surfaces are polished, i.e., subjected to mirror polishing while the wafer rear surface is slightly polished so as to obtain a single-side mirror surface wafer having a difference between the front and the rear surfaces. As compared to mere acid etching or alkali etching, it is possible to manufacture a single-side mirror surface wafer having a higher flatness.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: March 4, 2008
    Assignee: SUMCO Corporation
    Inventors: Sakae Koyata, Tadashi Denda, Masashi Norimoto, Kazushige Takaishi
  • Publication number: 20070298614
    Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.
    Type: Application
    Filed: August 15, 2007
    Publication date: December 27, 2007
    Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
  • Publication number: 20070298618
    Abstract: An alkali etchant for controlling surface roughness of a semiconductor wafer, which is a sodium hydroxide solution or a potassium hydroxide solution having a weight concentration of 55 wt % to 70 wt %.
    Type: Application
    Filed: March 25, 2005
    Publication date: December 27, 2007
    Applicant: SUMCO CORPORATION
    Inventors: Sakae Koyata, Kazushige Takaishi
  • Publication number: 20070267387
    Abstract: The processing method of a silicon wafer of the present invention includes an etching process (13) in which acid etching solution and alkali etching solution are stored in plural etching tanks, respectively and a wafer having degraded superficial layers gone through a cleaning process (12) subsequent to a lapping process (11) is immersed into the acid etching solution and the alkali etching solution in order, a front surface mirror-polishing process (18) to mirror-polish one surface of the etched wafer, and a cleaning process (19) to clean the front surface mirror-polished wafer, wherein the etching process is performed by the alkali etching after the acid etching, and wherein the acid etching solution contains phosphoric acid equal to or more than 30 percent by weight in the acid aqueous water solution 100 percent by weight mainly composed of hydrofluoric acid and nitric acid.
    Type: Application
    Filed: October 28, 2004
    Publication date: November 22, 2007
    Inventors: Sakae Koyata, Kazushige Takaishi
  • Publication number: 20070175863
    Abstract: An object of the present invention is to provide a single wafer etching apparatus realizing a high flatness of wafers and an increase in productivity thereof. In the single wafer etching apparatus, a single thin disk-like wafer sliced from a silicon single crystal ingot is mounted on a wafer chuck and spun thereon, and an overall front surface of the wafer is etched with an etching solution supplied thereto by centrifugal force generated by spinning the wafer 11. The singe wafer etching apparatus includes a plurality of supply nozzles 26, 27 capable of discharging the etching solution 14 from discharge openings 26a, 27a onto the front surface of the wafer 11, nozzle-moving devices each capable of independently moving the plurality of supply nozzles 28, 29, and an etching solution supplying device 30 for supplying the etching solution 14 to each of the plurality of supply nozzles and discharging the etching solution 14 from each of the discharge openings to the front surface of the wafer 11.
    Type: Application
    Filed: January 31, 2007
    Publication date: August 2, 2007
    Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
  • Publication number: 20070161247
    Abstract: Local shape collapse of a wafer end portion is suppressed to the minimum level, and a wafer front surface as well as a wafer end portion is uniformly etched while preventing an etchant from flowing to a wafer rear surface. There is provided an etching method of a single wafer which supplies an etchant onto a wafer front surface in a state where a single wafer having flattened front and rear surfaces is held, and etches the wafer front surface and a front surface side end portion by using a centrifugal force generated by horizontally rotating the wafer. According to this method, the etchant is intermittently supplied onto the front surface of the wafer in twice or more, supply of the etchant is stopped after the etchant for one process is supplied, and the etchant for the next process is supplied after the supplied etchant flows off from the end portion of the wafer.
    Type: Application
    Filed: July 19, 2006
    Publication date: July 12, 2007
    Inventors: Sakae KOYATA, Tomohiro HASHII, Katsuhiko MURAYAMA, Kazushige TAKAISHI, Takeo KATOH
  • Publication number: 20070158308
    Abstract: A surface of a semiconductor wafer which has been lapped is ground. This removes a damage caused on the wafer surface during lapping, thereby increasing the flatness of the wafer surface. Next, the wafer is subjected to composite etching and the both surfaces are polished, i.e., subjected to mirror polishing while the wafer rear surface is slightly polished so as to obtain a single-side mirror surface wafer having a difference between the front and the rear surfaces. As compared to mere acid etching or alkali etching, it is possible to manufacture a single-side mirror surface wafer having a higher flatness.
    Type: Application
    Filed: December 3, 2004
    Publication date: July 12, 2007
    Applicant: SUMCO CORPORATION
    Inventors: Sakae Koyata, Tadashi Denda, Masashi Norimoto, Kazushige Takaishi
  • Patent number: 7226864
    Abstract: Provided is an improved method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the wafer, an etching step for removing processing distortions on the wafer surfaces, a mirror-polishing step for mirror-polishing the surface of the wafer, and a cleaning step for cleaning the wafer. The etching step further comprises a first acid-etching phase and a second alkali-etching phase, and a rear surface mild polishing step is introduced between the first and second etching phases in order to abrade part of roughness formed on the rear surface of the wafer as a result of the first etching phase.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: June 5, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Sakae Koyata, Kazushige Takaishi, Tohru Taniguchi, Kazuo Fujimaki, Akihiro Kudo, Masashi Norimoto
  • Publication number: 20070119817
    Abstract: The manufacturing method of a silicon wafer of the present invention includes an etching process (14) storing acid etching solution and alkali etching solution in plural etching tanks, respectively, and immersing a silicon wafer gone through a lapping process and having degraded superficial layers in the acid etching solution and the alkali etching solution in order so as to remove the degraded superficial layers; and a double surface polishing process (16) to simultaneously polish the front and rear surfaces of the wafer after the etching process; wherein sodium hydroxide aqueous solution of 40 to 60 percent by weight is used in the alkali etching solution of the etching process, and the polishing removal depth A in the wafer front surface is made 5 to 10 ?m in the double surface simultaneous polishing process, and the polishing removal depth B in the rear surface is made 2 to 6 ?m, and a difference (A-B) between the polishing removal depth A and the polishing removal depth B is made 3 to 4 ?m.
    Type: Application
    Filed: October 28, 2004
    Publication date: May 31, 2007
    Applicant: SUMCO CORPORATION
    Inventors: Sakae Koyata, Kazushige Takaishi
  • Publication number: 20070087568
    Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.
    Type: Application
    Filed: October 17, 2006
    Publication date: April 19, 2007
    Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh