Abstract: A method of forming a solder bump on a substrate includes: forming a conductive layer(s) on the substrate having a surface on which an electrode pad is prepared; forming a resist layer on the conductive layer(s) having an opening over the electrode pad; forming a metal pillar in the opening of the resist layer, wherein the metal pillar includes a first conductive material; forming a space between sidewalls of the resist layer and the metal pillar; forming a metal barrier layer in the space and on a top surface of the metal pillar, the metal barrier layer including a second conductive material that is different from the first conductive material of the metal pillar; forming a solder layer on the metal barrier layer over the top surface of the metal pillar; removing the resist layer; removing the conductive layer(s); and forming the solder bump by reflowing the solder layer.

Abstract: A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.

Abstract: A method of forming a structure for an interfacial alloy layer which is able to improve the electromigration (EM) resistance of a solder joint. More specifically, in this structure, a controlled interfacial alloy layer is provided on both sides of a solder joint. In order to form this structure, aging (maintenance of high-temperature conditions) is performed until an interfacial alloy layer of Cu3Sn has a thickness of at least 1.5 ?m.

Abstract: A structure is formed which is prepared as a via for electrical contact passing through layers of an optical waveguide, in a multilayer structure including an electrical substrate and the laminated layers of the optical waveguide. The surface of an electrode pad is plated with solder. The layers of the optical waveguide are formed above the portion plated with solder are removed to expose the portion plated with solder. A device is prepared having both a light-emitter or photoreceptor in optical contact with the optical waveguide, and a stud (pillar). The stud (pillar) is inserted into the portion in which layers of the optical waveguide have been removed, and the plated solder is melted to bond the electrode pad on top of the electrical substrate to the tip of the inserted stud (pillar).

Abstract: Problem To improve the electromigration (EM) resistance of a solder joint. Solution The present invention provides a unique structure for an interfacial alloy layer which is able to improve the electromigration (EM) resistance of a solder joint, and a unique method of forming this structure. More specifically, in this unique structure, a controlled interfacial alloy layer is provided on both sides of a solder joint. In order to form this structure, aging (maintenance of high-temperature conditions) is performed until an interfacial alloy layer of Cu3Sn has a thickness of at least 1.5 ?m.

Abstract: A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.

Abstract: A structure is formed which is prepared as a via for electrical contact passing through layers of an optical waveguide, in a multilayer structure including an electrical substrate and the laminated layers of the optical waveguide. The surface of an electrode pad is plated with solder. The layers of the optical waveguide are formed above the portion plated with solder are removed to expose the portion plated with solder. A device is prepared having both a light-emitter or photoreceptor in optical contact with the optical waveguide, and a stud (pillar). The stud (pillar) is inserted into the portion in which layers of the optical waveguide have been removed, and the plated solder is melted to bond the electrode pad on top of the electrical substrate to the tip of the inserted stud (pillar).

Abstract: A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.

Abstract: A substrate bonding method is able to reliably bond substrates while avoiding a reduction in yield made worse by finer pitches. The substrate bonding method can include: forming an adhesive resin layer on a surface of a first substrate on which a pad has been formed; forming an opening on the adhesive resin layer above the pad; filling the opening with molten solder to form a pillar-shaped solder bump; and applying heat and pressure to the first substrate and a second substrate while a terminal formed on the second substrate is aligned with the solder bump.

Abstract: Forming a solder joint between metal layers by preparing a structure having solder material placed between two metal layers and heating the structure to grow an intermetallic compound in a space between the two metal layers. Growing the intermetallic compound includes setting a first surface, in contact with the solder material between the two metal layers, to a first temperature, thereby enabling growth of the intermetallic compound; setting a second surface, in contact with the solder material between the two metal layers, to a second temperature, wherein the second temperature is higher than the first temperature; and maintaining a temperature gradient (temperature/unit thickness) between the two metal layers at a predetermined value or higher until the intermetallic compound substantially fills the space between the two metal layers.

Abstract: A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.

Abstract: A substrate bonding method is able to reliably bond substrates while avoiding a reduction in yield made worse by finer pitches. The substrate bonding method can include: forming an adhesive resin layer on a surface of a first substrate on which a pad has been formed; forming an opening on the adhesive resin layer above the pad; filling the opening with molten solder to form a pillar-shaped solder bump; and applying heat and pressure to the first substrate and a second substrate while a terminal formed on the second substrate is aligned with the solder bump.

Abstract: A joined structure which is configured such that a space between adjacent substrates is filled with a filling material. The joined structure includes a first substrate having a first conductor formed on a surface of the first substrate, a second substrate having a second conductor formed on a surface of the second substrate, arranged so that a surface of the first substrate faces a surface of the second substrate, a connecting conductor which electrically connects the first conductor and the second conductor, and a filling material between the first substrate and the second substrate. The filling material is formed into such a shape that a space is provided which corresponds to at least one of the first conductor, the second and the connecting conductor.

Abstract: A mmWave electronics package constructed from common Printed Circuit Board (PCB) technology and a metal cover. Assembly of the package uses standard pick and place technology and heat is dissipated directly to a pad on the package. Input/output of mmWave signal(s) is achieved through a rectangular waveguide. Mounting of the electronic package to an electrical printed circuit board (PCB) is performed using conventional reflow soldering processes and includes a waveguide I/O connected to an mmWave antenna. The electronic package provides for transmission of low frequency, dc and ground signals from the semiconductor chip inside the package to the PCB it is mounted on. An impedance matching scheme matches the chip to high frequency board transition by altering the ground plane within the chip. A ground plane on the high frequency board encircles the high frequency signal bump to confine the electromagnetic fields to the bump region reducing radiation loss.

Abstract: A structure is formed which is prepared as a via for electrical contact passing through layers of an optical waveguide, in a multilayer structure including an electrical substrate and the laminated layers of the optical waveguide. The surface of an electrode pad is plated with solder. The layers of the optical waveguide are formed above the portion plated with solder are removed to expose the portion plated with solder. A device is prepared having both a light-emitter or photoreceptor in optical contact with the optical waveguide, and a stud (pillar). The stud (pillar) is inserted into the portion in which layers of the optical waveguide have been removed, and the plated solder is melted to bond the electrode pad on top of the electrical substrate to the tip of the inserted stud (pillar).

Abstract: A mounting structure which reduces the mechanical stress added to a low-? material due to warping caused by the difference in thermal expansion coefficients between a chip and a chip support during mounting. This mounting structure includes: a low-? layer formed on top a semiconductor substrate; an electrode layer formed on the low-? layer; a protective layer formed the low-? layer and the electrode layer and having an opening reaching the electrode layer; a first solder layer filling the opening and formed on the electrode layer inside; a second solder layer formed on the first solder layer and having an elastic modulus smaller than the first solder layer; and a support layer connected to the second solder layer and supporting the semiconductor substrate. The protective layer has a greater elastic modulus and a smaller thermal expansion coefficient than an underfill layer formed between the protective layer and the support layer.

Abstract: A substrate bonding method is able to reliably bond substrates while avoiding a reduction in yield made worse by finer pitches. The substrate bonding method can include: forming an adhesive resin layer on a surface of a first substrate on which a pad has been formed; forming an opening on the adhesive resin layer above the pad; filling the opening with molten solder to form a pillar-shaped solder bump; and applying heat and pressure to the first substrate and a second substrate while a terminal formed on the second substrate is aligned with the solder bump.

Abstract: Spacer resin pattern layer which precisely aligns a light-emitting element or a light-receiving element relative to both a waveguide pattern layer and electrical circuit pattern layer from the semiconductor wafer level. A substratum of resin having a through-hole provided for electrical communication with an electrical circuit pattern layer is formed on a semiconductor wafer. A truncated cone-shaped three-dimensional reflective surface is formed to guide the emitted light towards or received light from a waveguide pattern layer. A metal film is deposited planarly in a predetermined range from the center when positioned relative to the position of the through-hole. A truncated cone-shaped mold is stamped in the center. By modifying the direction of the light using this tapered structure, the precision tolerance is increased and optical loss is reduced.

Abstract: A mounting structure which reduces the mechanical stress added to a low-? material due to warping caused by the difference in thermal expansion coefficients between a chip and a chip support during mounting. This mounting structure includes: a low-? layer formed on top a semiconductor substrate; an electrode layer formed on the low-? layer; a protective layer formed the low-? layer and the electrode layer and having an opening reaching the electrode layer; a first solder layer filling the opening and formed on the electrode layer inside; a second solder layer formed on the first solder layer and having an elastic modulus smaller than the first solder layer; and a support layer connected to the second solder layer and supporting the semiconductor substrate. The protective layer has a greater elastic modulus and a smaller thermal expansion coefficient than an underfill layer formed between the protective layer and the support layer.

Abstract: Problem To improve the electromigration (EM) resistance of a solder joint. Solution The present invention provides a unique structure for an interfacial alloy layer which is able to improve the electromigration (EM) resistance of a solder joint, and a unique method of forming this structure. More specifically, in this unique structure, a controlled interfacial alloy layer is provided on both sides of a solder joint. In order to form this structure, aging (maintenance of high-temperature conditions) is performed until an interfacial alloy layer of Cu3Sn has a thickness of at least 1.5 ?m.