Patents by Inventor Kazutaka Yamane
Kazutaka Yamane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180053521Abstract: [Object] To provide a storage device that realizes both a high information retention property and a low power consumption. [Solving Means] A storage device includes a fixed layer, a storage layer, an intermediate layer, and a heat generation layer. The fixed layer includes a first ferromagnetic layer that includes a fixed perpendicular magnetization. The storage layer includes a second ferromagnetic layer that includes a perpendicular magnetization invertible by a spin injection. The intermediate layer is formed of an insulator and is arranged between the storage layer and the fixed layer. The heat generation layer is formed of a resistance heating element and is arranged in at least one of the storage layer and the fixed layer. With this configuration, it becomes possible to provide a storage device that realizes both a high information retention property and a low power consumption.Type: ApplicationFiled: January 18, 2016Publication date: February 22, 2018Inventors: KAZUTAKA YAMANE, HIROYUKI UCHIDA, YUTAKA HIGO, HIROYUKI OHMORI, KAZUHIRO BESSHO, MASANORI HOSOMI
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Patent number: 9875779Abstract: A storage element includes a magnetization fixed layer, and a magnetization free layer. The magnetization fixed layer includes a plurality of ferromagnetic layers laminated together with a coupling layer formed between each pair of adjacent ferromagnetic layers. The magnetization directions of the ferromagnetic layers are inclined with respect to a magnetization direction of the magnetization fixed layer.Type: GrantFiled: January 4, 2016Date of Patent: January 23, 2018Assignee: Sony CorporationInventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Tetsuya Asayama, Kazutaka Yamane, Hiroyuki Uchida
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Patent number: 9865801Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, a method of producing an integrated circuit includes forming a fixed layer that includes a magnetic material overlying a substrate. A non-magnetic first tunnel barrier layer is formed overlying the fixed layer. A total free layer is formed overlying the first tunnel barrier layer, where the total free layer includes a first spacer layer between first and second free layers. The first free layer includes one or more of cobalt, iron, and boron. The first spacer layer is non-magnetic and includes a first spacer layer boron sink material that has a boride formation enthalpy lower than the boride formation enthalpy of cobalt.Type: GrantFiled: January 19, 2017Date of Patent: January 9, 2018Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Kazutaka Yamane, Vinayak Bharat Naik, Kangho Lee
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Publication number: 20180006211Abstract: There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, and in regard to the insulating layer and the other side layer with which the memory layer comes into contact at a side opposite to the insulating layer, at least an interface that comes into contact with the memory layer is formed of an oxide film.Type: ApplicationFiled: July 11, 2017Publication date: January 4, 2018Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Kazutaka Yamane, Hiroyuki Uchida
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Patent number: 9847161Abstract: A storage element includes a storage layer having a magnetization perpendicular to a layer surface and storing information according to a magnetization state of a magnetic material; a fixed magnetization layer having the magnetization as a reference of the information of the storage layer and perpendicular to the layer surface; an interlayer formed of a nonmagnetic material and interposed between the storage layer and the fixed magnetization layer; a coercive force enhancement layer adjacent to the storage layer, opposite to the interlayer, and formed of Cr, Ru, W, Si, or Mn; and a spin barrier layer formed of an oxide, adjacent to the coercive force enhancement layer, and opposite to the storage layer. The storage layer magnetization is reversed using spin torque magnetization reversal caused by a current in a lamination direction of a layer structure including the storage layer, the interlayer, and the fixed magnetization layer, thereby storing information.Type: GrantFiled: July 21, 2015Date of Patent: December 19, 2017Assignee: Sony CorporationInventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida, Tetsuya Asayama
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Publication number: 20170358738Abstract: A storage element includes a storage layer, a fixed magnetization layer, a spin barrier layer, and a spin absorption layer. The storage layer stores information based on a magnetization state of a magnetic material. The fixed magnetization layer is provided for the storage layer through a tunnel insulating layer. The spin barrier layer suppresses diffusion of spin-polarized electrons and is provided on the side of the storage layer opposite the fixed magnetization layer. The spin absorption layer is formed of a nonmagnetic metal layer causing spin pumping and provided on the side of the spin barrier layer opposite the storage layer. A direction of magnetization in the storage layer is changed by passing current in a layering direction to inject spin-polarized electrons so that information is recorded in the storage layer and the spin barrier layer includes at least a material selected from oxides, nitrides, and fluorides.Type: ApplicationFiled: August 3, 2017Publication date: December 14, 2017Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Tetsuya Yamamoto, Kazutaka Yamane, Yuki Oishi, Hiroshi Kano
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Publication number: 20170345999Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a magnetic tunnel junction with a fixed layer, a total free structure, and a barrier layer between the fixed layer and the total free structure. The total free structure includes a first free layer, a second free layer, and a first spacer layer disposed between the first and second free layers. The first spacer layer is non-magnetic. At least one of the first or second free layers include a primary free layer alloy with cobalt, iron, boron, and a free layer additional element. The free layer additional element is present at from about 1 to about 10 atomic percent. The free layer additional element is selected from one or more of molybdenum, aluminum, germanium, tungsten, vanadium, niobium, tantalum, zirconium, manganese, titanium, chromium, silicon, and hafnium.Type: ApplicationFiled: February 27, 2017Publication date: November 30, 2017Inventors: Seungmo Noh, Kazutaka Yamane, Kangho Lee
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Patent number: 9818932Abstract: A storage element and storage devices containing the same, having a layered structure and being configured for storing information are disclosed. In one example, the storage element comprises a storage portion with a storage magnetization that is perpendicular to a film surface of the layered structure, wherein a direction of the storage magnetization is configured to change according to the information. The storage element also includes a fixed magnetization portion with reference magnetization serving as a reference to the storage magnetization, and an intermediate portion between the storage portion and the fixed magnetization portion that is made of a non-magnetic material. The fixed magnetization portion includes a laminated ferrimagnetic structure that comprises a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer. The fixed magnetization portion includes a first magnetic material that is an alloy or a laminated structure including Pt, Co, and Y.Type: GrantFiled: October 20, 2014Date of Patent: November 14, 2017Assignee: Sony CorporationInventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Hiroyuki Uchida
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Publication number: 20170324026Abstract: A storage element includes a layer structure including a storage layer having a direction of magnetization which changes according to information, a magnetization fixed layer having a fixed direction of magnetization, and an intermediate layer disposed therebetween, which intermediate layer contains a nonmagnetic material. The magnetization fixed layer has at least two ferromagnetic layers having a direction of magnetization tilted from a direction perpendicular to a film surface, which are laminated and magnetically coupled interposing a coupling layer therebetween. This configuration may effectively prevent divergence of magnetization reversal time due to directions of magnetization of the storage layer and the magnetization fixed layer being substantially parallel or antiparallel, reduce write errors, and enable writing operation in a short time.Type: ApplicationFiled: July 25, 2017Publication date: November 9, 2017Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Tetsuya Asayama, Kazutaka Yamane, Hiroyuki Uchida
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Publication number: 20170318573Abstract: A memory system is provided. The memory system includes a memory area configured to include a plurality of memory cells; a driving area configured to drive the memory cells; and a control area configured to supply a standby current to the memory area before the memory area records data; a plurality of word lines is crossing to a plurality of bit lines via the plurality of memory cells; and wherein each of the memory cells includes a memory layer, a magnetic fixed layer, an intermediate layer including a non-magnetic material provided between the memory layer and the magnetic fixed layer, a top electrode provided over the memory layer, a bottom electrode provided over the magnetic fixed layer.Type: ApplicationFiled: July 14, 2017Publication date: November 2, 2017Inventors: Yutaka HIGO, Masanori HOSOMI, Hiroyuki OHMORI, Kazuhiro BESSHO, Tetsuya ASAYAMA, Kazutaka YAMANE, Hiroyuki UCHIDA
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Publication number: 20170309813Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a fixed layer that is magnetic and a tunnel barrier layer overlying the fixed layer, where the tunnel barrier layer is non-magnetic. A total free layer overlies the tunnel barrier layer, where the total free layer includes a plurality of individual free layers, wherein each of the plurality of individual free layers includes one or more of cobalt, iron, or boron, and where each of the plurality of individual free layers is magnetic. At least one of the plurality of individual free layers includes an atomic ratio of cobalt to iron that is from about 0.9/1 to about 1.1/1.Type: ApplicationFiled: February 27, 2017Publication date: October 26, 2017Inventors: Vinayak Bharat Naik, Kazutaka Yamane, Kangho Lee
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Patent number: 9767874Abstract: A memory apparatus and a memory device are provided. The memory apparatus includes a memory device including a plurality of memory cells and a driving circuit configured to control the memory cells; wherein each of the memory cells includes a memory layer where a magnetization direction is changeable by a current, a magnetic fixed layer having a fixed magnetization, an intermediate layer including a non-magnetic material provided between the memory layer and the magnetic fixed layer, a top electrode provided over the memory layer, a bottom electrode provided over the magnetic fixed layer; wherein the current is configured to flow in a lamination direction between the top electrode and the bottom electrode.Type: GrantFiled: July 27, 2016Date of Patent: September 19, 2017Assignee: Sony CorporationInventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Tetsuya Asayama, Kazutaka Yamane, Hiroyuki Uchida
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Patent number: 9748470Abstract: A storage element includes a layer structure including a storage layer having a direction of magnetization which changes according to information, a magnetization fixed layer having a fixed direction of magnetization, and an intermediate layer disposed therebetween, which intermediate layer contains a nonmagnetic material. The magnetization fixed layer has at least two ferromagnetic layers having a direction of magnetization tilted from a direction perpendicular to a film surface, which are laminated and magnetically coupled interposing a coupling layer therebetween. This configuration may effectively prevent divergence of magnetization reversal time due to directions of magnetization of the storage layer and the magnetization fixed layer being substantially parallel or antiparallel, reduce write errors, and enable writing operation in a short time.Type: GrantFiled: August 10, 2016Date of Patent: August 29, 2017Assignee: Sony CorporationInventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Tetsuya Asayama, Kazutaka Yamane, Hiroyuki Uchida
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Publication number: 20170236997Abstract: A storage element including a storage layer configured to hold information by use of a magnetization state of a magnetic material, with a pinned magnetization layer being provided on one side of the storage layer, with a tunnel insulation layer, and with the direction of magnetization of the storage layer being changed through injection of spin polarized electrons by passing a current in the lamination direction, so as to record information in the storage layer, wherein a spin barrier layer configured to restrain diffusion of the spin polarized electrons is provided on the side, opposite to the pinned magnetization layer, of the storage layer; and the spin barrier layer includes at least one material selected from the group composing of oxides, nitrides, and fluorides.Type: ApplicationFiled: May 3, 2017Publication date: August 17, 2017Inventors: Yutaka Higo, Masanori Hosomi, Kazuhiro Bessho, Tetsuya Yamamoto, Hiroyuki Ohmori, Kazutaka Yamane, Yuki Oishi, Hiroshi Kano
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Patent number: 9735343Abstract: There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, and in regard to the insulating layer and the other side layer with which the memory layer comes into contact at a side opposite to the insulating layer, at least an interface that comes into contact with the memory layer is formed of an oxide film.Type: GrantFiled: January 6, 2015Date of Patent: August 15, 2017Assignee: Sony CorporationInventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Kazutaka Yamane, Hiroyuki Uchida
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Patent number: 9728716Abstract: A storage element including a storage layer configured to hold information by use of a magnetization state of a magnetic material, with a pinned magnetization layer being provided on one side of the storage layer, with a tunnel insulation layer, and with the direction of magnetization of the storage layer being changed through injection of spin polarized electrons by passing a current in the lamination direction, so as to record information in the storage layer, wherein a spin barrier layer configured to restrain diffusion of the spin polarized electrons is provided on the side, opposite to the pinned magnetization layer, of the storage layer; and the spin barrier layer includes at least one material selected from the group composing of oxides, nitrides, and fluorides.Type: GrantFiled: January 27, 2016Date of Patent: August 8, 2017Assignee: SONY CORPORATIONInventors: Yutaka Higo, Masanori Hosomi, Kazuhiro Bessho, Tetsuya Yamamoto, Hiroyuki Ohmori, Kazutaka Yamane, Yuki Oishi, Hiroshi Kano
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Patent number: 9728715Abstract: A storage element includes a storage layer, a fixed magnetization layer, a spin barrier layer, and a spin absorption layer. The storage layer stores information based on a magnetization state of a magnetic material. The fixed magnetization layer is provided for the storage layer through a tunnel insulating layer. The spin barrier layer suppresses diffusion of spin-polarized electrons and is provided on the side of the storage layer opposite the fixed magnetization layer. The spin absorption layer is formed of a nonmagnetic metal layer causing spin pumping and provided on the side of the spin barrier layer opposite the storage layer. A direction of magnetization in the storage layer is changed by passing current in a layering direction to inject spin-polarized electrons so that information is recorded in the storage layer and the spin barrier layer includes at least a material selected from oxides, nitrides, and fluorides.Type: GrantFiled: October 14, 2015Date of Patent: August 8, 2017Assignee: Sony CorporationInventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Tetsuya Yamamoto, Kazutaka Yamane, Yuki Oishi, Hiroshi Kano
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Publication number: 20170186945Abstract: A magnetic element is provided. The magnetic element includes a free magnetization layer having a surface area that is approximately 1,600 nm2 or less, the free magnetization layer including a magnetization state that is configured to be changed; an insulation layer coupled to the free magnetization layer, the insulation layer including a non-magnetic material; and a magnetization fixing layer coupled to the insulation layer opposite the free magnetization layer, the magnetization fixing layer including a fixed magnetization so as to be capable of serving as a reference of the free magnetization layer.Type: ApplicationFiled: March 14, 2017Publication date: June 29, 2017Inventors: Kazutaka YAMANE, Masanori HOSOMI, Hiroyuki OHMORI, Kazuhiro BESSHO, Yutaka HIGO, Tetsuya ASAYAMA, Hiroyuki UCHIDA
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Publication number: 20170125664Abstract: A bottom pinned perpendicular magnetic tunnel junction (pMTJ) with high TMR which can withstand high temperature back-end-of-line (BEOL) processing is disclosed. The pMTJ includes a composite spacer layer between a SAF layer and a reference layer of the fixed magnetic layer of the pMTJ. The composite spacer layer includes a first non-magnetic (NM) spacer layer, a magnetic (M) spacer layer disposed over the first NM spacer layer and a second NM spacer layer disposed over the M layer. The M layer is a magnetically continuous amorphous layer, which provides a good template for the reference layer.Type: ApplicationFiled: October 31, 2016Publication date: May 4, 2017Inventors: Taiebeh TAHMASEBI, Vinayak Bharat NAIK, Kangho LEE, Chim Seng SEET, Kazutaka YAMANE
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Patent number: 9634239Abstract: A magnetic element is provided. The magnetic element includes a free magnetization layer having a surface area that is approximately 1,600 nm2 or less, the free magnetization layer including a magnetization state that is configured to be changed; an insulation layer coupled to the free magnetization layer, the insulation layer including a non-magnetic material; and a magnetization fixing layer coupled to the insulation layer opposite the free magnetization layer, the magnetization fixing layer including a fixed magnetization so as to be capable of serving as a reference of the free magnetization layer.Type: GrantFiled: October 11, 2016Date of Patent: April 25, 2017Assignee: Sony CorporationInventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida