Patents by Inventor Kazutaka Yoshizawa
Kazutaka Yoshizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20080030608Abstract: An electronic camera includes an imager capturing an object scene. When a shutter button is operated in a camera mode, a CPU records image data representative of the object scene captured by the imager in a memory card. The CPU further-notifies support information describing a processable resolution to an external PC under a USB capturing mode. When the shutter button is operated under the USB capturing mode, shutter button information representative of “on state” is output to the external PC. The CPU further inputs image data sent back from the external PC in response to the shutter button information representative of “on state”. The input image data is recorded in the memory card by the CPU.Type: ApplicationFiled: July 11, 2007Publication date: February 7, 2008Applicant: SANYO Electric Co., Ltd.Inventors: Kazutaka Yoshizawa, Yasushi Handa, Susumu Nozaki, Masao Imoto
-
Publication number: 20070035778Abstract: An electronic camera includes an imaging device. The imaging device carries out an exposing operation for exposing an object scene and an amplifying operation for amplifying a raw image signal generated by the exposing operation, according to a set imaging parameter. A CPU selects one program chart satisfying a parameter condition, from a plurality of program charts stored in a flash memory, and extracts three imaging parameters from the selected program chart. The extracted imaging parameters are set to the imaging device. The imaging parameter here includes exposure time, amount of aperture, and AGC gain as parameter elements. In addition, the parameter condition includes an AGC gain condition in that each of three AGC gains defining respectively the three imaging parameters is equal to or less than a predetermined value and an exposure time condition in that three exposure times defining respectively the three imaging parameters are shorter.Type: ApplicationFiled: August 8, 2006Publication date: February 15, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Kazutaka Yoshizawa, Kohei Fukukawa, Kazuhiro Tsujino
-
Publication number: 20070013011Abstract: An interlayer insulation film is etched to form contact holes in an integrated circuit part. At this time, a trench is not formed in a guard ring part. Subsequently, ion implantation is carried out in source/drain regions in a peripheral circuit part for contact compensation, and high-temperature annealing is carried out in order to activate implanted impurities. Subsequently, an interlayer insulation film, a storage capacitor, and another interlayer insulation film are formed in sequence. Then, contact holes reaching a part of wiring layers are formed in the peripheral circuit part while, in the guard ring part, a trench reaching a diffusion layer is formed. Next, a barrier metal film is formed in each of the contact holes and the trench, and further, a contact plug comprising, for example, a W film is buried therein.Type: ApplicationFiled: September 25, 2006Publication date: January 18, 2007Applicant: FUJITSU LIMITEDInventors: Kazutaka Yoshizawa, Kazuki Sato, Shinichiroh Ikemasu
-
Patent number: 7157330Abstract: A semiconductor device comprising: a first insulation film 60 formed above a base substrate 10; a second insulation film 61 formed on the first insulation film and having different etching characteristics from the first insulation film; and a capacitor 79 including a storage electrode 68 formed on the second insulation film, projected therefrom, the storage electrode being formed, extended downward from side surfaces of the second insulation film. The lower ends of the storage electrodes are formed partially below the etching stopper film, whereby the storage electrodes are fixed by the etching stopper film. Accordingly, the storage electrodes are prevented from peeling off in processing, such as wet etching, etc. The semiconductor device can be fabricated at high yields.Type: GrantFiled: March 14, 2005Date of Patent: January 2, 2007Assignee: Fujitsu LimitedInventors: Osamu Tsuboi, Tomohiko Tsutsumi, Kazutaka Yoshizawa
-
Patent number: 7132720Abstract: An interlayer insulation film is etched to form contact holes in an integrated circuit part. At this time, a trench is not formed in a guard ring part. Subsequently, ion implantation is carried out in source/drain regions in a peripheral circuit part for contact compensation, and high-temperature annealing is carried out in order to activate implanted impurities. Subsequently, an interlayer insulation film, a storage capacitor, and another interlayer insulation film are formed in sequence. Then, contact holes reaching a part of wiring layers are formed in the peripheral circuit part while, in the guard ring part, a trench reaching a diffusion layer is formed. Next, a barrier metal film is formed in each of the contact holes and the trench, and further, a contact plug comprising, for example, a W film is buried therein.Type: GrantFiled: August 29, 2003Date of Patent: November 7, 2006Assignee: Fujitsu LimitedInventors: Kazutaka Yoshizawa, Kazuki Sato, Shinichiroh Ikemasu
-
Patent number: 6921693Abstract: A semiconductor device comprising: a first insulation film 60 formed above a base substrate 10; a second insulation film 61 formed on the first insulation film and having different etching characteristics from the first insulation film; and a capacitor 79 including a storage electrode 68 formed on the second insulation film, projected therefrom, the storage electrode being formed, extended downward from side surfaces of the second insulation film. The lower ends of the storage electrodes are formed partially below the etching stopper film, whereby the storage electrodes are fixed by the etching stopper film. Accordingly, the storage electrodes are prevented from peeling off in processing, such as wet etching, etc. The semiconductor device can be fabricated at high yields.Type: GrantFiled: June 26, 2002Date of Patent: July 26, 2005Assignee: Fujitsu LimitedInventors: Osamu Tsuboi, Tomohiko Tsutsumi, Kazutaka Yoshizawa
-
Publication number: 20050158962Abstract: A semiconductor device comprising: a first insulation film 60 formed above a base substrate 10; a second insulation film 61 formed on the first insulation film and having different etching characteristics from the first insulation film; and a capacitor 79 including a storage electrode 68 formed on the second insulation film, projected therefrom, the storage electrode being formed, extended downward from side surfaces of the second insulation film. The lower ends of the storage electrodes are formed partially below the etching stopper film, whereby the storage electrodes are fixed by the etching stopper film. Accordingly, the storage electrodes are prevented from peeling off in processing, such as wet etching, etc. The semiconductor device can be fabricated at high yields.Type: ApplicationFiled: March 14, 2005Publication date: July 21, 2005Applicant: FUJITSU LIMITEDInventors: Osamu Tsuboi, Tomohiko Tsutsumi, Kazutaka Yoshizawa
-
Publication number: 20040042285Abstract: An interlayer insulation film is etched to form contact holes in an integrated circuit part. At this time, a trench is not formed in a guard ring part. Subsequently, ion implantation is carried out in source/drain regions in a peripheral circuit part for contact compensation, and high-temperature annealing is carried out in order to activate implanted impurities. Subsequently, an interlayer insulation film, a storage capacitor, and another interlayer insulation film are formed in sequence. Then, contact holes reaching a part of wiring layers are formed in the peripheral circuit part while, in the guard ring part, a trench reaching a diffusion layer is formed. Next, a barrier metal film is formed in each of the contact holes and the trench, and further, a contact plug comprising, for example, a W film is buried therein.Type: ApplicationFiled: August 29, 2003Publication date: March 4, 2004Applicant: FUJITSU LIMITEDInventors: Kazutaka Yoshizawa, Kazuki Sato, Shinichiroh Ikemasu
-
Publication number: 20030089993Abstract: A first insulating film consisting of an insulating material is formed on a major surface of a semiconductor substrate. On the first insulating film, a wire comprising a first conductive layer, which contains one of elemental Ti and a Ti compound, is formed. Cover films consisting of silicon nitride cover the upper surface, the bottom surface, and the side surfaces of the wire having a multilayer structure. Accordingly, a semiconductor device in which insulation defects are unlikely to occur even when the degree of integration is increased can be provided.Type: ApplicationFiled: February 22, 2002Publication date: May 15, 2003Applicant: Fujitsu LimitedInventors: Kazutaka Yoshizawa, Shinichiroh Ikemasu
-
Publication number: 20020167039Abstract: A semiconductor device comprising: a first insulation film 60 formed above a base substrate 10; a second insulation film 61 formed on the first insulation film and having different etching characteristics from the first insulation film; and a capacitor 79 including a storage electrode 68 formed on the second insulation film, projected therefrom, the storage electrode being formed, extended downward from side surfaces of the second insulation film. The lower ends of the storage electrodes are formed partially below the etching stopper film, whereby the storage electrodes are fixed by the etching stopper film. Accordingly, the storage electrodes are prevented from peeling off in processing, such as wet etching, etc. The semiconductor device can be fabricated at high yields.Type: ApplicationFiled: June 26, 2002Publication date: November 14, 2002Applicant: Fujitsu LimitedInventors: Osamu Tsuboi, Tomohiko Tsutsumi, Kazutaka Yoshizawa
-
Patent number: 6459112Abstract: A semiconductor device comprising: a first insulation film 60 formed above a base substrate 10; a second insulation film 61 formed on the first insulation film and having different etching characteristics from the first insulation film; and a capacitor 79 including a storage electrode 68 formed on the second insulation film, projected therefrom, the storage electrode being formed, extended downward from side surfaces of the second insulation film. The lower ends of the storage electrodes are formed partially below the etching stopper film, whereby the storage electrodes are fixed by the etching stopper film. Accordingly, the storage electrodes are prevented from peeling off in processing, such as wet etching, etc. The semiconductor device can be fabricated at high yields.Type: GrantFiled: January 20, 2000Date of Patent: October 1, 2002Assignee: Fujitsu LimitedInventors: Osamu Tsuboi, Tomohiko Tsutsumi, Kazutaka Yoshizawa
-
Patent number: 5679294Abstract: A high purity .alpha.-tricalcium phosphate ceramic having a superior biocompatibility for use mainly as a bone filler, is produced by shaping a powder material formed by a wet method, followed by sintering it and then cooling at a predetermined rate.Type: GrantFiled: March 1, 1995Date of Patent: October 21, 1997Assignee: Kabushiki Kaisya AdvanceInventors: Yoshikazu Umezu, Osamu Hayashi, Kazutaka Yoshizawa