Patents by Inventor Kazuto Ikeda

Kazuto Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070084425
    Abstract: If it is determined that an engine has been started, an engine coolant temperature is detected. If the engine coolant temperature is equal to or lower than a threshold value, the catalyst quick warm-up control is started to retard ignition timing, and a signal indicating a command to increase an operate angle is transmitted to a VVLA controller. When a VVT hydraulic pressure is increased to a predetermined value, a signal indicating a command to decrease the operate angle is transmitted to the VVLA controller, and a signal indicating a command to advance open timing of an intake valve is transmitted to a VVT controller so that the open timing of the intake valve is not changed. If the engine coolant temperature is equal to or higher than a threshold value, the catalyst quick warm-up control ends, and the ignition timing is returned to normal timing.
    Type: Application
    Filed: October 3, 2006
    Publication date: April 19, 2007
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Kiyoo Hirose, Kazuto Ikeda, Hiroshi Morita
  • Publication number: 20060220143
    Abstract: Patterning is performed in such a manner that an end portion fabricated of a second gate insulating film partially overlaps an end portion fabricated of a first gate insulating film. Then, a surface recovery treatment is performed in the aforementioned state where the first and second gate insulating films partially overlap each other.
    Type: Application
    Filed: July 27, 2005
    Publication date: October 5, 2006
    Applicant: FUJITSU LIMITED
    Inventor: Kazuto Ikeda
  • Publication number: 20060214243
    Abstract: A permeation preventing film of a silicon nitride film 16 is inserted between a silicon substrate 10 and a High-k gate insulation film 18 to thereby prevent the High-k gate insulation film 18 from being deprived of oxygen, while oxygen anneal is performed after a gate electrode layer 20 has been formed to thereby supplement oxygen. The silicon nitride film 16, which is the permeation preventing film, becomes a silicon oxide nitride film 17 without changing the film thickness, whereby characteristics deterioration of the High-k gate insulation film 18 due to the oxygen loss can be prevented without lowering the performance of the transistor. The semiconductor device having the gate insulation film formed of even a high dielectric constant material can be free from the shift of the threshold voltage.
    Type: Application
    Filed: July 28, 2005
    Publication date: September 28, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Tsunehisa Sakoda, Masaomi Yamaguchi, Hiroshi Minakata, Yoshihiro Sugita, Kazuto Ikeda
  • Publication number: 20060172498
    Abstract: A semiconductor device manufacture method has the steps of: (a) forming an interface layer of SiO or SiON on the surface of an active region of a silicon substrate; (b) forming a high dielectric constant gate insulating film such as HfSiON having a dielectric constant higher than that of silicon oxide, above the interface layer; (c) forming a gate electrode of polysilicon above the high dielectric constant gate insulating film; (d) passivating the substrate surface at least before or after the high dielectric constant gate insulating film is formed; (e) forming an insulated gate electrode structure by patterning at least the gate electrode and the high dielectric constant gate insulating film; and (f) forming source/drain regions in the active region on both sides of the insulated gate electrode structure. The semiconductor device has the high dielectric constant insulating film having a dielectric constant higher than that of silicon oxide.
    Type: Application
    Filed: June 9, 2005
    Publication date: August 3, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Masaomi Yamaguchi, Hiroshi Minakata, Tsunehisa Sakoda, Kazuto Ikeda
  • Patent number: 7011734
    Abstract: A method of manufacturing a semiconductor device has the steps of: (a) evacuating a sputtering chamber to a pressure of 1.5×10?8 torr to 9×10?8 torr and heating a silicon substrate to a temperature of 330° C. to 395° C.; (b) sputtering Co on the heated silicon substrate; (c) after the step (b), forming a cap layer having a small oxygen transmission performance on the silicon substrate without exposing the silicon substrate in air; (d) after the step (c), performing primary annealing; (e) after the step (d), removing the cap layer and unreacted Co; and (f) after the step (e), performing secondary annealing by heating the silicon substrate to a temperature of 450° C. to 750° C.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: March 14, 2006
    Assignee: Fujitsu Limited
    Inventor: Kazuto Ikeda
  • Publication number: 20060042067
    Abstract: Each of a pair of side members (4) is located relative to an underbody (3) using two locators (16). Each locator is lowered by a lifter (15) and placed on a slide base (18). The slide base is movable along a slide guide (17) toward and away from a transfer conveyor (11).
    Type: Application
    Filed: October 17, 2003
    Publication date: March 2, 2006
    Applicant: DAIHATSU MOTOR CO., LTD.
    Inventors: Shinobu Inoue, Masaharu Saito, Akiyoshi Hazama, Yasuhiro Hosokawa, Takuma Arai, Isao Kita, Takuji Izutani, Kazuto Ikeda
  • Publication number: 20060037185
    Abstract: A roof panel (31) is pre-set on the left and right side members (4) fixed to an underbody of a car. A roof panel spot welding station (7) includes a pair of frames (34) and two joisted-locating jigs (35, 36) bridging the frames. Each of the joisted-locating jigs is furnished with a clamp mechanism for holding the roof panel. The roof panel is located to the side members by the locating jigs, and spot-welded to the side members.
    Type: Application
    Filed: October 17, 2003
    Publication date: February 23, 2006
    Inventors: Shinobu Inoue, Masaharu Saito, Akiyoshi Hazama, Yasuhiro Hosokawa, takuma Arai, Isao Kita, Takuji Izutani, Kazuto Ikeda
  • Publication number: 20050017057
    Abstract: Objectives of the present invention are to reduce the size and weight of side-member and roofjigs, and to simplify analysis of problems related to ease-of-assembly of vehicle body roofs and side-members. In a first step, using clamping jigs 11-1 through 11-4, a left and right pair of side-members 4 are positioned with respect to an underbody 3 (that was positioned at a prescribed position in a vehicle body assembly line 2), and welded in place. Continuing in a second step, after the clamping jigs 11-1 through 11-4 have been released, a roof 31 is placed on upper welding edges of the left and right side-members 4 while being positioned using suspension jigs 35 and 36, after which it is welded in place.
    Type: Application
    Filed: October 1, 2002
    Publication date: January 27, 2005
    Inventors: Jyunji Motomi, Isao Kita, Tadao Nasu, Takuji Izutani, Kaname Akagi, Kazuto Ikeda, Hiromichi Arayama
  • Publication number: 20040092123
    Abstract: A method of manufacturing a semiconductor device has the steps of: (a) evacuating a sputtering chamber to a pressure of 1.5×10−8 torr to 9×10−8 torr and heating a silicon substrate to a temperature of 330° C. to 395° C.; (b) sputtering Co on the heated silicon substrate; (c) after the step (b), forming a cap layer having a small oxygen transmission performance on the silicon substrate without exposing the silicon substrate in air; (d) after the step (c), performing primary annealing; (e) after the step (d), removing the cap layer and unreacted Co; and (f) after the step (e), performing secondary annealing by heating the silicon substrate to a temperature of 450° C. to 750° C.
    Type: Application
    Filed: October 16, 2003
    Publication date: May 13, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Kazuto Ikeda
  • Patent number: 4931425
    Abstract: A thin film of a high temperature superconductive oxide of rare earth metal-alkali earth metal-copper-oxygen system or group VA metal-alkali earth metal-copper-oxygen system, which has an excellent crystallinity, particularly a single crystalline structure, is formed on a substrate by a CVD method, in which halides of the metals and an oxygen source gas are separately flowed over a substrate and caused to react with each other over the substrate, to deposit a desired superconducting oxide film.
    Type: Grant
    Filed: September 27, 1988
    Date of Patent: June 5, 1990
    Assignee: Fujitsu Limited
    Inventors: Takafumi Kimura, Hideki Yamawaki, Kazuto Ikeda, Masaru Ihara