Abstract: A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip is corrected and the board is connected, the bumps are compressed, and the insulating resin is hardened.

Abstract: The carrier frame relating to the present invention comprises a base layer member, a frame layer member, and a positioning layer member having multiple openings for storing electronic components. A spring layer member is mounted in a hollow part surrounded by the frame layer member between the positioning layer member and the base layer member. At each opening of the spring layer member, a small spring providing an elastic force for fastening the electronic components between an edge of the corresponding opening of the positioning layer member and the small spring is formed integrally with the spring layer member. At one end in the longitudinal direction of the spring layer member, a large spring providing an elastic force along the longitudinal direction by being in contact with an inner surface of the frame layer member in the mounted state is formed integrally with the spring layer member.

Abstract: An apparatus and a method for surface treatment of substrates whereby the quality of substrates can be maintained by preventing excessive plasma treatment of substrates. In carrying out the plasma treatment on a surface of the substrate in a reaction chamber, there are provided an emission spectroscopic analysis device or a mass analyzer, and a controller, so that the energy of ions in plasma is controlled to decrease when, e.g., bromine included in the substrate is detected, and the surface treatment to the substrate is controlled to stop when the removal of impurities of the substrate is detected to end. The bromine once separated from the substrate is prevented from adhering again to the substrate and corroding the substrate. Moreover, ions are prevented from being excessively irradiated to the substrate when the removal of impurities ends, thereby reducing damage to the substrate.

Abstract: A 3D circuit module which is highly reliable, easily layered and able to mount electronic components in high density is obtained by providing a support member having a frame in the periphery thereof and a recess; a coating layer for coating the frame and filling in the recess, the coating layer being made of resin material which is adhesive and has a softening temperature lower than the softening temperature of the support member; a wiring pattern formed on the coating layer, the wiring pattern including a first land on the frame, a second land on the recess, and a wiring part for connecting between the first land and the second land; and an electronic component having a projecting electrode formed on a side thereof, the electronic component being bonded to the coating layer and accommodated in the recess, with the projecting electrode connected to the second land.

Abstract: A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.

Abstract: A stereoscopically connected structure is made up of a first circuit board and a second circuit board which are mounted with other electronic components, and a relay board having a recess which is mounted with an electronic component and is provided with a lead-out wiring extending from the electronic component, and also having a land part to be connected with the lead-out wiring on one of the surfaces of the relay board that face the first circuit board and second circuit board. Thus the relay board can mount the electronic component thereon as well as connect the first circuit board and the second circuit board, thereby achieving high density mounting.

Abstract: A stereoscopically connected structure is made up of a first circuit board and a second circuit board which are mounted with other electronic components, and a relay board having a recess which is mounted with an electronic component and is provided with a lead-out wiring extending from the electronic component, and also having a land part to be connected with the lead-out wiring on one of the surfaces of the relay board that face the first circuit board and second circuit board. Thus the relay board can mount the electronic component thereon as well as connect the first circuit board and the second circuit board, thereby achieving high density mounting.

Abstract: The carrier frame relating to the present invention comprises a base layer member, a frame layer member, and a positioning layer member having multiple openings for storing electronic components. A spring layer member is mounted in a hollow part surrounded by the frame layer member between the positioning layer member and the base layer member. At each opening of the spring layer member, a small spring providing an elastic force for fastening the electronic components between an edge of the corresponding opening of the positioning layer member and the small spring is formed integrally with the spring layer member. At one end in the longitudinal direction of the spring layer member, a large spring providing an elastic force along the longitudinal direction by being in contact with an inner surface of the frame layer member in the mounted state is formed integrally with the spring layer member.

Abstract: It is possible to prevent deterioration of a soldering portion and improve strength of thermal fatigue resistance by providing barrier metal layers on at least one of lead and land to cover parent materials comprising Cu-containing materials, feeding a soldering material between the lead and the land and allowing to contact in a fused condition with barrier metal layers and solidify, and thus soldering together the lead and the land.

Abstract: An electronic component and a circuit formation article are bonded together with a bonding material containing resin interposed therebetween. In a state that bumps of an electronic-component bonding region and electrodes of the circuit formation article are in mutual electrical contact, the electronic component and the circuit formation article are thermocompression-bonded to each other upon curing of the bonding material. A bonding-material flow regulating member of the electronic-component bonding region regulates flow of the bonding material toward a peripheral portion of the electronic-component bonding region during bonding of the circuit formation article to the electronic component.

Abstract: An electronic component mounting method comprising: supplying an unhardened reinforcing resin on a circuit substrate; supplying a solder paste on bond areas of the circuit substrate on which electrodes of the electronic components are to be bonded; placing the electronic components on the circuit substrate; and heating and then cooling the circuit substrate with the reinforcing resin, the solder paste, and the electronic components carried thereon. The mounting method enables mounting of components with high joint reliability, while incorporating the conventional surface mount process steps. The method may also be applied to the mounting of smaller electronic components with narrower pitch without deteriorating productivity or mounting quality.

Abstract: An apparatus and a method for surface treatment of substrates whereby the quality of substrates can be maintained by preventing excessive plasma treatment of substrates. In carrying out the plasma treatment on a surface of the substrate in a reaction chamber, there are provided an emission spectroscopic analysis device or a mass analyzer, and a controller, so that the energy of ions in plasma is controlled to decrease when, e.g., bromine included in the substrate is detected, and the surface treatment to the substrate is controlled to stop when the removal of impurities of the substrate is detected to end. The bromine once separated from the substrate is prevented from adhering again to the substrate and corroding the substrate. Moreover, ions are prevented from being excessively irradiated to the substrate when the removal of impurities ends, thereby reducing damage to the substrate.

Abstract: A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.

Abstract: The present invention includes a plurality of lead terminals made of a conductive material having spring elasticity; and insulative housing that buries a part of the region of lead terminal and fixedly retains a plurality of lead terminals in an arrangement having been set in advance. Lead terminal is composed of a buried part that is a part of lead terminal buried in housing; bottom end joint that is extended from one end of the buried part, is exposed through bottom end surface of housing, and extracted in width direction of bottom end surface; and flexibly changing part that is exposed from another end of the buried part through one wall surface orthogonal to bottom end surface, and is extended along this wall surface to top end surface facing to bottom end surface, being spaced from wall surface and top end surface.

Abstract: A semiconductor element mounting method is provided with high productivity. The method includes forming bumps on electrodes of a wafer in which a plurality of semiconductor elements have been formed, temporarily compression-bonding the wafer and an interposer via an insulative resin, curing the resin by performing heating and pressurization so that the wafer and the interposer are finally compression-bonded, wherein the electrodes of the wafer and electrodes of the interposer are bonded to each other, respectively, and wherein insulative resin overflowing from between the wafer and the interposer flows into grooves disposed so as to be coincident with dicing lines of the wafer, thus providing a uniform flow of the insulative resin, and thereafter, cutting and separating this bonded unit into individual semiconductor elements.

Abstract: A 3D circuit module which is highly reliable, easily layered and able to mount electronic components in high density is obtained by providing a support member having a frame in the periphery thereof and a recess; a coating layer for coating the frame and filling in the recess, the coating layer being made of resin material which is adhesive and has a softening temperature lower than the softening temperature of the support member; a wiring pattern formed on the coating layer, the wiring pattern including a first land on the frame, a second land on the recess, and a wiring part for connecting between the first land and the second land; and an electronic component having a projecting electrode formed on a side thereof, the electronic component being bonded to the coating layer and accommodated in the recess, with the projecting electrode connected to the second land.

Abstract: When mounting an IC chip on a circuit board, bumps are formed on electrodes of the IC chip, and the bumps and the electrodes of the circuit board are aligned in position with each other with interposition of an insulative thermosetting resin having no conductive particle between the electrodes of the circuit board and the bumps. The IC chip is pressed against the circuit board with a pressure force of not smaller than 20 gf per bump by a heated head so as to perform warp correction of the IC chip and the board, while the resin interposed between the IC chip and the circuit board is hardened to bond the IC chip and the circuit board together.

Abstract: The present invention includes a plurality of lead terminals made of a conductive material having spring elasticity; and insulative housing that buries a part of the region of lead terminal and fixedly retains a plurality of lead terminals in an arrangement having been set in advance. Lead terminal is composed of a buried part that is a part of lead terminal buried in housing; bottom end joint that is extended from one end of the buried part, is exposed through bottom end surface of housing, and extracted in width direction of bottom end surface; and flexibly changing part that is exposed from another end of the buried part through one wall surface orthogonal to bottom end surface, and is extended along this wall surface to top end surface facing to bottom end surface, being spaced from wall surface and top end surface.

Abstract: A method for manufacturing a semiconductor device whereby semiconductor elements like semiconductor bare chips are mounted with high productivity on both surfaces of a circuit board while preventing the board from warping, and an apparatus for manufacturing a semiconductor device for faithfully embodying the manufacturing method. Semiconductor elements temporarily fixed on both surfaces of a circuit board are heated while being pressurized in directions to be each pressed against the board, whereby adhesive on both surfaces of the board is thermally set simultaneously and bumps on each semiconductor elements are press-bonded to their opposing board electrodes on the board to be electrically connected. Ultraviolet rays are irradiated to a circumference of mixed curing adhesive applied to at least one surface of the circuit board to form an ultraviolet curing part only on the circumference of the adhesive, thereby increasing strength for temporarily fixing the semiconductor elements to the circuit board.

Abstract: A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.