Patents by Inventor Kazutoyo Takano

Kazutoyo Takano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100062599
    Abstract: A method for manufacturing a semiconductor device includes the steps of forming a P-type region on a surface of a semiconductor substrate, forming at least one Al electrode on the P-type region, forming an interlayer film in contact with the at least one Al electrode, the interlayer film being of a material which is less reactive with Si than is Al, and forming a semi-insulating film on the interlayer film, the semi-insulating film containing Si.
    Type: Application
    Filed: March 2, 2009
    Publication date: March 11, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazutoyo Takano, Junichi Murakami, Tadaharu Minato
  • Publication number: 20080315249
    Abstract: A semiconductor substrate has a trench in a first main surface. An insulated gate field effect part includes a gate electrode formed in the first main surface. A potential fixing electrode fills the trench and has an expanding part expanding on the first main surface so that a width thereof is larger than the width of the trench. An emitter electrode is formed on the first main surface and insulated from the gate electrode electrically and connected to a whole upper surface of the expanding part of the potential fixing electrode. Thus, a semiconductor device capable of enhancing reliability in order to prevent an aluminum spike from generating and a manufacturing method thereof can be provided.
    Type: Application
    Filed: December 14, 2007
    Publication date: December 25, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Tadaharu Minato, Kazutoyo Takano
  • Patent number: 6388280
    Abstract: The object of the invention is to improve a characteristic under a reverse bias. A P base layer (6) is provided as a plurality of band-shaped portions parallel with each other. A P+ base layer to be a downward protrusion having a high impurity concentration is not formed in a bottom portion of the P base layer (6). The P base layer (6) is formed more shallowly than an N layer (17), and furthermore, the band-shaped portions forming the P base layer (6) are coupled to each other at ends thereof. Moreover, an N source layer (5) is ladder-shaped and is connected to a source electrode (16) through only a crosspiece portion thereof.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: May 14, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Kazunari Hatade, Kazutoyo Takano
  • Publication number: 20010050383
    Abstract: The object of the invention is to improve a characteristic under a reverse bias. A P base layer (6) is provided as a plurality of band-shaped portions parallel with each other. A P+ base layer to be a downward protrusion having a high impurity concentration is not formed in a bottom portion of the P base layer (6). The P base layer (6) is formed more shallowly than an N layer (17), and furthermore, the band-shaped portions forming the P base layer (6) are coupled to each other at ends thereof. Moreover, an N source layer (5) is ladder-shaped and is connected to a source electrode (16) through only a crosspiece portion thereof.
    Type: Application
    Filed: April 17, 2001
    Publication date: December 13, 2001
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Kazunari Hatade, Kazutoyo Takano