Patents by Inventor Kazuyasu Nishikawa

Kazuyasu Nishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10418295
    Abstract: A power module includes an insulated circuit board, a semiconductor element, a first buffer plate, and first and second joining materials. The semiconductor element is disposed on a side of one main surface of the insulated circuit board. The first buffer plate is disposed between the insulated circuit board and the semiconductor element. The first joining material is divided into a plurality of portions in a plan view. The first buffer plate is higher in coefficient of linear expansion than the semiconductor element and lower in coefficient of linear expansion than the insulated circuit board. The first buffer plate is lower in Young's modulus than the semiconductor element.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: September 17, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Shinnosuke Soda, Narihito Ota, Kazuyasu Nishikawa, Akihisa Fukumoto
  • Patent number: 10181445
    Abstract: A power module includes a power semiconductor element, an interconnection material, a circuit board, an external terminal, a joining material, and a sealing resin. A clearance portion is continuously formed between the sealing resin and each of an end surface of the joining material and a surface of the interconnection material so as to extend from the end surface of the joining material to the surface of the interconnection material, the end surface of the joining material being located between the power semiconductor element and the interconnection material, the surface of the interconnection material being located between the end surface and a predetermined position of the interconnection material separated by a distance from the end surface.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: January 15, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihisa Fukumoto, Tetsu Negishi, Kei Yamamoto, Toshiaki Shinohara, Kazuyasu Nishikawa
  • Publication number: 20180366383
    Abstract: A power module includes an insulated circuit board, a semiconductor element, a first buffer plate, and first and second joining materials. The semiconductor element is disposed on a side of one main surface of the insulated circuit board. The first buffer plate is disposed between the insulated circuit board and the semiconductor element. The first joining material is divided into a plurality of portions in a plan view. The first buffer plate is higher in coefficient of linear expansion than the semiconductor element and lower in coefficient of linear expansion than the insulated circuit board. The first buffer plate is lower in Young's modulus than the semiconductor element.
    Type: Application
    Filed: November 4, 2016
    Publication date: December 20, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori YOKOYAMA, Shinnosuke SODA, Narihito OTA, Kazuyasu NISHIKAWA, Akihisa FUKUMOTO
  • Publication number: 20170352629
    Abstract: A power module includes a power semiconductor element, an interconnection material, a circuit board, an external terminal, a joining material, and a sealing resin. A clearance portion is continuously formed between the sealing resin and each of an end surface of the joining material and a surface of the interconnection material so as to extend from the end surface of the joining material to the surface of the interconnection material, the end surface of the joining material being located between the power semiconductor element and the interconnection material, the surface of the interconnection material being located between the end surface and a predetermined position of the interconnection material separated by a distance from the end surface.
    Type: Application
    Filed: September 29, 2015
    Publication date: December 7, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akihisa FUKUMOTO, Tetsu NEGISHI, Kei YAMAMOTO, Toshiaki SHINOHARA, Kazuyasu NISHIKAWA
  • Patent number: 9508564
    Abstract: A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: November 29, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Kazuyo Endo, Jun Fujita, Shinnosuke Soda, Kazuyasu Nishikawa, Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue
  • Patent number: 9502954
    Abstract: A signal transmission circuit includes, in each of a first circuit connected to a first coil of an insulating transformer and a second circuit connected to a second coil of the insulating transformer, a transmitting circuit, a receiving circuit, a coil-side switching circuit, an input/output-side switching circuit, an abnormality detection circuit, a delay circuit, and a direction control section. In the signal transmission circuit, the direction control section controls the switching circuit to switch a signal direction between input and output, and the switching circuit switches between transmission and reception. The delay circuit delays a received signal and returns the resultant signal to the transmitting side, and the abnormality detection circuit detects abnormality to perform self-diagnosis.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: November 22, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Morokuma, Jun Tomisawa, Tetsuya Uchida, Kazuyasu Nishikawa
  • Patent number: 9396871
    Abstract: A transmitter circuit feeds to a transmitter coil, every time transmission data changes in logical value, a current signal in pulse form having a positive or negative polarity that is alternately inverted in response to each change in logical value; and a receiver circuit inputs induction voltage signals each being double pulses having both positive and negative polarities, which have been induced in a receiver coil by the current signal fed to the transmitter coil, to demodulate the transmission data. The receiver circuit includes: an amplifier that amplifies the induction voltage signals of double pulses induced in the receiver coil; and a signal generating unit that, when detecting first single pulses in the induction voltage signals of double pulses amplified by the amplifier, sets up an insensitive period for second single pulses therein, to generate an output signal corresponding to the transmission data, based solely on the first single pulses.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: July 19, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Morokuma, Jun Tomisawa, Kazuyasu Nishikawa
  • Publication number: 20150248966
    Abstract: A transmitter circuit feeds to a transmitter coil, every time transmission data changes in logical value, a current signal in pulse form having a positive or negative polarity that is alternately inverted in response to each change in logical value; and a receiver circuit inputs induction voltage signals each being double pulses having both positive and negative polarities, which have been induced in a receiver coil by the current signal fed to the transmitter coil, to demodulate the transmission data. The receiver circuit includes: an amplifier that amplifies the induction voltage signals of double pulses induced in the receiver coil; and a signal generating unit that, when detecting first single pulses in the induction voltage signals of double pulses amplified by the amplifier, sets up an insensitive period for second single pulses therein, to generate an output signal corresponding to the transmission data, based solely on the first single pulses.
    Type: Application
    Filed: December 4, 2012
    Publication date: September 3, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kenichi Morokuma, Jun Tomisawa, Kazuyasu Nishikawa
  • Publication number: 20150243530
    Abstract: A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.
    Type: Application
    Filed: July 19, 2013
    Publication date: August 27, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Kazuyo Endo, Jun Fujita, Shinnosuke Soda, Kazuyasu Nishikawa, Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue
  • Patent number: 9091565
    Abstract: A magnetic position detection apparatus includes a substrate, a magnet, a bridge circuit including first through fourth magneto-electric converting elements formed on the substrate, and a detection circuit. A substrate surface is substantially perpendicular to a magnet magnetization direction. The second and third magneto-electric converting elements are, when viewed along the magnet magnetization direction, disposed to be on or in the vicinity of a straight line passing through a center point of a magnetic pole of the magnet and parallel to a straight line perpendicular to both the magnet magnetization direction and the magnetic mobile object. The first and fourth magneto-electric converting elements are disposed so that, when not opposed to the magnetic mobile object, a component of a substrate of a magnetic field to be applied thereto is substantially same as that of a magnetic field to be applied to the second and third magneto-electric converting elements.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: July 28, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yuji Kawano, Hiroshi Kobayashi, Kazuyasu Nishikawa, Taisuke Furukawa
  • Patent number: 9091566
    Abstract: A differential amplifier generates an offset correction signal based on a rotation detection signal from a rotation detector apparatus and an offset signal. A comparator compares the offset correction signal with a threshold voltage, and outputs a binarized signal representing the comparison result. An average value signal generator circuit generates an average value signal representing the average value of the offset correction signal. The offset signal generator circuit generates the offset signal so that the signal voltage of the average value signal has a voltage value between a threshold voltage and a threshold voltage.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: July 28, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Manabu Tsukamoto, Kazuyasu Nishikawa, Takashi Tokunaga, Hideki Shimauchi, Yoshinori Tatenuma, Yuji Kawano, Hiroshi Kobayashi
  • Patent number: 8969960
    Abstract: A power semiconductor device includes a second conductive type sense outer-peripheral well formed to surround a plurality of sense wells on the surface of a drift layer, a first conductive type main-cell source region selectively formed on the surface of the main cell well, a first conductive type sense source region selectively formed on the surface of the sense well, a first conductive type capacitor lower electrode region selectively formed on the surface of the sense outer-peripheral well, a gate insulation film formed on the channel regions and on the sense outer-peripheral well, a gate electrode formed on the gate insulation film, and a sense pad electrically connected to the sense well and the sense source region as well as on the sense outer-peripheral well and the capacitor lower electrode region.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: March 3, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihiko Furukawa, Yasuhiro Kagawa, Naruhisa Miura, Masayuki Imaizumi, Kazuyasu Nishikawa
  • Patent number: 8816493
    Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: August 26, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
  • Publication number: 20140225114
    Abstract: A power semiconductor device includes a second conductive type sense outer-peripheral well formed to surround a plurality of sense wells on the surface of a drift layer, a first conductive type main-cell source region selectively formed on the surface of the main cell well, a first conductive type sense source region selectively formed on the surface of the sense well, a first conductive type capacitor lower electrode region selectively formed on the surface of the sense outer-peripheral well, a gate insulation film formed on the channel regions and on the sense outer-peripheral well, a gate electrode formed on the gate insulation film, and a sense pad electrically connected to the sense well and the sense source region as well as on the sense outer-peripheral well and the capacitor lower electrode region.
    Type: Application
    Filed: June 7, 2012
    Publication date: August 14, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akihiko Furukawa, Yasuhiro Kagawa, Naruhisa Miura, Masayuki Imaizumi, Kazuyasu Nishikawa
  • Publication number: 20140077280
    Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.
    Type: Application
    Filed: June 19, 2013
    Publication date: March 20, 2014
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
  • Patent number: 8497674
    Abstract: A magnetic detection apparatus includes a first comparison circuit that waveform-shapes the amplitude of a detection signal from magneto-electric transducers by DC coupling, a third comparison circuit that waveform-shapes the detection signal by AC coupling, an oscillation circuit having a natural frequency, a control circuit that counts the output of the first comparison circuit by using the oscillation means, and a selection circuit that selects the output of the first comparison means and the output of the second comparison means. The control circuit counts rising from the next rising or falling from the next falling of an output rectangular wave of the first comparison circuit, and provides output to the selection circuit at the time point at which the count value reaches a desired value. The selection circuit selects and outputs the output rectangular wave of the first comparison circuit or the third comparison circuit.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: July 30, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Tatenuma, Hideki Shimauchi, Masahiro Yokotani, Yuji Kawano, Hiroshi Kobayashi, Kazuyasu Nishikawa, Manabu Tsukamoto
  • Patent number: 8416022
    Abstract: A power amplifier device that satisfies both delivering a high output and reducing the chip area occupied by the power amplifier device. Over a substrate, are primary inductors arranged in a generally circular geometry, a ground pattern, transistor pairs, and a secondary inductor. The ground pattern extends from a portion of a region inside the circular primary inductor into regions outside the primary inductor, and grounded at a plurality of points in the regions outside the primary inductor. The primary inductors are coupled to the ground pattern through transistors.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: April 9, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tsuyoshi Kawakami, Kazuyasu Nishikawa
  • Publication number: 20130002242
    Abstract: A differential amplifier generates an offset correction signal based on a rotation detection signal from a rotation detector apparatus and an offset signal. A comparator compares the offset correction signal with a threshold voltage, and outputs a binarized signal representing the comparison result. An average value signal generator circuit generates an average value signal representing the average value of the offset correction signal. The offset signal generator circuit generates the offset signal so that the signal voltage of the average value signal has a voltage value between a threshold voltage and a threshold voltage.
    Type: Application
    Filed: November 29, 2010
    Publication date: January 3, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Manabu Tsukamoto, Kazuyasu Nishikawa, Takashi Tokunaga, Hideki Shimauchi, Yoshinori Tatenuma, Yuji Kawano, Hiroshi Kobayashi
  • Publication number: 20120262237
    Abstract: A power amplifier device that satisfies both delivering a high output and reducing the chip area occupied by the power amplifier device. Over a substrate, are primary inductors arranged in a generally circular geometry, a ground pattern, transistor pairs, and a secondary inductor. The ground pattern extends from a portion of a region inside the circular primary inductor into regions outside the primary inductor, and grounded at a plurality of points in the regions outside the primary inductor. The primary inductors are coupled to the ground pattern through transistors.
    Type: Application
    Filed: April 18, 2012
    Publication date: October 18, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Tsuyoshi KAWAKAMI, Kazuyasu Nishikawa
  • Publication number: 20120126797
    Abstract: A magnetic position detection apparatus includes a substrate, a magnet, a bridge circuit including first through fourth magneto-electric converting elements formed on the substrate, and a detection circuit. A substrate surface is substantially perpendicular to a magnet magnetization direction. The second and third magneto-electric converting elements are, when viewed along the magnet magnetization direction, disposed to be on or in the vicinity of a straight line passing through a center point of a magnetic pole of the magnet and parallel to a straight line perpendicular to both the magnet magnetization direction and the magnetic mobile object. The first and fourth magneto-electric converting elements are disposed so that, when not opposed to the magnetic mobile object, a component of a substrate of a magnetic field to be applied thereto is substantially same as that of a magnetic field to be applied to the second and third magneto-electric converting elements.
    Type: Application
    Filed: April 12, 2011
    Publication date: May 24, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yuji KAWANO, Hiroshi KOBAYASHI, Kazuyasu NISHIKAWA, Taisuke FURUKAWA