Patents by Inventor Kazuyoshi Yamada

Kazuyoshi Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5975833
    Abstract: An upper cover has a curved portion formed in its end portion on the side near a work front for avoiding interference with the work front. The curved portion comprises a recessed surface having a center axis aligned with the axis of a vertical pin of a swing post, a first stepped portion provided at a lower end of the recessed surface and defining a substantially constant gap with respect to a locus drawn by a rear projecting portion of the swing post when the work front is swung, and a second stepped portion provided in an intermediate portion of the recessed surface in the direction of height thereof and having a substantially horizontal surface for assuring a foothold. The recessed surface is configured to extend along a locus drawn by a back surface of the boom when the work front is swung in its minimum-turn posture, while defining a gap with respect to the locus.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: November 2, 1999
    Assignee: Hitachi Construction Machinery Co., Ltd.
    Inventors: Kazuyoshi Yamada, Masashi Kobori, Takaharu Nishimura
  • Patent number: 5130741
    Abstract: A DC power source light which is mountable to and dismountable from a camera body of a video camera is supplied with power from a battery provided in said camera body so that said DC power source light is made compact and light in weight. Further, either said camera body or said DC power source light has a unit for preventing excess discharge of said battery and a unit for preventing excess current when the switch is turned on, thereby to protect said battery.
    Type: Grant
    Filed: June 27, 1990
    Date of Patent: July 14, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Jiro Nishigaki, Takeshi Kawarai, Seiko Nakasuna, Yuichi Kosukegawa, Kazuyoshi Yamada, Yuuhei Abe
  • Patent number: 5129044
    Abstract: The position/force of a machine tool or robot end effecter having at least two degrees of freedom of movement is controlled. A first setting device sets the position command and/or posture command of the working tool on a machine. The instant position and/or posture of the working tool is detected. The force command and/or moment command for commanding the force and/or moment to be applied to the working tool is set, and the instant force and/or moment acting on the working tool is detected. A computing device determines from the position command and/or posture command and the instant position and/or posture, the position and/or posture offset in terms of the coordinate values of an operation coordinate system. A second computing device determines from the force command and/or moment command and the instant force and/or instant moment, force and/or moment offset in terms of the coordinate values of the operation coordinate system.
    Type: Grant
    Filed: February 28, 1989
    Date of Patent: July 7, 1992
    Assignee: Hitachi Construction Machinery Co., Ltd.
    Inventors: Kunio Kashiwagi, Toru Kurenuma, Shinsaku Tsutsui, Kazuyoshi Yamada
  • Patent number: 5105100
    Abstract: A master/slave flipflop comprises a master flipflop including a first inverter having an input for receiving an input signal, and a second inverter having an input connected to an output of the first inverter, and a first switch means connected between an output of the second inverter and the input of the first inventer. A slave flipflop of the master/slave flipflop includes a third inverter having an input for receiving an output signal of the master flipflop, and a fourth inverter having an input connected to an output of the third inverter, and a second switch means connected between an output of the fourth inverter and the input of the third inverter. A third switch is connected between the output of the second inverter and the input of the third inverter, and a fourth switch is connected between the output of the first inverter and the input of the third inverter.
    Type: Grant
    Filed: July 1, 1991
    Date of Patent: April 14, 1992
    Assignee: NEC Corporation
    Inventor: Kazuyoshi Yamada
  • Patent number: 5013999
    Abstract: A temperature-compensated voltage generating circuit suited for an output stage of a logical circuit is provided. The voltage generating circuit includes a bipolar transistor, a first resistor connected between the collector and the base of the bipolar transistor and a series circuit including a second resistor and a Schottky barrier diode and connected between the base and the emitter of the bipolar transistor. The temperature dependency of the base-emitter forward voltage of the bipolar transistor is offset by the temperature dependency of the forward voltage of the Schottky barrier diode by having the ratio of the resistances of the first and second resistors set based on a predetermined formula.
    Type: Grant
    Filed: January 11, 1990
    Date of Patent: May 7, 1991
    Assignee: NEC Corporation
    Inventor: Kazuyoshi Yamada
  • Patent number: 4987356
    Abstract: A profiling control system for a multiple-degree-of-freedom working machine having at least two degrees of freedom has at least one force control loop. The control loop has a detector for detecting the force applied to a working tool from a work surface, an error detector for determining the difference between the detected force and a command f.sub.ro of urging force of the working took, a processor for computing a velocity command u.sub.z of the working tool on the basis of the determined error, a drive system for moving the multiple-degree-of-freedom working machine on the basis of the velocity command. Further, the multiple-degree-of-freedom working machine is moved on the basis of a velocity command u.sub.x. The control system provides a moving velocity v.sub.zof in an urging direction of the working tool, which occurs as the result of a gradient tan .alpha. of the work surface with respect to a feed direction when the working tool is fed with the velocity command u.sub.
    Type: Grant
    Filed: October 13, 1989
    Date of Patent: January 22, 1991
    Assignee: Hitachi Construction Machinery Co., Ltd.
    Inventors: Kazuyoshi Yamada, Kunio Kashiwagi, Tooru Kurenuma
  • Patent number: 4914325
    Abstract: A circuit for synchronizing data pulses, comprises a D-type flip-flop and a set-reset type flip-flop. The D-type flip-flop is enabled by a system clock pulse train wherein the D-type flip flop conducts to product an output at a time controlled by the system clock pulse train if a data pulse is present, thereby synchronizing the data pulse with the system clock. The set-reset flip-flop is enabled by a second clock pulse train which lags after the system clock pulse train. The lag period is long enough to suppress transient conditions counsel by the leading edges of the system clock pulses. The set-reset flip-flop drives the D-type flip-flop.
    Type: Grant
    Filed: October 7, 1988
    Date of Patent: April 3, 1990
    Assignee: NEC Corporation
    Inventor: Kazuyoshi Yamada
  • Patent number: 4713561
    Abstract: A transistor circuit includes an input terminal, an output terminal, a first transistor having a collector connected to the output terminal, a second transistor having a collector-emitter passage connected between the collector of the first transistor and the input terminal, a PN junction element such as a diode or a base-emitter junction of another transistor, which is connected between the input terminal and the base of the first transistor, a first resistor connected between the emitter and base of the second transistor, and a second resistor connected between the base and collector of the second transistor.
    Type: Grant
    Filed: February 10, 1987
    Date of Patent: December 15, 1987
    Assignee: NEC Corporation
    Inventor: Kazuyoshi Yamada
  • Patent number: 4689497
    Abstract: In a master-slave type flip-flop circuit, a plurality of bipolar type transistors are used for master and slave flip-flop circuits, and transistors are connected such that glitch noise can be prevented under all input conditions.
    Type: Grant
    Filed: June 3, 1985
    Date of Patent: August 25, 1987
    Assignee: NEC Corporation
    Inventors: Yoshitaka Umeki, Kazuyoshi Yamada
  • Patent number: 4686395
    Abstract: A current switching type logic circuit is configured as a current switching circuit comprising a differential amplifier circuit and a constant current source. The differential amplifier circuit comprises a pair of transistors of which emitters are commonly connected to the constant current source. The current switching circuit is provided with two load resistors connected to the collectors of the transistors and two shunt circuits connected in parallel with the two load resistors, respectively, each shunt circuit comprising a diode and a resistor. In response to an input signal and a reference voltage applied to the bases of the transistors constituting the differential amplifier circuit, the current switching circuit effects a switching operation to produce a logic voltage as a voltage appearing across the load resistor.
    Type: Grant
    Filed: July 29, 1985
    Date of Patent: August 11, 1987
    Assignee: NEC Corporation
    Inventors: Fumihiko Sato, Kazuyoshi Yamada
  • Patent number: 4658205
    Abstract: A reference voltage generating circuit is constituted by a source of constant current, a power supply having high and low voltage terminals, an emitter follower circuit connected across the high and low voltage terminals, first and second resistors with their one ends respectively connected to the high voltage terminal and the output terminal of the source of constant current and the other ends connected to the input terminal of the emitter follower circuit, a third resistor with one end connected to the high voltage terminal, and a diode with its anode electrode connected to the other side of the third resistor and its cathode electrode connected to the output terminal of the source of constant current.
    Type: Grant
    Filed: August 7, 1985
    Date of Patent: April 14, 1987
    Assignee: NEC Corporation
    Inventor: Kazuyoshi Yamada
  • Patent number: D425108
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: May 16, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Masaaki Kabumoto, Kazuyoshi Yamada, Yoshihisa Minakawa, Taijiroh Sueishi, Goroh Katsuyama
  • Patent number: D426259
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: June 6, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Masaaki Kabumoto, Kazuyoshi Yamada, Yoshihisa Minakawa, Taijiroh Sueishi, Goroh Katsuyama
  • Patent number: D426260
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: June 6, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Masaaki Kabumoto, Kazuyoshi Yamada, Yoshihisa Minakawa, Taijiroh Sueishi, Goroh Katsuyama
  • Patent number: D428914
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: August 1, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Masaaki Kabumoto, Kazuyoshi Yamada, Yoshihisa Minakawa, Taijiroh Sueishi, Goroh Katsuyama
  • Patent number: D429275
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: August 8, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Masaaki Kabumoto, Kazuyoshi Yamada, Yoshihisa Minakawa, Taijiroh Sueishi, Goroh Katsuyama
  • Patent number: D429276
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: August 8, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Masaaki Kabumoto, Kazuyoshi Yamada, Yoshihisa Minakawa, Taijiroh Sueishi, Goroh Katsuyama