Patents by Inventor Kazuyuki Yamashita

Kazuyuki Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070196674
    Abstract: A bonded structure formed by bonding a first structure and a second structure at opposed bonding surfaces to form a microstructure or the like. At least one of the first structure and the second structure is formed of a resin composition including a polypropylene resin and a hydrogenated derivative of a block copolymer of the following general formula X-Y (X is a polymer block immiscible with the polypropylene resin, and Y is a conjugated diene elastomer polymer block). The bonding surfaces are bonded by heating an alkoxysilane or alkylsilane compound or a mixture prepared by adding a hydrogenated derivative of a block copolymer of the general formula X-Y to an alkoxysilane or alkylsilane compound applied to the bonding surface.
    Type: Application
    Filed: March 16, 2007
    Publication date: August 23, 2007
    Inventors: Kazuyuki Yamashita, Mieko Omotani, Takashi Onaga, Kiyokazu Himi
  • Publication number: 20070069752
    Abstract: An electronic device test apparatus for testing IC chips (IC) by pushing their input/output terminals (HB) against contact units of a test head, provided with an IC moving system (410) for picking up and moving an IC chip (IC) at the front surface where input/output terminals (HB) are led out, a first camera for capturing an image of the front surface of an IC chip (IC) before being picked up, a second camera for capturing an image of aback surface of an IC chip (IC) after being picked up, and an image processing system for calculating the position of input/output terminals (HB) of an IC chip (IC) picked up by the IC moving system (410) from the image information captured by the first camera and second camera and identifying the relative position of the IC chip (IC) picked up by the IC moving system (410) with respect to a contact unit based on the results of calculation, wherein the IC moving system (410) corrects the position of the IC chip based on the relative position of the input/output terminals (HB) o
    Type: Application
    Filed: May 28, 2004
    Publication date: March 29, 2007
    Inventors: Akihiko Ito, Kazuyuki Yamashita
  • Publication number: 20060290369
    Abstract: An electronic device test apparatus for testing IC chips (IC) by pushing their input/output terminals (HB) against contact units of a test head, provided with a test plate (110) compraised holders (113) for holding back surfaces of IC chips (IC) where no input/output terminals (HB) are led out with substantially smooth holding surfaces (114) larger than those back surfaces, and the test plate body (111) for holding the holders (113) in a manner rockable at the time of testing, the side surfaces (113b) of the holders (113) being guided by guide surfaces (153) provided in the vicinities of contact units (151) and the IC chips (IC) held by the holders (113) being pushed against contact pins of the contact units (151).
    Type: Application
    Filed: May 28, 2004
    Publication date: December 28, 2006
    Inventors: Kazuyuki Yamashita, Akihiko Ito
  • Publication number: 20060127282
    Abstract: A microproduct includes a resin composition including a polypropylene-based resin and a hydrogenated derivative of a block copolymer shown by the general formula “X-Y”. The microproduct has micromachined features of a stamper precisely transferred by injection molding and a molded surface has a plurality of recesses and/or protrusions. In this case, X represents a polymer block immiscible with the polypropylene-based resin, and Y represents an elastomeric polymer block of a conjugated diene.
    Type: Application
    Filed: November 10, 2005
    Publication date: June 15, 2006
    Inventors: Kazuyuki Yamashita, Takashi Onaga, Satoshi Fujiki, Hideki Morimoto, Tutomu Obata, Masayasu Suzuki
  • Patent number: 6894939
    Abstract: In a data processor which comprises a semiconductor memory device, a potential on a bit line of the semiconductor memory device is monitored at the end of a precharge, required for the semiconductor memory device, to detect an anomalous frequency of a clock applied from the outside. The anomalous frequency is detected by determining whether or not the potential on the bit line has reached a predetermined potential. When the potential on the bit line has not reached a predetermined potential, the operation of a CPU is reset.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: May 17, 2005
    Assignee: NEC Electronics Corporation
    Inventor: Kazuyuki Yamashita
  • Publication number: 20040032778
    Abstract: In a data processor which comprises a semiconductor memory device, a potential on a bit line of the semiconductor memory device is monitored at the end of a precharge, required for the semiconductor memory device, to detect an anomalous frequency of a clock applied from the outside. The anomalous frequency is detected by determining whether or not the potential on the bit line has reached a predetermined potential. When the potential on the bit line has not reached a predetermined potential, the operation of a CPU is reset.
    Type: Application
    Filed: July 11, 2003
    Publication date: February 19, 2004
    Applicant: NEC Electronics Corporation
    Inventor: Kazuyuki Yamashita
  • Patent number: 6339321
    Abstract: An electronic device tray 110 having a plurality of IC holders 14 in which IC chips are held and having a shutter 15 for opening and closing openings of the IC holders 14, the shutter 15 being opened and closed by fluid pressure cylinders etc. provided at an IC tester.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: January 15, 2002
    Assignee: Advantest Corporation
    Inventors: Kazuyuki Yamashita, Hiroto Nakamura, Shin Nemoto
  • Patent number: 6026022
    Abstract: A nonvolatile semiconductor memory device includes a memory cell array, a plurality of word lines, a plurality of digit lines, a data setting circuit, a write data latch circuit, an X decoder, a write circuit, and a timing control circuit. In the memory cell array, memory cells are arranged in a matrix. Each word line is commonly connected to the memory cells of a corresponding page. Each digit line is commonly connected to the memory cells of a corresponding bit and address. The data setting circuit inverts input data in an erase mode and directly outputs it in a write mode. The write data latch circuit latches data output from the data setting circuit in correspondence with a bit and address designated by an address signal. The X decoder selects a word line corresponding to a page designated by an address signal out of the word lines upon reception of a simultaneous write start signal.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: February 15, 2000
    Assignee: NEC Corporation
    Inventors: Kazuyuki Yamashita, Kazuyuki Kusaba
  • Patent number: 5757200
    Abstract: A lead press mechanism is suitable for a self-drop type test handler for establishing an electrical contact between the lead terminals of IC devices to be tested and the contact terminals without deforming the lead terminals or adversely affecting the IC device testing. The lead press mechanism especially suitable for testing mold-framed IC devices.
    Type: Grant
    Filed: March 18, 1996
    Date of Patent: May 26, 1998
    Assignee: Advantest Corp.
    Inventor: Kazuyuki Yamashita
  • Patent number: 5653515
    Abstract: An improved control system for antilock brake control for an automotive vehicle which includes an excessive brake pedal-depressed force alarm unit. The control system determines a slip ratio and a slip ratio variation of a wheel to derive slippage conditions of the wheel, and provides an alarm to a driver when a brake pedal-depressed force exerted on a brake pedal is too great, causing wheel slippage to occur, especially during traveling on a slippery road surface such as a snowy road.
    Type: Grant
    Filed: September 5, 1995
    Date of Patent: August 5, 1997
    Assignee: Nippon Soken, Inc.
    Inventors: Kenji Takeda, Mitsuo Inagaki, Toshihisa Ishihara, Kazuyuki Yamashita, Shuichi Kohno