Patents by Inventor Ke Wang
Ke Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250145576Abstract: The present invention relates to a cathepsin K inhibitor having the structure as shown in formula (0) and/or formula (II), wherein cyanopyrimidine or a keto group as an electrophilic group is a key group to exert a good inhibitory effect on cathepsin K. Further provided are a preparation method therefor and use thereof. The provided cathepsin K inhibitor has a relatively high inhibitory effect and selectivity, and is expected to be used for treating diseases including thyroid diseases, cardiovascular diseases, bone diseases and gum diseases.Type: ApplicationFiled: January 28, 2023Publication date: May 8, 2025Inventors: Jinxin Wang, Guimin Zhang, Ke Wang, Jingchun Yao, Lihong Pan
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Publication number: 20250149445Abstract: Disclosed are an interconnection structure of a high-density three-dimensional (3D)-stacked memory and preparation method for same, relating to integrated circuit technologies, and in particular, to three-dimensional semiconductor memory technologies. According to the present disclosure, the interconnection structure of a high-density 3D-stacked memory includes a three-dimensional storage structure, which is formed by alternately stacked conductive layers and insulating layers, and a lead-out structure. A contact surface between the lead-out structure and an etching facade of the three-dimensional storage structure has a stepped edge line, and the etching facade is a plane of a side surface of the three-dimensional storage structure, which is generated due to etching and perpendicular to a bottom surface.Type: ApplicationFiled: October 9, 2023Publication date: May 8, 2025Applicant: CHENGDU PBM TECHNOLOGY LTD.Inventors: Jack Zezhong PENG, Ke Wang
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Patent number: 12294043Abstract: The present application discloses a drive backplane and a preparation method thereof, a display panel, and a display device. The drive backplane includes a flexible substrate provided with a first via hole; a first passivation layer located on a side of the flexible substrate and provided with a second via hole, an orthographic projection of the second via hole being at least partially overlapped with an orthographic projection of the first via hole; a thin film transistor located on a side, facing away from the flexible substrate, of the first passivation layer; and an electrical connecting structure, including a signal trace and a connecting terminal.Type: GrantFiled: January 22, 2020Date of Patent: May 6, 2025Assignee: BOE Technology Group Co., Ltd.Inventors: Wei Yang, Ke Wang, Muxin Di
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Publication number: 20250143112Abstract: Disclosed are a display substrate. The display substrate of the present disclosure includes a base substrate, a pixel drive circuit, and a connection structure. The base substrate is provided with a connection via hole penetrating in a thickness direction of the base substrate, and the base substrate includes a first surface and a second surface disposed oppositely along the thickness direction of the base substrate; the pixel drive circuit is disposed on the first surface; the signal wiring is disposed on the second surface; and the connection structure is disposed in the connection via hole and electrically connects the signal wiring with the pixel drive circuit. The connection via hole is partially filled by the connection structure.Type: ApplicationFiled: July 31, 2023Publication date: May 1, 2025Inventors: Dapeng XUE, Yingwei LIU, Ke WANG, Zhanfeng CAO
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Publication number: 20250131948Abstract: Provided are an underlying transistor circuit of a semiconductor memory and a preparation method for the same, which relate to the integrated circuit technologies. The circuit of the present disclosure includes a row line layer, a column line layer positioned above the row line layer, and an insulating isolation layer between the row line layer and the column line layer, with directions of the row lines and the column lines being perpendicular to each other. Holes penetrating the column line layer and the insulating isolation layer are provided at intersections of row lines and column lines; upper and lower segments of the hole are both filled with semiconductor materials; the semiconductor material in the upper segment of the hole has a doping type the same as that of the row line, while the semiconductor material in the lower segment of the hole has a doping type opposite to that of the row line, thus, a transistor is formed in each hole.Type: ApplicationFiled: February 21, 2023Publication date: April 24, 2025Applicant: CHENGDU PBM TECHNOLOGY LTD.Inventors: Jack Zezhong PENG, Ke WANG
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Publication number: 20250128662Abstract: A step, a step device and a vehicle are provided. The step includes a plurality of step segments, at least one connection step segment and a fastener, adjacent step segments include a first step segment and a second step segment, a first end of the connection step segment is slidably and detachably connected to the first step segment, a second end of the connection step segment is slidably and detachably connected to the second step segment, and the fastener is configured to fasten the connection step segment and the first step segment and to fasten the connection step segment and the second step segment.Type: ApplicationFiled: October 27, 2023Publication date: April 24, 2025Inventors: Xinfa DU, Ke WANG, Hanxin ZHANG, Qi ZHANG, Songfeng WANG, Yongyong ZHAN
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Patent number: 12282987Abstract: Methods, systems, and non-transitory computer readable storage media are disclosed for generating image mattes for detected objects in digital images without trimap segmentation via a multi-branch neural network. The disclosed system utilizes a first neural network branch of a generative neural network to extract a coarse semantic mask from a digital image. The disclosed system utilizes a second neural network branch of the generative neural network to extract a detail mask based on the coarse semantic mask. Additionally, the disclosed system utilizes a third neural network branch of the generative neural network to fuse the coarse semantic mask and the detail mask to generate an image matte. In one or more embodiments, the disclosed system also utilizes a refinement neural network to generate a final image matte by refining selected portions of the image matte generated by the generative neural network.Type: GrantFiled: November 8, 2022Date of Patent: April 22, 2025Assignee: Adobe Inc.Inventors: Zichuan Liu, Xin Lu, Ke Wang
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Publication number: 20250121776Abstract: A step device is provided, including a step, a limiting assembly, and a driving assembly. The step includes a fixed board and a movable board. A first end of the movable board is rotatably coupled to a first end of the fixed board, so that a second end of the movable board has a first position and a second position. In the first position, the second end of the movable board is far away from the fixed board, and a top surface of the movable board is substantially flush with a top surface of the fixed board. In the second position, at least a part of the movable board overlaps with the fixed board in a thickness direction of the fixed board. The limiting assembly is used to limit the movable board in the first position or the second position. The driving assembly is coupled to the movable board to drive the movable board to rotate relative to the fixed board.Type: ApplicationFiled: December 17, 2024Publication date: April 17, 2025Inventors: Ke WANG, Yongyong ZHAN, Xinfa DU, Hanxin ZHANG, Yiming WANG
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Publication number: 20250126800Abstract: Provided are a semiconductor memory underlying circuit and a preparation method for the same. The semiconductor memory underlying circuit of the present disclosure includes a row line layer, a column line layer located above the row line layer, and an insulating isolation layer between the row line layer and the column line layer. A predetermined number of row lines made of a doped semiconductor material are provided inside the row line layer, and a predetermined number of column lines made of a conductive material are provided inside the column line layer, with directions of the row lines and the column lines being perpendicular to each other. Metal oxide semiconductor (MOS) holes penetrating the column line layer and the insulating isolation layer are provided at intersections of the row lines and column lines. An upper segment and a lower segment of the MOS hole both are filled with conductive materials.Type: ApplicationFiled: February 21, 2023Publication date: April 17, 2025Applicant: CHENGDU PBM TECHNOLOGY LTD.Inventors: Jack Zezhong PENG, Ke WANG
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Patent number: 12279467Abstract: A substrate, a backlight module, and a display apparatus, which relates to the technical field of display. The substrate is configured to display or provide a backlight, and the substrate includes: a bonding region (OB) and a plurality of light-emitting regions (OA); each of the plurality of light-emitting regions (OA) includes a first metal layer (1) and a first conductive adhesive (2) located on the first metal layer (1), the first conductive adhesive (2) is a photo-curing conductive adhesive; and the bonding region (OB) includes a second metal layer (3) and a second conductive adhesive (4) located on the second metal layer (3).Type: GrantFiled: June 11, 2021Date of Patent: April 15, 2025Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ke Wang, Zhanfeng Cao, Qi Qi, Yan Qu
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Patent number: 12278370Abstract: The present invention relates to a carbon nanotube-transition metal oxide composite and a method for making the composite. The composite comprises at least one carbon nanotube and a plurality of transition metal oxide nanoparticles. The plurality of transition metal oxide nanoparticles are chemically bonded to the at least one carbon nanotube through carbon-oxygen-metal (C—O-M) linkages, wherein the metal is a transition metal element. The method for making the composite comprising the following steps: step 1, providing at least one carbon nanotube obtained from a super-aligned carbon nanotube array; step 2, pre-oxidizing the at least one carbon nanotube; step 3, dispersing the at least one carbon nanotube in a solvent to form a first suspension; step 4, dispersing a material containing transition metal oxyacid radicals in the first suspension to form a second suspension; and step 5, removing the solvent from the second suspension and drying the second suspension.Type: GrantFiled: July 20, 2021Date of Patent: April 15, 2025Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Da-Tao Wang, Li Sun, Ke Wang, Jia-Ping Wang, Shou-Shan Fan
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Patent number: 12278213Abstract: A display substrate and a display device are provided. The display substrate includes a backplane including a plurality of pixel regions; and light emitting units arranged in one-to-one correspondence with the plurality of pixel regions. Each light emitting unit includes light emitting sub-units arranged in a plurality of rows and a plurality of columns, each row of light emitting sub-units includes a plurality of light emitting sub-units arranged along a row direction, each column of light emitting sub-units includes one light emitting sub-unit, and orthographic projections of light emitting regions of two adjacent columns of light emitting sub-units on a first straight line extending along a column direction are not overlapped; and in each light emitting unit, there is no gap between orthographic projections of the light emitting regions of the two adjacent columns of light emitting sub-units on a second straight line extending along the row direction.Type: GrantFiled: October 21, 2020Date of Patent: April 15, 2025Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Mingxing Wang, Meng Yan, Qingxun Zhang, Qian Wu, Xuan Feng, Xiawei Yun, Guangcai Yuan, Xue Dong, Muxin Di, Zhiwei Liang, Ke Wang
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Publication number: 20250109111Abstract: A cross-linking agent as well as a preparation method and the use thereof is disclosed. The structure of the cross-linking agent contains a triazolyl, and contains a double bond, an amide acid, or an imide structure at the same time. The cross-linking agent is added into a resin composition, so that the film-forming property can be improved, the adhesion between the cured resin and a copper or copper alloy base material is improved, the discoloration of the copper or copper alloy base material is inhibited, and meanwhile, the resin has better heat resistance and chemical resistance after curing. The problem of poor compatibility caused by excessive additive types is avoided, and meanwhile, the problem of excessive additives may be relieved.Type: ApplicationFiled: April 29, 2022Publication date: April 3, 2025Applicant: POME TECHNOLOGY CO., LTD.Inventors: Mingxin LI, Xiuting MEN, Congcong GONG, Ke WANG
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Patent number: 12266738Abstract: A driving backplane, a display panel and a display apparatus are provided. The driving backplane includes: a base substrate, and a plurality of connection electrode groups and a plurality of correction structures disposed on the base substrate, each of the connection electrode groups includes: a first connection electrode and a second connection electrode the first connection electrode and the second connection electrode are arranged on a same layer; a first gap is formed between the first connection electrode and the second connection electrode, and a first group of opposite edges includes: an edge, close to the first gap, of the first connection electrode; and an edge, close to the first gap, of the second connection electrode; a second group of opposite edges includes: an edge, far away from the first gap, of the first connection electrode; and an edge, far away from the first gap, of the second connection electrode.Type: GrantFiled: August 20, 2021Date of Patent: April 1, 2025Assignee: BOE Technology Group Co., Ltd.Inventors: Haixu Li, Mingxing Wang, Guangcai Yuan, Zhanfeng Cao, Ke Wang, Feng Qu
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Patent number: 12268063Abstract: A displaying substrate and a displaying device. The displaying substrate comprises a flexible base plate; a first auxiliary electrode arranged on one side of the flexible base plate, the first auxiliary electrode being connected with a first power cord; a pixel unit arranged on a side of the flexible base plate away from a first metal layer, the pixel unit comprising: thin-film transistors arranged on the side of the flexible base plate away from the first metal layer, an insulation layer and a second auxiliary electrode, the second auxiliary electrode being connected with a second power cord, wherein the plurality of thin-film transistors comprise a drive transistor, the drive transistor has a source connected with the first auxiliary electrode and a drain connected with a first electrode of a light emitting device, a second electrode of the light emitting device is connected with the second auxiliary electrode.Type: GrantFiled: September 24, 2021Date of Patent: April 1, 2025Assignee: BOE Technology Group Co., Ltd.Inventors: Fengjuan Liu, Ke Wang, Wei Liu, Tianmin Zhou
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Publication number: 20250105146Abstract: A high-density three-dimensional memory device with interconnection of low resistance and a manufacturing method thereof are provided. The device includes an underlying circuit part, and a base structure disposed on the underlying circuit part. The base structure includes first conductive medium layers and insulating medium layers which are alternately stacked on each other from bottom to top. The base structure has dendritic interdigitated structure, the dendritic interdigitated structure is composed of two dendritic structures. The dendritic structure includes a trunk and branches connected to and perpendicular to the trunk. A preset number of memory holes are formed in a curved division trench between the branches and an external structure. A vertical electrode perpendicular to the bottom surface of the base structure is disposed in the memory hole, a storage medium required for a preset memory type is disposed between the vertical electrode and an inner wall of the memory hole.Type: ApplicationFiled: December 30, 2022Publication date: March 27, 2025Inventors: Jack Zezhong PENG, Ke WANG
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Patent number: 12259749Abstract: Provided is a portable display device, which comprises a clamping mechanism and a display body. The clamping mechanism comprises a bracket, a left mounting member, a left connecting member, a right mounting member, and a right connecting member. The left end and the right end of the bracket are respectively provided with a mounting cavity. The left connecting member and the right connecting member are respectively provided with a left L-shaped clamping element and a right L-shaped clamping element, which are symmetrically arranged. The portable display device of the disclosure can accommodate the varied usage habits of different users.Type: GrantFiled: September 12, 2023Date of Patent: March 25, 2025Assignee: Shenzhen Adreamer Elite Co., Ltd.Inventors: Tao Ye, Hongxing Kang, Qing Zhu, Ke Wang, Dingcao Huang
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Publication number: 20250092839Abstract: Systems and methods for aftertreatment system thermal management using cylinder deactivation and/or intake-air throttling are disclosed. A controller is configured to: receive a first temperature value regarding a temperature change over time regarding the aftertreatment system and a second temperature value associated with the engine; determine, based on the first temperature value being below a first threshold, that a thermal management mode is a first thermal management mode that is a warm up mode; determine, based on the first temperature value being at or above the first threshold, that the thermal management mode is a second thermal management mode that is a keep warm mode; determine, responsive to the thermal management mode being the first thermal management mode and based on comparing the second temperature value to a second threshold, an operating mode; and initiate at least one of the first operating mode or the second operating mode.Type: ApplicationFiled: December 3, 2024Publication date: March 20, 2025Applicants: Cummins Inc., Tula Technology, Inc.Inventors: Kunpeng Wang, Ke Wang, Yuan Zoe, Zhou Cao
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Publication number: 20250098064Abstract: A circuit board includes a substrate, a first conductive layer, a first insulating layer and a second conductive layer. The first conductive layer includes a plurality of first conductive portions. The second conductive layer includes a plurality of second conductive portions. A second conductive portion passes through a first via hole in the first insulating layer to be in electrical contact with a first conductive portion. The first conductive layer and the second conductive layer each include at least one main conductive layer, which is capable of creating a first intermetallic compound with solder. At least one of the first conductive layer and the second conductive layer further includes a stop layer capable of creating a second intermetallic compound with the solder. A rate of a reaction between the stop layer and the solder is lower than a rate of a reaction between the main conductive layer and the solder.Type: ApplicationFiled: October 31, 2022Publication date: March 20, 2025Inventors: Nianqi YAO, Kun ZHAO, Ce NING, Zhengliang LI, Zhanfeng CAO, Ke WANG, Jiaxiang ZHANG, Qi QI, Hehe HU, Feifei LI, Jie HUANG, Jiayu HE
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Publication number: 20250096763Abstract: A filter, a manufacturing method therefor, and an electronic device are provided. The filter includes a first substrate and a second substrate disposed opposite to each other, and a connection substrate disposed therebetween, wherein at least one first substrate electrode is disposed on the first substrate, at least one second substrate electrode is disposed on the second substrate, the connection substrate comprises, at least, a connection base substrate and at least one conductive post penetrating the connection base substrate in a thickness direction, an end of the conductive post close to the first substrate is provided with a first bump structure, an end of the conductive post close to the second substrate is provided with a second bump structure, and the first bump structure is connected with the first substrate electrode, the second bump structure is connected with the second substrate electrode, both in a bonding manner.Type: ApplicationFiled: August 25, 2022Publication date: March 20, 2025Inventors: Yingwei LIU, Zhonglan ZHAO, Zhanfeng CAO, Ke WANG