Abstract: Embodiments of the present disclosure provide a method and device for managing document indexes. The method includes in response to a request for adding a target segment to a document set including a plurality of segments, determining an original segment associated with the target segment from the plurality of segments, partitioning the original segment into a first portion and a second portion, the first portion being used to update the original segment, the second portion being used as the target segment, and rebuilding indexes for documents in the target segment.

Abstract: The present application relates to a vulcanization label that can be used to label tires. The label comprises a facestock layer, a first primer layer, a second primer layer comprising a zinc oxide, and a reactive adhesive layer. The two primer layers have different compositions. The second primer layer has a coating weight that is greater than 3 gsm. At least a portion of the second primer is in contact with at least a portion of the reactive adhesive layer.

Abstract: The present disclosure relates to a method and system for performing aging process on the transistor in the display panel. A method for performing aging process on a transistor in a display panel, comprising: obtaining an initial characteristic curve of the transistor; determining an initial cutoff voltage range of the transistor according to the obtained initial characteristic curve; determining a gate-source voltage and a drain-source voltage required by the transistor according to the initial cutoff voltage range, so as to increase an cutoff voltage range of the transistor; and performing aging process on the transistor according to the determined required gate-source voltage and drain-source voltage.

Abstract: A defect detection circuit and a defect detection method for a light-emitting element, a display driving device, a display device, and a defect detection method for the display device are provided. The defect detection circuit includes a power source signal adjustment sub-circuit, a data signal adjustment sub-circuit, a first initial signal adjustment sub-circuit, a second initial signal adjustment sub-circuit and a storage capacitor connected to a control end of a driving transistor. The storage capacitor is configured to control the driving transistor to be turned off under the effect of a power source signal, a data signal and an initial signal, to enable the second initial signal adjustment sub-circuit to apply the initial signal to a light-emitting sub-circuit, thereby to enable the light-emitting sub-circuit to emit light. The display driving device includes the defect detection circuit.

Abstract: Directly biasing a mask image is disclosed. A method includes generating a mask image for the mask, biasing the mask image to obtain a biased mask image, and simulating the biased mask image to obtain a wafer image to be compared to the design pattern. Biasing the mask image includes updating at least one pixel of the mask image using an interpolation of neighboring pixels of the at least one pixel, the interpolation being dependent on a predetermined value.

Abstract: Extracting shapes from a pixelated SRAF bitmap image of pixels for mask making is disclosed. A method includes receiving the pixelated SRAF bitmap image of pixels, each pixel having a respective brightness value; selecting a ridge point in the pixelated SRAF bitmap image; for each pixel of at least some of the pixels, determining a respective arrival time at the pixel; and determining a mask shape using the arrival times of the at least some of the pixels. The ridge point is one of the pixels and is selected based on the respective brightness value of the one of the pixels. An arrival time is based on a respective brightness value of the pixel and a Mask Rule Check (MRC) rule.

Abstract: Methods and systems for data indexing are disclosed. According to some embodiments, an index is split into a number of slots based on a slot power value. Each of the slots is assigned with a slot number. A first subset of the slots is allocated to a first shard mapped to the index. A second subset of the slots is allocated to a second shard mapped to the index. The first subset and the second subset are respectively allocated to the first shard and the second shard based on a shard-slot mapping.

Abstract: A set of measurement voltages having different voltage values are subsequently inputted to a measurement voltage input terminal of the pixel driving circuit, a light emitting state of a light emitting device under each measurement voltage is detected, and it is determined whether a storage capacitor in the pixel driving circuit is normal based on the light emitting state of the light emitting device.

Abstract: A method and a non-transitory computer-readable storage medium for optimizing a dose map for a multi-beam mask writer includes simulating, by a processor, a substrate pattern based on a design pattern and the dose map associated with the design pattern, and updating a value of the dose map based on a comparison between the substrate pattern and the design pattern. An apparatus for optimizing a dose map for a multi-beam mask writer includes a processor and a memory coupled to the processor configured to store instructions to simulate a substrate pattern based on a design pattern and the dose map associated with the design pattern, and update a value of the dose map based on a comparison between the substrate pattern and the design pattern.

Abstract: Provided are a method and device for determining a delivery region. The method comprises: acquiring, within a specified historical period, information of respective geographical locations to which goods have been properly delivered in a specified geographical region (201); mapping, to a grid-based map, the information of the respective geographical locations to which goods have been properly delivered to obtain a mapped map (202); determining, for each grid cell, a distance between said grid cell and a grid cell closest thereto in a geographical location to which goods have been properly delivered (203); performing clustering on grid cells having distances within a preset value range to obtain multiple delivery region units (204); and performing clustering on the multiple delivery region units to obtain at least one delivery region comprising the multiple delivery region units (205). The present solution improves efficiency of allocating delivery regions.

Abstract: A method for optimizing a binary mask pattern includes determining, by a processor, an evaluation value based on a comparison between a design pattern and a substrate pattern simulated based on the binary mask pattern. The method also includes, based on the evaluation value, using, by the processor, a gradient-based optimization method to generate a first adjusted binary mask pattern. The method also includes determining, by the processor, a first updated evaluation value based on a comparison between the design pattern and a first updated substrate pattern simulated based on the first adjusted binary mask pattern. The method also includes, based on the first updated evaluation value, using, by the processor, a product of a Hessian matrix and an arbitrary vector to generate a second adjusted binary mask pattern. The method also includes simulating, by the processor, a second updated substrate pattern based on the second adjusted binary mask pattern.

Abstract: A method for optimizing a binary mask pattern includes determining, by a processor, an evaluation value based on a comparison between a design pattern and a substrate pattern simulated based on the binary mask pattern. The method also includes, based on the evaluation value, using, by the processor, a gradient-based optimization method to generate a first adjusted binary mask pattern. The method also includes determining, by the processor, a first updated evaluation value based on a comparison between the design pattern and a first updated substrate pattern simulated based on the first adjusted binary mask pattern. The method also includes, based on the first updated evaluation value, using, by the processor, a product of a Hessian matrix and an arbitrary vector to generate a second adjusted binary mask pattern. The method also includes simulating, by the processor, a second updated substrate pattern based on the second adjusted binary mask pattern.

Abstract: Directly biasing a mask image is disclosed. A method includes generating a mask image for the mask, biasing the mask image to obtain a biased mask image, and simulating the biased mask image to obtain a wafer image to be compared to the design pattern. Biasing the mask image includes updating at least one pixel of the mask image using an interpolation of neighboring pixels of the at least one pixel, the interpolation being dependent on a predetermined value.

Abstract: Extracting shapes from a pixelated SRAF bitmap image of pixels for mask making is disclosed. A method includes receiving the pixelated SRAF bitmap image of pixels, each pixel having a respective brightness value; selecting a ridge point in the pixelated SRAF bitmap image; for each pixel of at least some of the pixels, determining a respective arrival time at the pixel; and determining a mask shape using the arrival times of the at least some of the pixels. The ridge point is one of the pixels and is selected based on the respective brightness value of the one of the pixels. An arrival time is based on a respective brightness value of the pixel and a Mask Rule Check (MRC) rule.

Abstract: Embodiments of the present disclosure provide a method and device for managing document indexes. The method includes: in response to a request for adding a target segment to a document set including a plurality of segments, determining an original segment associated with the target segment from the plurality of segments; partitioning the original segment into a first portion and a second portion, the first portion being used to update the original segment, the second portion being used as the target segment; and rebuilding indexes for documents in the target segment.

Abstract: A test circuitry and a method for testing the same and a test system are provided. The test circuitry includes: a test signal input end, configured to input an initial test signal; a signal output end, configured to output a target test signal; and a signal shaping circuitry coupled to the test signal input end and the signal output end, configured to remove a noise signal from the initial test signal to obtain the target test signal.

Abstract: A defect detection circuit and a defect detection method for a light-emitting element, a display driving device, a display device, and a defect detection method for the display device are provided. The defect detection circuit includes a power source signal adjustment sub-circuit, a data signal adjustment sub-circuit, a first initial signal adjustment sub-circuit, a second initial signal adjustment sub-circuit and a storage capacitor connected to a control end of a driving transistor. The storage capacitor is configured to control the driving transistor to be turned off under the effect of a power source signal, a data signal and an initial signal, to enable the second initial signal adjustment sub-circuit to apply the initial signal to a light-emitting sub-circuit, thereby to enable the light-emitting sub-circuit to emit light. The display driving device includes the defect detection circuit.

Abstract: A set of measurement voltages having different voltage values are subsequently inputted to a measurement voltage input terminal of the pixel driving circuit, a light emitting state of a light emitting device under each measurement voltage is detected, and it is determined whether a storage capacitor in the pixel driving circuit is normal based on the light emitting state of the light emitting device.

Abstract: The present disclosure relates to a method and system for performing aging process on the transistor in the display panel. A method for performing aging process on a transistor in a display panel, comprising: obtaining an initial characteristic curve of the transistor; determining an initial cutoff voltage range of the transistor according to the obtained initial characteristic curve; determining a gate-source voltage and a drain-source voltage required by the transistor according to the initial cutoff voltage range, so as to increase an cutoff voltage range of the transistor; and performing aging process on the transistor according to the determined required gate-source voltage and drain-source voltage.

Abstract: A method, an apparatus, and a non-transitory computer readable medium for full chip mask pattern generation include: generating, by a processor, an initial mask image from target polygons, performing, by the processor, a global image based full chip optimization of the initial mask image to generate new mask pattern polygons, wherein the global image based full chip optimization co-optimizes main feature polygons and SRAF image pixels, determining performance index information based on the global image based full chip optimization, wherein the performance index information comprises data for assisting a global polygon optimization, generating a mask based on the global polygon optimization of the new mask pattern polygons using the performance index information, and generating optimized mask patterns based on a localized polygon optimization of the mask.